Patents by Inventor Hiroshi Ueda

Hiroshi Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11157262
    Abstract: Provided is a program updating device, program updating system, and a program updating method for updating a program without imposing a load on a user. A program updating device (“PUD”) includes a communication unit transmitting/receiving information to/from an in-vehicle device operating on a software program, the PUD transmitting update information of a software program from the communication unit to execute update processing, further including: a determination unit configured to determine whether an operation switch of a vehicle has been switched from an on-state to an off-state; a state control unit configured to, if it is determined that the operation switch has been switched to the off-state, instruct to transition to a driving-prohibition state and hold an ignition-on state; and an update processing unit configured to start update processing based on the update information after confirming of a state is made.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: October 26, 2021
    Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Shinichi Aiba, Hiroshi Ueda, Masayuki Inoue, Hiroshi Tateishi, Shogo Kamiguchi
  • Publication number: 20210329795
    Abstract: A planar coil element of the present invention includes an insulating base film having a first surface and a second surface opposite to the first surface, a first conductive pattern deposited on the first surface side of the insulating base film, and a first insulating layer covering the first conductive pattern on the first surface side, in which the first conductive pattern includes a core body and a widening layer deposited by plating on the outer surface of the core body, the core body includes a thin conductive layer on the insulating base film, and the ratio of the average thickness of the first conductive pattern to the average circuit pitch of the first conductive pattern is 1/2 or more and 5 or less.
    Type: Application
    Filed: June 29, 2021
    Publication date: October 21, 2021
    Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Hiroshi Ueda, Kousuke Miura, Yoshihito Yamaguchi, Yuka Urabe
  • Publication number: 20210326677
    Abstract: A determination device acquires first data and a plurality of second data that are related to a state of a vehicle and comprises a plurality of trained neural networks that are so trained as to estimate assumption data corresponding to the first data if any one of the plurality of second data is input; and a determination unit that determines correctness of the first data based on the estimation data respectively estimated by the plurality of trained neural networks and the first data.
    Type: Application
    Filed: November 29, 2019
    Publication date: October 21, 2021
    Applicants: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Shogo Kamiguchi, Hiroshi Ueda, Naoki Adachi, Yoshihiro Hamada
  • Publication number: 20210311030
    Abstract: Provided is an antibody or antibody fragment labeled with a fluorescent dye having the following properties (1) and (2): (1) the fluorescent dye is quenched in the absence of an antigen and the quenching of the fluorescent dye is cancelled in the presence of an antigen; and (2) the fluorescent dye is contained in a compound binding to an amino acid residue in the antibody or antibody fragment.
    Type: Application
    Filed: July 10, 2019
    Publication date: October 7, 2021
    Applicant: TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Shinichi SATO, Hiroyuki NAKAMURA, Hiroshi UEDA
  • Patent number: 11140784
    Abstract: A printed wiring board includes a base film having insulation properties and a conductive pattern including multiple wiring portions laminated so as to run on at least one surface of the base film, wherein each wiring portion includes a first conductive portion and a second conductive portion coating an outer surface of the first conductive portion, wherein an average width of each wiring portion is 10 ?m or greater to 50 ?m or smaller, and an average thickness of the second conductive portion is 1 ?m or greater to smaller than 8.5 ?m. A method for manufacturing a printed wiring board includes a first conductive portion forming step of forming a first conductive portion forming each wiring portion by plating an opening of the resist pattern on the conductive foundation layer, a conductive foundation layer removing step, and a second conductive portion coating step.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: October 5, 2021
    Assignees: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kohei Okamoto, Kousuke Miura, Hiroshi Ueda, Shoichiro Sakai, Maki Ikebe
  • Publication number: 20210281811
    Abstract: A first image is generated by imaging a first three-dimensional virtual space including a predetermined object by a first virtual camera. In addition, a map object formed by a three-dimensional model corresponding to the first three-dimensional virtual space is generated, and an indicator object indicating the position of a predetermined object is placed on the map object. Then, a second image is generated by imaging the map object by a second virtual camera. At this time, the second image is generated such that, regarding the indicator object placed on the map object, the display manners of a part hidden by the map object and a part not hidden by the map object as seen from the second virtual camera are different from each other.
    Type: Application
    Filed: May 25, 2021
    Publication date: September 9, 2021
    Inventors: Hiroshi UEDA, Kazuhide UEDA, Norihiro MORITA, Arisa KITANI
  • Patent number: 11083092
    Abstract: A planar coil element of the present invention includes an insulating base film having a first surface and a second surface opposite to the first surface, a first conductive pattern deposited on the first surface side of the insulating base film, and a first insulating layer covering the first conductive pattern on the first surface side, in which the first conductive pattern includes a core body and a widening layer deposited by plating on the outer surface of the core body, and the ratio of the average thickness of the first conductive pattern to the average circuit pitch of the first conductive pattern is ½ or more and 5 or less.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: August 3, 2021
    Assignee: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Hiroshi Ueda, Kousuke Miura, Yoshihito Yamaguchi, Yuka Urabe
  • Patent number: 11050989
    Abstract: A first image is generated by imaging a first three-dimensional virtual space including a predetermined object by a first virtual camera. In addition, a map object formed by a three-dimensional model corresponding to the first three-dimensional virtual space is generated, and an indicator object indicating the position of a predetermined object is placed on the map object. Then, a second image is generated by imaging the map object by a second virtual camera. At this time, the second image is generated such that, regarding the indicator object placed on the map object, the display manners of a part hidden by the map object and a part not hidden by the map object as seen from the second virtual camera are different from each other.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: June 29, 2021
    Assignee: NINTENDO CO., LTD.
    Inventors: Hiroshi Ueda, Kazuhide Ueda, Norihiro Morita, Arisa Kitani
  • Publication number: 20210173628
    Abstract: Provided is a program updating device, program updating system, and a program updating method for updating a program without imposing a load on a user. A program updating device (“PUD”) includes a communication unit transmitting/receiving information to/from an in-vehicle device operating on a software program, the PUD transmitting update information of a software program from the communication unit to execute update processing, further including: a determination unit configured to determine whether an operation switch of a vehicle has been switched from an on-state to an off-state; a state control unit configured to, if it is determined that the operation switch has been switched to the off-state, instruct to transition to a driving-prohibition state and hold an ignition-on state; and an update processing unit configured to start update processing based on the update information after confirming of a state is made.
    Type: Application
    Filed: October 19, 2018
    Publication date: June 10, 2021
    Inventors: Shinichi Aiba, Hiroshi Ueda, Masayuki Inoue, Hiroshi Tateishi, Shogo Kamiguchi
  • Publication number: 20210136921
    Abstract: A method for manufacturing a printed circuit board according to one embodiment of the present invention includes a step of forming a resist pattern, and a step of forming a conductive pattern by using the resist pattern. The resist pattern has an acute angle portion in which an outer edge of a resist is bent to form an acute angle in a plan view. In a corner portion of the acute angle portion, an outer-side outer edge of the resist is rounded, and a radius of curvature of the outer-side outer edge is more than or equal to a distance from the outer-side outer edge to another outer edge adjacent thereto in a direction away from a center of curvature of the outer-side outer edge.
    Type: Application
    Filed: December 4, 2017
    Publication date: May 6, 2021
    Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kou NOGUCHI, Hiroshi UEDA
  • Publication number: 20210068255
    Abstract: A flexible printed circuit board includes: an electrically insulating substrate layer; an electrically conductive pattern stacked on at least one surface of the substrate layer; and a cover layer that is disposed on a stack including the substrate layer and the electrically conductive pattern and covers a surface of the stack, which surface is on the side on which the electrically conductive pattern is present. The electrically conductive pattern has a coil region including a coil. In the substrate layer or the cover layer, a high-magnetic permeability member is present in at least a region that overlaps the coil region in plan view.
    Type: Application
    Filed: February 26, 2018
    Publication date: March 4, 2021
    Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Tsuyoshi TAKEMOTO, Hiroshi UEDA
  • Publication number: 20210059045
    Abstract: A flexible printed circuit board of the present invention includes an insulating base film and an electrode stacked on a first surface of the base film, in which the electrode includes a low-melting-point metal layer on a surface of the electrode, and a plate- or strip-like rigid member electrically insulated from the electrode is disposed in a region of a second surface of the base film opposite from the electrode.
    Type: Application
    Filed: November 15, 2017
    Publication date: February 25, 2021
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Katsunari MIKAGE, Masamichi YAMAMOTO, Junichi OKAUE, Hiroshi UEDA
  • Publication number: 20210022254
    Abstract: According to an aspect of the present disclosures, a method of making a flexible printed circuit board, which includes a base film having an insulating property, a conductive pattern disposed on either one or both surfaces of the base film, and a cover layer covering a conductive-pattern side of a laminated structure inclusive of the base film and the conductive pattern, includes a superimposing step of superimposing a cover film on the conductive-pattern side of the laminated structure, the cover film having a first resin layer and a second resin layer that is laminated to an inner side of the first resin layer and that softens at a lower temperature than does the first resin layer, and a pressure bonding step of vacuum bagging the laminated structure and the cover film at a temperature higher than a softening temperature of the second resin layer.
    Type: Application
    Filed: November 23, 2018
    Publication date: January 21, 2021
    Inventors: Kou NOGUCHI, Hiroshi UEDA
  • Patent number: 10889086
    Abstract: A resin film according to one aspect of the present invention is a resin film having polyimide as a main component, the resin film including a modified layer formed in a depth direction from at least one side of the resin film; and a non-modified layer other than the modified layer, wherein a ring-opening rate of an imide ring of the polyimide in the modified layer is higher than a ring-opening rate of an imide ring of the polyimide in the non-modified layer, and an average thickness of the modified layer from the one side of the resin film is greater than or equal to 10 nm and less than or equal to 500 nm.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: January 12, 2021
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kayo Hashizume, Yoshio Oka, Masamichi Yamamoto, Takashi Kasuga, Yugo Kubo, Hideki Kashihara, Hiroshi Ueda
  • Patent number: 10869389
    Abstract: A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, a conductive pattern that is stacked on at least one surface side of the base film and that includes a plurality of wiring portions arranged adjacent to one another, and an insulating layer that covers outer surfaces of the base film and the conductive pattern. The plurality of wiring portions have an average spacing of 1 ?m or more and 20 ?m or less and an average height of 30 ?m or more and 120 ?m or less. A filling area ratio of the insulating layer between the plurality of wiring portions adjacent to one another in sectional view is 95% or more.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: December 15, 2020
    Assignee: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kohei Okamoto, Yoshihito Yamaguchi, Kousuke Miura, Hiroshi Ueda, Atsushi Kimura
  • Patent number: 10866085
    Abstract: The object of the present invention is to provide a technic for accurately measuring a connection state between a flexible board and a circuit board. A measurement apparatus includes a flexible board connected to a plurality of electrode terminals in a state of being superimposed on the plurality of electrode terminals provided on a circuit board, and a laser displacement meter configured to measure a height distribution of a surface of a connection portion of the plurality of electrode terminals of the circuit board. The plurality of electrode terminals are linearly arranged at a predetermined pitch, and the laser displacement meter is configured to continuously measure a height position of the surface of the connection portion while scanning from one side to an other side in an arrangement direction of the plurality of linearly arranged electrode terminals.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: December 15, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Ueda, Seiji Takaki
  • Publication number: 20200376810
    Abstract: A resin film according to one aspect of the present invention is a resin film having polyimide as a main component, the resin film including a modified layer formed in a depth direction from at least one side of the resin film; and a non-modified layer other than the modified layer, wherein a ring-opening rate of an imide ring of the polyimide in the modified layer is higher than a ring-opening rate of an imide ring of the polyimide in the non-modified layer, and an average thickness of the modified layer from the one side of the resin film is greater than or equal to 10 nm and less than or equal to 500 nm.
    Type: Application
    Filed: March 20, 2018
    Publication date: December 3, 2020
    Inventors: Kayo HASHIZUME, Yoshio OKA, Masamichi YAMAMOTO, Takashi KASUGA, Yugo KUBO, Hideki KASHIHARA, Hiroshi UEDA
  • Patent number: 10842027
    Abstract: A base material for a printed circuit board includes: an insulating base film; a sintered layer that is layered on at least one side surface of the base film and that is formed of a plurality of sintered metal particles; an electroless plating layer that is layered on a surface of the sintered layer that is opposite to the base film; and an electroplating layer that is layered on a surface of the electroless plating layer that is opposite to the sintered layer, wherein an arithmetic mean height Sa of the surface of the electroless plating layer opposite to the sintered layer is greater than or equal to 0.001 ?m and less than or equal to 0.5 ?m.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: November 17, 2020
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kazuhiro Miyata, Takashi Kasuga, Yoshio Oka, Hiroshi Ueda
  • Publication number: 20200288578
    Abstract: A base material for a printed circuit board includes: an insulating base film; a sintered layer that is layered on at least one side surface of the base film and that is formed of a plurality of sintered metal particles; an electroless plating layer that is layered on a surface of the sintered layer that is opposite to the base film; and an electroplating layer that is layered on a surface of the electroless plating layer that is opposite to the sintered layer, wherein an arithmetic mean height Sa of the surface of the electroless plating layer opposite to the sintered layer is greater than or equal to 0.001 ?m and less than or equal to 0.5 ?m.
    Type: Application
    Filed: July 9, 2018
    Publication date: September 10, 2020
    Inventors: Kazuhiro MIYATA, Takashi KASUGA, Yoshio OKA, Hiroshi UEDA
  • Patent number: 10758820
    Abstract: Based on a user operation on an operation unit, an operation target is controlled in a virtual space, and it is determined whether or not the operation target is in a predetermined situation in the virtual space. Then, a vibration signal for vibrating a vibration unit is generated in accordance with the state of the operation target in the virtual space, and the vibration signal is generated by associating a plurality of types of vibrations with a plurality of states of the operation target. When it is determined that the operation target is in the predetermined situation, the vibration signal is generated so that regarding a first type of vibration among the plurality of types of vibrations, the vibration is weaker than in a case where it is not determined that the operation target is in the predetermined situation, or the vibration disappears.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: September 1, 2020
    Assignee: Nintendo Co., Ltd.
    Inventors: Hiroshi Ueda, Ichiro Suzuki, Shintaro Sato