Patents by Inventor Hiroshi Ueda

Hiroshi Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190015744
    Abstract: Based on a user operation on an operation unit, an operation target is controlled in a virtual space, and it is determined whether or not the operation target is in a predetermined situation in the virtual space. Then, a vibration signal for vibrating a vibration unit is generated in accordance with the state of the operation target in the virtual space, and the vibration signal is generated by associating a plurality of types of vibrations with a plurality of states of the operation target. When it is determined that the operation target is in the predetermined situation, the vibration signal is generated so that regarding a first type of vibration among the plurality of types of vibrations, the vibration is weaker than in a case where it is not determined that the operation target is in the predetermined situation, or the vibration disappears.
    Type: Application
    Filed: May 22, 2018
    Publication date: January 17, 2019
    Inventors: Hiroshi UEDA, Ichiro SUZUKI, Shintaro SATO
  • Patent number: 10175229
    Abstract: The present invention aims to provide a novel compound for measuring cellular cytotoxicity or cell proliferation capacity accurately with high reproducibility, conveniently and rapidly, and a measurement method of cellular cytotoxicity or cell proliferation capacity by using the compound. The present invention relates to a compound represented by the formula (I): wherein R1 is a substituent, R2 and R3 are each an optionally substituted hydrocarbon group, or an optionally substituted heterocyclic group, Y is a substituent, n is an integer of 0-3, Z is a single bond, —O—, —S—, —SO—, —SO2—, or —NR4— (R4 is a hydrogen atom or a substituent), and A is an optionally substituted C1-6 alkylene group) or a salt thereof.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: January 8, 2019
    Assignee: NAGASAKI UNIVERSITY
    Inventors: Yoshimasa Tanaka, Yuki Sakai, Satoshi Mizuta, Hiroshi Ueda
  • Publication number: 20190008037
    Abstract: A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property and a conductive pattern disposed on at least one surface of the base film. The conductive pattern includes a copper particle bond layer which is fixed to the base film, and a lightness L* of a conductive pattern non-formed region of the base film is 60 or less. The base film may include a modified layer on one surface side thereof.
    Type: Application
    Filed: August 1, 2016
    Publication date: January 3, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kohei OKAMOTO, Kousuke MIURA, Hiroshi UEDA, Takashi KASUGA, Kazuhiro MIYATA
  • Publication number: 20190007234
    Abstract: A relay device capable of preventing transmission of an improper message to one or more networks even if improper falsification is made to a program for executing relay processing. If one CAN controller receives a message, a gateway stores the received message in the message storage unit and also sends the message to the processing unit. The processing unit that received the message performs processing necessary for relay of the message by executing a relay program, and sends the message to be relayed to the CAN controller. The gateway compares the message before being sent from the CAN controller to the processing unit with the message sent from the processing unit to the CAN controller, to determine the properness of the message.
    Type: Application
    Filed: August 19, 2016
    Publication date: January 3, 2019
    Applicants: NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY, AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroaki TAKADA, Ryo KURACHI, Hiroshi UEDA
  • Publication number: 20190008035
    Abstract: A printed circuit board according to an embodiment of the present invention includes a base film containing, as a main component, a polyimide and a conductive pattern disposed on at least one surface of the base film. The conductive pattern includes a copper particle bond layer which is fixed to the base film. An external transmittance for a wavelength of 500 nm in a conductive pattern non-formed region of the base film is 70% or less of an internal transmittance for a wavelength of 500 nm in a middle layer portion of the base film.
    Type: Application
    Filed: August 1, 2016
    Publication date: January 3, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kohei OKAMOTO, Kousuke MIURA, Hiroshi UEDA, Takashi KASUGA, Kazuhiro MIYATA
  • Publication number: 20180371191
    Abstract: A base film for a printed circuit board according to an embodiment of the present invention is a base film for a printed circuit board, the base film containing a polyimide as a main component. A ratio of a peak intensity around a wave number of 1705 cm?1 to a peak intensity around a wave number of 1494 cm?1 in an absorption intensity spectrum of a surface of the base film, the spectrum being measured at an angle of incidence of 45° by total reflection infrared absorption spectroscopy, is 0.50 or more and 1.10 or less. A substrate for a printed circuit board according to an embodiment of the present invention includes the base film for a printed circuit board and a metal layer stacked on the surface of the base film for a printed circuit board.
    Type: Application
    Filed: November 22, 2016
    Publication date: December 27, 2018
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kayo HASHIZUME, Yoshio OKA, Takashi KASUGA, Kentaro OKAMOTO, Atsushi KIMURA, Hiroshi UEDA
  • Publication number: 20180343461
    Abstract: A video encoding/decoding system includes a video encoding device, and a video decoding device. The video encoding device includes an encoding circuit for encoding an image including a diagnostic image or a normal image. The video decoding device includes a decoding circuit for decoding the image encoded in the encoding circuit, a check signal generation circuit for generating a check signal of the decoded image, a storage circuit for storing the check signal generated by the check signal generation circuit, and a comparison circuit for comparing the check signal stored in the storage circuit with the check signal generated by the check signal generation circuit. The failure is detected by comparing the check signal including an expected value stored in the storage circuit with the check signal including a comparison value generated by the check signal generation circuit by processing the same image data a plurality of times.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Inventors: Seiji MOCHIZUKI, Toshiyuki KAYA, Hiroshi UEDA, Tetsuya SHIBAYAMA
  • Patent number: 10143083
    Abstract: A substrate for a printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, and a metal layer formed on at least one surface side of the base film. In the substrate for a printed circuit board, a plurality of fine particles are disposed between the base film and the metal layer, and the fine particles are formed of a metal the same as a main metal of the metal layer or formed of a metal compound of the main metal. The fine particles preferably have an average particle size of 0.1 nm or more and 20 nm or less. The fine particles are preferably formed of a metal oxide or a metal hydroxide. The fine particles are preferably present between the base film and the metal layer so as to form a layer. The metal layer preferably includes a metal grain layer formed by firing metal nanoparticles.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: November 27, 2018
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Motohiko Sugiura, Takashi Kasuga, Yoshio Oka, Shigeaki Uemura, Jinjoo Park, Hiroshi Ueda, Kousuke Miura
  • Publication number: 20180333739
    Abstract: A coating device according to an aspect of the present invention includes a travel module that causes a strip-shaped sheet to travel in a longitudinal direction, a coating module that coats a surface of the strip-shaped sheet with ink while the strip-shaped sheet travels, and a supply module that supplies the ink to the coating module. The coating module includes a slot-type coating head that is disposed above the strip-shaped sheet so as to span the strip-shaped sheet in a width direction. The slot-type coating head includes an ink storage part that widens toward the strip-shaped sheet in cross-sectional view and an ink supply path that communicates with an upper part of the ink storage part.
    Type: Application
    Filed: November 10, 2016
    Publication date: November 22, 2018
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Kazuhiro MIYATA, Takashi KASUGA, Yoshio OKA, Yasuhiro OKUDA, Jinjoo PARK, Hiroshi UEDA, Kohei OKAMOTO
  • Patent number: 10123022
    Abstract: In a picture encoding device and a picture decoding device, the access to a reference frame memory is suppressed. The picture encoding device is comprised of a first encoder for intra picture encoding, a second encoder for inter picture encoding, and an intermediate buffer. A local decoded picture generated by the first encoder is stored as a reference picture in the intermediate buffer, and the inter picture encoding by the second encoder is performed by referring to the local decoded picture in the intermediate buffer. A picture decoding device is comprised of a first decoder for intra picture decoding, a second decoder for inter picture decoding, and an intermediate buffer. A local decoded picture generated by the first decoder is stored as a reference picture in the intermediate buffer, and the inter picture decoding by the second decoder is performed by referring the local decoded picture in the intermediate buffer.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: November 6, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Toshiyuki Kaya, Seiji Mochizuki, Tetsuya Shibayama, Kenichi Iwata, Hiroshi Ueda, Ren Imaoka
  • Patent number: 10111330
    Abstract: A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, and a conductive pattern formed on at least one of surfaces of the base film, wherein at least a portion of the conductive pattern includes a core body, and a shrink layer formed by plating on an outer surface of the core body. The portion of the conductive pattern preferably has a striped configuration or a spiral configuration. The portion of the conductive pattern preferably has an average circuit gap width of 30 ?m or less. The portion of the conductive pattern preferably has an average aspect ratio of 0.5 or more. The plating is preferably electroplating or electroless plating.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: October 23, 2018
    Assignee: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Hiroshi Ueda, Kousuke Miura
  • Patent number: 10076028
    Abstract: A substrate for a printed circuit board according to an embodiment of the present invention includes a base film having insulating properties and a sintered layer formed of a plurality of metal particles, the sintered layer being stacked on at least one surface of the base film, in which a region of the sintered layer extending from an interface between the sintered layer and the base film to a position 500 nm or less from the interface has a porosity of 1% or more and 50% or less.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: September 11, 2018
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Takashi Kasuga, Yoshio Oka, Shigeaki Uemura, Jinjoo Park, Hiroshi Ueda, Kousuke Miura
  • Patent number: 10076032
    Abstract: A substrate for a printed circuit board includes a base film having an insulating property; a first conductive layer formed on at least one of surfaces of the base film by application of a conductive ink containing metal particles; and a second conductive layer formed, by plating, on a surface of the first conductive layer, the surface being on a side opposite to the base film, wherein a region near an interface between the base film and the first conductive layer contains a metal oxide species based on a metal of the metal particles and a metal hydroxide species based on the metal of the metal particles, the metal oxide species in the region near the interface between the base film and the first conductive layer has a mass per unit area of 0.1 ?g/cm2 or more and 10 ?g/cm2 or less, and a mass ratio of the metal oxide species to the metal hydroxide species is 0.1 or more.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: September 11, 2018
    Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.
    Inventors: Takashi Kasuga, Yoshio Oka, Shigeyoshi Nakayama, Jinjoo Park, Sumito Uehara, Kousuke Miura, Hiroshi Ueda
  • Publication number: 20180255072
    Abstract: A communication device capable of detecting transmission of an improper message to a network. A CAN controller in the gateway transmits and receives a message attached with a priority level (ID) to/from an ECU through a communication line, and counts, by the consecutive block number counter, the number of transmitted messages that are consecutively blocked as a result of arbitration processing as the number of consecutive blocks and stores the number as the number of allowed blocks into an allowed block number table in the storage unit in association with a priority level attached to the message received at the communication line. Every time a message is received, the controller compares the number of consecutive blocks with the number of allowed blocks for this message, and detects abnormality if the number of consecutive blocks is larger than the number of allowed blocks.
    Type: Application
    Filed: August 10, 2016
    Publication date: September 6, 2018
    Applicants: NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY, AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroaki TAKADA, Ryo KURACHI, Hiroshi UEDA, Satoshi HORIHATA
  • Publication number: 20180253127
    Abstract: A CPU needs to perform reset operation when a secondary arithmetic processing unit controlled by the CPU controls a signal processing circuit. CPU A controls module A. CPU B controls module B. Module A and module B control a signal processing circuit. CPU A and CPU B issue a reset request to the signal processing circuit. The signal processing circuit performs a reset process based on the reset request accepted from the CPU and a control origin identification signal that identifies a CPU as an origin of controlling the module having started a signal processing section.
    Type: Application
    Filed: December 29, 2017
    Publication date: September 6, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Hiroshi UEDA, Ryoji HASHIMOTO, Taku MAEKAWA, Katsushige MATSUBARA, Keisuke MATSUMOTO
  • Patent number: 10051280
    Abstract: A video encoding/decoding system includes a video encoding device and a video decoding device. The video encoding device includes an encoding part for encoding a diagnostic image or normal image. The video decoding device includes a decoding part for decoding the image encoded by the encoding part, a check signal generation part for generating a check signal of the decoded image, a storage part for storing the expected value of the check signal of the diagnostic image or the check signal generated by the check signal generation part, and a comparison part for comparing the check signal stored in the storage part with the check signal generated by the check signal generation part, in order to detect failure in all the paths from the image input part of the video encoding device to the image output part of the video decoding device.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: August 14, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Seiji Mochizuki, Toshiyuki Kaya, Hiroshi Ueda, Tetsuya Shibayama
  • Publication number: 20180205414
    Abstract: Provided is a small and inexpensive vehicle-mounted apparatus including a first vehicle-mounted device and a second vehicle-mounted device, a small and inexpensive relay apparatus including a first relay device and a second relay device, and computer programs executed by the vehicle-mounted apparatus and the relay apparatus. A relay apparatus includes a first relay device that executes a process in accordance with a first control program and a second relay device that executes a process in accordance with a second control program. A Hardwar Security Module (HSM) of the first relay device verifies the second control program. The second vehicle-mounted device computes associated data pertaining to the second control program. The HSM verifies the second control program by determining whether or not the associated data computed by the second relay device matches reference data.
    Type: Application
    Filed: January 5, 2018
    Publication date: July 19, 2018
    Inventors: Hiroshi Tateishi, Hiroshi Ueda, Tomohiro Mizutani
  • Publication number: 20180199022
    Abstract: A first image is generated by imaging a first three-dimensional virtual space including a predetermined object by a first virtual camera. In addition, a map object formed by a three-dimensional model corresponding to the first three-dimensional virtual space is generated, and an indicator object indicating the position of a predetermined object is placed on the map object. Then, a second image is generated by imaging the map object by a second virtual camera. At this time, the second image is generated such that, regarding the indicator object placed on the map object, the display manners of a part hidden by the map object and a part not hidden by the map object as seen from the second virtual camera are different from each other.
    Type: Application
    Filed: November 30, 2017
    Publication date: July 12, 2018
    Inventors: Hiroshi UEDA, Kazuhide UEDA, Norihiro MORITA, Arisa KITANI
  • Publication number: 20180162295
    Abstract: Provided are a communication device and a communication restriction program capable of suppressing invalid message transmission to a network by injecting an invalid program. The ECU includes a CAN controller having a register group storing a value concerning communication with a different ECU and a processing unit processing a value for the register group. The ECU switches the mode between the full control mode in which writing and reading are allowed for the register group in the CAN controller and the restriction mode wherein writing and reading are restricted for a part of the registers in the register group. The ECU sets a predetermined period from activation corresponding to the full control mode, and switches the full control mode to the restriction mode after the predetermined period elapses. After switching to the restriction mode, the ECU will not switch the mode to the full control mode.
    Type: Application
    Filed: May 17, 2016
    Publication date: June 14, 2018
    Inventors: Shinya HONDA, Hiroaki TAKADA, Ryo KURACHI, Hiroshi UEDA
  • Publication number: 20180150428
    Abstract: A data processing device includes a data selector circuit that divides a plurality of types of data into another plurality of types of data in accordance with a classification of the data, a plurality of compression circuits that respectively compress the plurality of types of data in parallel with each other in accordance with each of the plurality of types of data, and a data transmission circuit that transmits the plurality of types of compressed data to a terminal.
    Type: Application
    Filed: January 31, 2018
    Publication date: May 31, 2018
    Inventors: Takahiko SUGIMOTO, Tomohiro UNE, Hiroshi UEDA, Ryoji HASHIMOTO, Toshiyuki KAYA