Patents by Inventor Hiroshi Yuzurihara
Hiroshi Yuzurihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8546902Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.Type: GrantFiled: May 13, 2010Date of Patent: October 1, 2013Assignee: Canon Kabushiki KaishaInventors: Seiichi Tamura, Hiroshi Yuzurihara, Takeshi Ichikawa, Ryuichi Mishima
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Patent number: 8309997Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).Type: GrantFiled: June 30, 2011Date of Patent: November 13, 2012Assignee: Canon Kabushiki KaishaInventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
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Patent number: 8304278Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.Type: GrantFiled: October 14, 2010Date of Patent: November 6, 2012Assignee: Canon Kabushiki KaishaInventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
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Publication number: 20110254065Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).Type: ApplicationFiled: June 30, 2011Publication date: October 20, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
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Patent number: 7994552Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).Type: GrantFiled: March 4, 2008Date of Patent: August 9, 2011Assignee: Canon Kabushiki KaishaInventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
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Patent number: 7977760Abstract: A manufacturing method is provided for a photoelectric conversion device in which no plane channeling is produced. The photoelectric conversion device includes a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate that forms an off-angle ? with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming a semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.Type: GrantFiled: May 5, 2009Date of Patent: July 12, 2011Assignee: Canon Kabushiki KaishaInventors: Seiichi Tamura, Hiroshi Yuzurihara, Shigeru Nishimura, Ryuichi Mishima, Yasushi Nakata
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Publication number: 20110163407Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.Type: ApplicationFiled: March 16, 2011Publication date: July 7, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
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Patent number: 7928486Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.Type: GrantFiled: December 18, 2009Date of Patent: April 19, 2011Assignee: Canon Kabushiki KaishaInventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
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Publication number: 20110027934Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.Type: ApplicationFiled: October 14, 2010Publication date: February 3, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
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Patent number: 7842988Abstract: A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to a gate electrode of an amplifying MOS transistor not through wirings included in a wiring layer. Moreover, a second electroconductor electrically connects a second semiconductor region different from the first semiconductor region to a wiring. In a constitution of that second electroconductor, a third electroconductor arranged in a second hole arranged in the first interlayer insulation layer and a fourth electroconductor arranged in a third hole arranged in the second interlayer insulation layer are stacked and electrically connected to each other.Type: GrantFiled: May 21, 2010Date of Patent: November 30, 2010Assignee: Canon Kabushiki KaishaInventors: Takashi Okagawa, Hiroaki Naruse, Hiroshi Yuzurihara, Shigeru Nishimura, Takeshi Aoki, Yuya Fujino
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Patent number: 7838918Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.Type: GrantFiled: February 6, 2008Date of Patent: November 23, 2010Assignee: Canon Kabushiki KaishaInventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
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Publication number: 20100230728Abstract: A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to a gate electrode of an amplifying MOS transistor not through wirings included in a wiring layer. Moreover, a second electroconductor electrically connects a second semiconductor region different from the first semiconductor region to a wiring. In a constitution of that second electroconductor, a third electroconductor arranged in a second hole arranged in the first interlayer insulation layer and a fourth electroconductor arranged in a third hole arranged in the second interlayer insulation layer are stacked and electrically connected to each other.Type: ApplicationFiled: May 21, 2010Publication date: September 16, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Takashi Okagawa, Hiroaki Naruse, Hiroshi Yuzurihara, Shigeru Nishimura, Takeshi Aoki, Yuya Fujino
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Publication number: 20100219497Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.Type: ApplicationFiled: May 13, 2010Publication date: September 2, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Seiichi Tamura, Hiroshi Yuzurihara, Takeshi Ichikawa, Ryuichi Mishima
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Patent number: 7749788Abstract: A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to a gate electrode of an amplifying MOS transistor not through wirings included in a wiring layer. Moreover, a second electroconductor electrically connects a second semiconductor region different from the first semiconductor region to a wiring. In a constitution of that second electroconductor, a third electroconductor arranged in a second hole arranged in the first interlayer insulation layer and a fourth electroconductor arranged in a third hole arranged in the second interlayer insulation layer are stacked and electrically connected to each other.Type: GrantFiled: August 17, 2007Date of Patent: July 6, 2010Assignee: Canon Kabushiki KaishaInventors: Takashi Okagawa, Hiroaki Naruse, Hiroshi Yuzurihara, Shigeru Nishimura, Takeshi Aoki, Yuya Fujino
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Patent number: 7737519Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.Type: GrantFiled: April 27, 2005Date of Patent: June 15, 2010Assignee: Canon Kabushiki KaishaInventors: Seiichi Tamura, Hiroshi Yuzurihara, Takeshi Ichikawa, Ryuichi Mishima
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Patent number: 7709780Abstract: A photoelectric conversion device is configured to include a light receiving region, for converting light to signal charges, and transistors. An insulation film is arranged on a surface of the light receiving region and under gate electrodes of the transistors. A first reflection prevention film of a refractive index higher than that of the insulation film is arranged at least above the light receiving region, to sandwich the insulation film between the first reflection prevention film and the light receiving region, and includes a silicon nitride film. An interlayer insulation film is arranged on the first reflection prevention film, and a second reflection prevention film is laminated between the first reflection prevention film and the interlayer insulation film. At least one of side walls of the gate electrodes of the transistors includes the silicon nitride film and a silicon oxide film arranged between the silicon nitride film and the gate electrodes.Type: GrantFiled: April 29, 2008Date of Patent: May 4, 2010Assignee: Canon Kabushiki KaishaInventors: Shunsuke Inoue, Hiroshi Yuzurihara, Tetsuya Itano
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Publication number: 20100096676Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<Cl.Type: ApplicationFiled: December 18, 2009Publication date: April 22, 2010Applicant: Cannon Kabushiki KaishaInventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
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Patent number: 7679116Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.Type: GrantFiled: December 2, 2008Date of Patent: March 16, 2010Assignee: Canon Kabushiki KaishaInventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
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Publication number: 20090218602Abstract: It is an object of the present invention to provide a manufacturing method of a photoelectric conversion device in which no plane channeling is produced even if ions are injected at a certain elevation angle into a semiconductor substrate surface made of silicon. A manufacturing method of a photoelectric conversion device including a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate, wherein the principal plane has an off-angle forming each angle ? with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming an semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.Type: ApplicationFiled: May 5, 2009Publication date: September 3, 2009Applicant: CANON KABUSHIKI KAISHAInventors: Seiichi Tamura, Hiroshi Yuzurihara, Shigeru Nishimura, Ryuichi Mishima, Yasushi Nakata
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Patent number: 7541211Abstract: It is an object of the present invention to provide a manufacturing method of a photoelectric conversion device in which no plane channeling is produced even if ions are injected at a certain elevation angle into a semiconductor substrate surface made of silicon. A manufacturing method of a photoelectric conversion device including a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate, wherein the principal plane has an off-angle forming each angle ? with at least two planes perpendicular to a reference (1 0 0) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming an semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.Type: GrantFiled: December 28, 2005Date of Patent: June 2, 2009Assignee: Canon Kabushiki KaishaInventors: Seiichi Tamura, Hiroshi Yuzurihara, Shigeru Nishimura, Ryuichi Mishima, Yasushi Nakata