Abstract: In an image pickup device, a step of forming an embedded plug includes a step of forming a connecting hole in the insulation film in which the embedded plug is to be formed, a metal layer deposition step of depositing a metal layer on the insulation film in which the connecting hole is formed, thereby covering an interior of the connecting hole and at least a part of an upper surface of the insulation film in a laminating direction thereof, and a metal layer removing step of polishing the upper surface of the insulation film on which the metal layer is deposited thereby removing the metal layer except for the interior of the connecting hole, an etch-back method performed on the embedded plug in at least an insulation film, and a chemical mechanical polishing method performed on the embedded plug in another insulation film.

Abstract: It is an object of the present invention to provide a manufacturing method of a photoelectric conversion device in which no plane channeling is produced even if ions are injected at a certain elevation angle into a semiconductor substrate surface made of silicon. A manufacturing method of a photoelectric conversion device including a silicon substrate and a photoelectric conversion element on one principal plane of the silicon substrate, wherein the principal plane has an off-angle forming each angle ? with at least two planes perpendicular to a reference (100) plane within a range of 3.5°???4.5°, and an ion injecting direction for forming an semiconductor region constituting the photoelectric conversion element forms an angle ? to a direction perpendicular to the principal plane within a range of 0°<??45°, and further a direction of a projection of the ion injecting direction to the principal plane forms each angle ? with the two plane direction within a range of 0°<?<90°.

Abstract: A semiconductor substrate for forming a pixel area provided surfacially with a plurality of pixels for photoelectric conversion, the semiconductor substrate, including a polysilicon film of a thickness of 0.5-2.0, on a rear surface of the pixel area-bearing surface, and having an oxygen concentration of 1.3-1.5E+18 atom/cm3 (old ASTM).

Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate,voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).

Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.

Abstract: In a photoelectric conversion device having a buried layer in a part of an anode and a cathode of a photodiode, such as a CCD having a sensor structure and a CMOS sensor, well of the same conduction type as the conduction type of the buried layer can be disposed in a peripheral circuit and the potential of each well is independently controlled.

Abstract: A photoelectric conversion device has pixels arranged in an array. Each pixel includes a light receiving region for converting light to signal charges and an insulation film formed on a surface of the light receiving region. Each pixel further includes transistors, including an amplifying transistor for amplifying the signal charges. A reflection prevention film is provided that has a refractive index higher than that of the insulation film and is arranged above the light receiving region, with the insulation film disposed between the reflection prevention film and the light receiving region. Film thicknesses of the insulation film and gate insulation films of the transistors are different from each other.

Abstract: An insulating film is formed on the surface of the base of a semiconductor, and a portion of the insulating film is removed to cause the surface to appear outside. The exposed surface is terminated with hydrogen, and then energy beams are applied to selectively remove the terminating hydrogen. Metal is selectively deposited on the portion terminated with left hydrogen atoms.

Abstract: A pattern forming method comprises subjecting a surface of a semiconductor substrate to a surface treatment for imparting hydrogen atoms, irradiating a desired region of said surface with an energy ray, selectively forming a metal film on a non-irradiated region other than the desired region, and etching said semiconductor substrate using said metal film as a mask.

Abstract: Disclosed is a method of manufacturing semiconductor devices in which a desired pattern having an area size larger than the field size that can be obtained in one exposure process step of an exposure device is formed. The manufacturing method includes the steps of dividing the desired pattern into a plurality of portions, and conducting exposure on the dividing patterns in a joined fashion.

Abstract: A semiconductor device, wherein an electrode wiring, which is in contact with semiconductor layers of mutually different conductive types and serves to connect at least he layers of mutually different conductive types, comprises a first portion principally composed of a component same as the principal component of the semiconductor layers, and a second portion consisting of a metal.

Abstract: An alignment method for a semiconductor device having a conductive thin film on a conductive substrate surface across an insulation film, comprises steps of: forming in the insulation film, at least two apertures exposing the substrate surface therein; selectively depositing a conductive material in the apertures thereby forming a stepped portion in at least one of said apertures; and forming the conductive thin film at least on said insulation film. The alignment is conducted utilizing the stepped portion.

Abstract: An insulated gate type transistor includes a plurality of major electrode regions, a channel region provided between the plurality of major electrode regions, a gate electrode provided on the channel region with a gate insulating film therebetween, and a semiconductor region provided in contact with the channel region, the semiconductor region having the same conductivity type as that of the channel region and a higher impurity concentration than the channel region. The gate electrode has at least two opposing portions. The plurality of major electrode regions are provided on an substrate insulating film. The transistor is activated in a state where the semiconductor region is maintained at a predetermined voltage. A semiconductor device includes a plurality of memory cells, each of which includes the aforementioned insulated gate type transistor and an electrically breakable memory element provided on one of the major electrode regions.

Abstract: A semiconductor device including a field effect transistor has source and drain areas formed on the main surface of a semiconductor substrate and a gate electrode formed on the main surface across a gate insulation film. The gate electrode has a first electrode portion with an electron donating surface and a second electrode portion consisting of metal formed on the first electrode portion.

Abstract: A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

Abstract: A method for manufacturing a mask ROM by first forming a contact hole with a semiconductor within. A surface treatment is then applied to supply by hydrogen atoms to the surface of the semiconductor. The contact hole is selectively irradiated with energy beams so as to produce an irradiated contact hole and a non-irradiated contact hole. In the non-irradiated contact hole a conductive or semiconductor thin film is formed and a circuit formed on the conductive or semiconductor thin film. The circuit and the non-irradiated hole are connected to each other and the irradiated hole and the circuit are insulated from each other.

Abstract: An insulating film is formed on the surface of the base of a semiconductor, and a portion of the insulating film is removed to cause the surface to appear outside. The exposed surface is terminated with hydrogen, and then energy beams are applied to selectively remove the terminating hydrogen. Metal is selectively deposited on the portion terminated with left hydrogen atoms.

Abstract: A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

Abstract: Disclosed is a method of manufacturing semiconductor devices in which a desired pattern having an area size larger than the field size that can be obtained in one exposure process step of an exposure device is formed. The manufacturing method includes the steps of dividing the desired pattern into a plurality of portions, and conducting exposure on the dividing patterns in a joined fashion.

Abstract: A semiconductor device comprises a capacitor consisting of an Al region formed on a semiconductor substrate, an Al oxide film formed on a surface of said Al region, and electrodes opposed to said Al region with interposition of said Al oxide film.