Patents by Inventor Hiroshi Yuzurihara

Hiroshi Yuzurihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090130782
    Abstract: A method is provided for manufacturing a semiconductor device that includes a multilayer wiring structure in which insulating layers and wiring layers each with a plurality of conductor lines are alternately stacked on each other. The method includes steps of forming a first wiring layer on a first insulating layer, detecting a defect in the first wiring layer on the first insulating layer, and determining whether or not the defect is to be irradiated with a focused ion beam, according to a detection result. If it is determined that the defect is to be irradiated, the defect is irradiated with a focused ion beam and then a second insulating layer is formed on the first wiring layer disposed on the first insulating layer. If it is determined that the defect is not to be irradiated with a focused ion beam, the second insulating layer is formed on the first wiring layer disposed on the first insulating layer without irradiating the defect.
    Type: Application
    Filed: November 7, 2008
    Publication date: May 21, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masatsugu Itahashi, Kouhei Hashimoto, Nobuhiko Sato, Seiichi Tamura, Hiroshi Yuzurihara
  • Publication number: 20090085144
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Application
    Filed: December 2, 2008
    Publication date: April 2, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
  • Patent number: 7476560
    Abstract: In a photoelectric conversion device comprising a photoelectric-conversion section and a peripheral circuit section where signals sent from the photoelectric-conversion section are processed, the both sections being provided on the same semiconductor substrate, a semiconductor compound layer of a high-melting point metal is provided on the source and drain and a gate electrode of an MOS transistor that forms the peripheral circuit section, and the top surface of a semiconductor diffusion layer that serves as a light-receiving part of the photoelectric conversion section is in contact with an insulating layer.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: January 13, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Yuzurihara
  • Patent number: 7473948
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: January 6, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Publication number: 20080230685
    Abstract: A photoelectric conversion device is configured to include a light receiving region, for converting light to signal charges, and transistors. An insulation film is arranged on a surface of the light receiving region and under gate electrodes of the transistors. A first reflection prevention film of a refractive index higher than that of the insulation film is arranged at least above the light receiving region, to sandwich the insulation film between the first reflection prevention film and the light receiving region, and includes a silicon nitride film. An interlayer insulation film is arranged on the first reflection prevention film, and a second reflection prevention film is laminated between the first reflection prevention film and the interlayer insulation film. At least one of side walls of the gate electrodes of the transistors includes the silicon nitride film and a silicon oxide film arranged between the silicon nitride film and the gate electrodes.
    Type: Application
    Filed: April 29, 2008
    Publication date: September 25, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Shunsuke Inoue, Hiroshi Yuzurihara, Tetsuya Itano
  • Publication number: 20080203450
    Abstract: A photoelectric conversion apparatus includes: a first interlayer insulation film disposed on a semiconductor substrate; a first plug disposed in a first hole in the first interlayer insulation film, and serving to electrically connect between a plurality of active regions disposed in the semiconductor substrate, between gate electrodes of a plurality of MOS transistors, or between the active region and the gate electrode of the MOS transistor, not through the wiring of the wiring layer; and a second plug disposed in a second hole in the first interlayer insulation film, the second plug being electrically connected to the active region, wherein a wiring arranged over the second plug and closest to the second plug is electrically connected to the second plug, and the wiring electrically connected to the second plug forms a portion of dual damascene structure. By such a structure, incidence efficiency of light onto a photoelectric conversion element can be improved.
    Type: Application
    Filed: February 6, 2008
    Publication date: August 28, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroaki Naruse, Takashi Okagawa, Ryuichi Mishima, Nobuhiko Sato, Hiroshi Yuzurihara
  • Publication number: 20080157153
    Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).
    Type: Application
    Filed: March 4, 2008
    Publication date: July 3, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
  • Patent number: 7393715
    Abstract: In an image pickup device, a step of forming an embedded plug includes a step of forming a connecting hole in the insulation film in which the embedded plug is to be formed, a metal layer deposition step of depositing a metal layer on the insulation film in which the connecting hole is formed, thereby covering an interior of the connecting hole and at least a part of an upper surface of the insulation film in a laminating direction thereof, and a metal layer removing step of polishing the upper surface of the insulation film on which the metal layer is deposited thereby removing the metal layer except for the interior of the connecting hole, an etch-back method performed on the embedded plug in at least an insulation film, and a chemical mechanical polishing method performed on the embedded plug in another insulation film.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: July 1, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichi Tazoe, Sakae Hashimoto, Akira Ohtani, Hiroshi Yuzurihara
  • Patent number: 7387952
    Abstract: A semiconductor substrate for forming a pixel area provided surfacially with a plurality of pixels for photoelectric conversion, the semiconductor substrate, including a polysilicon film of a thickness of 0.5-2.0, on a rear surface of the pixel area-bearing surface, and having an oxygen concentration of 1.3-1.5E+18 atom/cm3 (old ASTM).
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: June 17, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigeru Nishimura, Seiichi Tamura, Hiroshi Yuzurihara
  • Patent number: 7385172
    Abstract: A photoelectric conversion device is provided, in which pixels are arranged in an array. Each of the pixels includes a light receiving region, transistors, and an insulation film. The insulation film is arranged on a surface of the light receiving region and under gate electrodes of the transistors. A reflection prevention film is arranged at least above the light receiving region, with the insulation film being arranged between the reflection prevention film and the light receiving region, and has a silicon nitride film. An interlayer insulation film is arranged on the reflection prevention film, and a second reflection prevention film is laminated between the reflection prevention film and the interlayer insulation film.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: June 10, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shunsuke Inoue, Hiroshi Yuzurihara, Tetsuya Itano
  • Patent number: 7365380
    Abstract: An object of the present invention is to provide a photoelectric conversion device, wherein improvement of charge transfer properties when charge is output from a charge storage region and suppression of dark current generation during charge storage are compatible with each other. This object is achieved by forming a depletion voltage of a charge storage region in the range from zero to one half of a power source voltage (V), forming a gate voltage of a transfer MOS transistor during a charge transfer period in the range from one half of the power source voltage to the power source voltage (V) and forming a gate,voltage of the transfer MOS transistor during a charge storage period in the range from minus one half of the power source voltage to zero (V).
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: April 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Seiichi Tamura, Ryuichi Mishima
  • Publication number: 20080073737
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Application
    Filed: November 16, 2007
    Publication date: March 27, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroshi YUZURIHARA, Ryuichi MISHIMA, Takanori WATANABE, Takeshi ICHIKAWA, Seiichi TAMURA
  • Publication number: 20080070341
    Abstract: In a photoelectric conversion device comprising a photoelectric-conversion section and a peripheral circuit section where signals sent from the photoelectric-conversion section are processed, the both sections being provided on the same semiconductor substrate, a semiconductor compound layer of a high-melting point metal is provided on the source and drain and a gate electrode of an MOS transistor that forms the peripheral circuit section, and the top surface of a semiconductor diffusion layer that serves as a light-receiving part of the photoelectric conversion section is in contact with an insulating layer.
    Type: Application
    Filed: November 16, 2007
    Publication date: March 20, 2008
    Applicant: Canon Kabushiki Kaisha
    Inventor: Hiroshi Yuzurihara
  • Patent number: 7342269
    Abstract: In a photoelectric conversion device comprising a photoelectric-conversion section and a peripheral circuit section where signals sent from the photoelectric-conversion section are processed, the both sections being provided on the same semiconductor substrate, a semiconductor compound layer of a high-melting point metal is provided on the source and drain and a gate electrode of an MOS transistor that forms the peripheral circuit section, and the top surface of a semiconductor diffusion layer that serves as a light-receiving part of the photoelectric conversion section is in contact with an insulating layer.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: March 11, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Yuzurihara
  • Publication number: 20080057615
    Abstract: A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to a gate electrode of an amplifying MOS transistor not through wirings included in a wiring layer. Moreover, a second electroconductor electrically connects a second semiconductor region different from the first semiconductor region to a wiring. In a constitution of that second electroconductor, a third electroconductor arranged in a second hole arranged in the first interlayer insulation layer and a fourth electroconductor arranged in a third hole arranged in the second interlayer insulation layer are stacked and electrically connected to each other.
    Type: Application
    Filed: August 17, 2007
    Publication date: March 6, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takashi Okagawa, Hiroaki Naruse, Hiroshi Yuzurihara, Shigeru Nishimura, Takeshi Aoki, Yuya Fujino
  • Publication number: 20080036019
    Abstract: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same substrate, comprising: a first semiconductor region of a first conductivity type for forming the photoelectric region, the first semiconductor region being formed in a second semiconductor region of a second conductivity type; and a third semiconductor region of the first conductivity type and a fourth semiconductor region of the second conductivity type for forming the peripheral circuit, the third and fourth semiconductor regions being formed in the second semiconductor region; wherein in that the impurity concentration of the first semiconductor region is higher than the impurity concentration of the third semiconductor region.
    Type: Application
    Filed: April 27, 2005
    Publication date: February 14, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Seiichi Tamura, Hiroshi Yuzurihara, Takeshi Ichikawa, Ryuichi Mishima
  • Patent number: 7323731
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: January 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Patent number: 7247899
    Abstract: In a photoelectric conversion device having a buried layer in a part of an anode and a cathode of a photodiode, such as a CCD having a sensor structure and a CMOS sensor, well of the same conduction type as the conduction type of the buried layer can be disposed in a peripheral circuit and the potential of each well is independently controlled.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: July 24, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideshi Kuwabara, Hiroshi Yuzurihara, Takayuki Kimura, Mahito Shinohara
  • Publication number: 20070018080
    Abstract: A photoelectric conversion device has pixels arranged in an array. Each pixel includes a light receiving region for converting light to signal charges and an insulation film formed on a surface of the light receiving region. Each pixel further includes transistors, including an amplifying transistor for amplifying the signal charges. A reflection prevention film is provided that has a refractive index higher than that of the insulation film and is arranged above the light receiving region, with the insulation film disposed between the reflection prevention film and the light receiving region. Film thicknesses of the insulation film and gate insulation films of the transistors are different from each other.
    Type: Application
    Filed: September 27, 2006
    Publication date: January 25, 2007
    Applicant: Canon Kabushiki Kaisha
    Inventors: Shunsuke Inoue, Hiroshi Yuzurihara, Tetsuya Itano
  • Patent number: 7126102
    Abstract: A photoelectric conversion device has pixels arranged in an array. Each pixel includes a light receiving region for converting light to signal charges and an insulation film formed on a surface of the light receiving region. Each pixel further includes transistors, including an amplifying transistor for amplifying the signal charges. A reflection prevention film is provided that has a refractive index higher than that of the insulation film and is arranged above the light receiving region, with the insulation film disposed between the reflection prevention film and the light receiving region. Film thicknesses of the insulation film and gate insulation films of the transistors are different from each other.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: October 24, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shunsuke Inoue, Hiroshi Yuzurihara, Tetsuya Itano