Patents by Inventor Hiroyuki Nakamura

Hiroyuki Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210012977
    Abstract: A DC high-voltage relay including at least one contact pair including a movable contact and a fixed contact, having a contact force and/or opening force of 100 gf or more, the DC high-voltage relay of 48 V or more. The movable contact and/or the fixed contact includes Ag oxide-based contact material. Metal components in the contact material includes at least one metal M essentially containing Sn, and a balance including Ag and inevitable impurity metals. The content of the metal M is 0.2% by mass or more and 8% by mass or less based on the total mass of all metal components in the contact material. The contact material has a material structure in which one or more oxides of the metal M are dispersed in a matrix including Ag or a Ag alloy. As metal M, In, Bi, Ni and Te can be added.
    Type: Application
    Filed: March 12, 2019
    Publication date: January 14, 2021
    Applicant: TANAKA KIKINZOKU KOGYO K.K.
    Inventors: Sachihiro NISHIDE, Tetsuya NAKAMURA, Hiroyuki ITAKURA, Nobuhito YANAGIHARA
  • Publication number: 20210002480
    Abstract: A resin composition is used which contains a maleimide compound represented by the following Formula (1), a modified polyphenylene ether compound of which a terminal is modified with a substituent having a carbon-carbon unsaturated double bond, and a crosslinking agent containing an allyl compound. In Formula (1), s represents 1 to 5 and RA, RB, RC, and RD each independently represent a hydrogen atom, an alkyl group having 1 to 5 carbon atoms, or a phenyl group.
    Type: Application
    Filed: December 18, 2018
    Publication date: January 7, 2021
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kenichi TOSHIMITSU, Yoshihiko NAKAMURA, Hiroyuki FUJISAWA, Yuuji TUMURAYA, Akihiro YAMAUCHI, Takashi SHINPO
  • Patent number: 10886202
    Abstract: Provided is a semiconductor device capable of having simple wiring in mounting the semiconductor device. The semiconductor device includes at least one P-terminal, at least one N-terminal, a power output terminal, at least one power supply terminal, at least one ground (GND) terminal, at least one control terminal, and a package that is rectangular in a plan view and accommodates an insulated gate bipolar transistor (IGBT) being a high-side switching element, an IGBT being a low-side switching element, and a control circuit. The at least one control terminal is disposed on a first side of the package, opposite to a second side on which the power output terminal is disposed. The at least one P-terminal, the at least one N-terminal, the at least one power supply terminal, and the at least one GND terminal are disposed on a third side of the package, orthogonal to the second side.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: January 5, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Nakamura
  • Publication number: 20200407660
    Abstract: A lubricating oil composition for a push-belt continuously variable transmission includes: (A) a lubricant base oil including at least one wax-isomerized base oil, and having a specific kinematic viscosity and a specific viscosity index; (B) a poly(meth)acrylate having a specific weight average molecular weight; (C) a boron-containing succinimide compound; (D) a borate ester compound; and (E) an overbased calcium detergent, wherein the composition has a kinematic viscosity at 40° C. of no more than 25 mm2/s; a viscosity index of no less than 180; and the ratio of a boron content to a calcium content of 0.5 to 1.5.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 31, 2020
    Applicants: ENEOS Corporation, HONDA MOTOR Co., Ltd.
    Inventors: Hitoshi KOMATSUBARA, Shingo MATSUKI, Toshitaka NAKAMURA, Hiroyuki CHINEN, Yuji MATSUI, Kosei KASHIMA, Yosuke WATANABE, Makito NAKASONE
  • Patent number: 10877163
    Abstract: The purpose is to easily achieve verification of an integrated attitude angle based on an inertial sensor. An attitude angle calculating device may include an integrated attitude angle calculating module, a reverse-calculated value calculating module, a reference value calculating module, and a determining module. The integrated attitude angle calculating module may calculate an integrated attitude angle using an output of the inertial sensor and a positioning signal. The reverse-calculated value calculating module may reverse calculate, using the integrated attitude angle, a physical quantity obtained based on the positioning signal that is used for calculating the integrated attitude angle. The reference value calculating module may calculate a reference physical quantity corresponding to the reverse-calculated physical quantity, based on an observation value of the positioning signal.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: December 29, 2020
    Assignee: Furuno Electric Co., Ltd.
    Inventors: Hiraku Nakamura, Naomi Fujisawa, Hiroyuki Toda
  • Patent number: 10873311
    Abstract: An acoustic resonator that prevents a radio frequency (RF) signal from being coupled to a cap substrate. An electronic device includes a first substrate (device substrate) of piezoelectric material having a top surface on which an electronic circuit including a film bulk acoustic resonator is formed, a second substrate (cap substrate) of low-resistivity material, a bottom surface of which is disposed opposing the top surface of the first substrate, and a side wall disposed between the top surface of the first substrate and the bottom surface of the second substrate. The side wall defines a cavity together with the top surface of the first substrate and the bottom surface of the second substrate, the cavity internally including the electronic circuit. A thin film of high-resistivity material is formed on at least a portion of the bottom surface of the second substrate to prevent an RF signal emitted from the electronic circuit from being coupled to the second substrate.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: December 22, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Yoshiaki Ando, Satoshi Niwa, Hiroyuki Nakamura
  • Publication number: 20200391732
    Abstract: Engine braking is stabilized so that a saddled vehicle can be decelerated smoothly In a saddled vehicle including an engine including an electronic throttle valve mechanism that drives an air intake throttle valve via an actuator, and a first control unit that controls the engine, the first control unit has an engine braking controller that controls the throttle valve so as to generate a force that offsets the engine braking of the engine when the vehicle is decelerated.
    Type: Application
    Filed: December 21, 2018
    Publication date: December 17, 2020
    Inventors: Hiroyuki Kaneta, Chikashi Iizuka, Chihiro Iida, Hironori Nakamura
  • Publication number: 20200393574
    Abstract: The device and method can calculate an absolute spatial relationship between a device and other characteristic points etc. with high precision by using VSLAM. A navigation device includes a VSLAM calculating module, a GNSS rate calculating module, and a scale correction value calculating module. The GNSS rate calculating module calculates a GNSS rate based on one of an amount of change in a phase of a GNSS signal and an amount of change in a frequency of the GNSS signal. The VSLAM calculating module estimates VSLAM locations at a plurality of time points based on a VSLAM calculation using a video image. The scale correction value calculating module calculates a scale correction value for the VSLAM location based on the VSLAM locations at two or more time points of the plurality of time points estimated by the VSLAM calculating module, and the GNSS rate.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 17, 2020
    Applicant: Furuno Electric Co., Ltd.
    Inventors: Hiraku NAKAMURA, Hiroyuki TODA, Tatsuya SONOBE, Naomi FUJISAWA
  • Publication number: 20200388608
    Abstract: A semiconductor device 1 has an IGBT region and a MOSFET region. A plurality of channel doped P layers formed in the MOSFET region include a trench-adjacent channel doped P layer whose side surface is in contact with a boundary trench gate formed between the IGBT region and the MOSFET region. A formation depth of the trench-adjacent channel doped P layer is set deeper than a formation depth of the boundary trench gate. In the MOSFET region, an N type MOSFET having a planar structure is configured including a channel region in the channel doped P layer, a gate insulating film in an interlayer oxide film, and a gate polysilicon serving as a planar gate.
    Type: Application
    Filed: February 14, 2020
    Publication date: December 10, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazutoyo TAKANO, Hiroyuki NAKAMURA
  • Patent number: 10861898
    Abstract: An imaging device according to an embodiment of the present invention includes a photoelectric conversion part that converts incident light into electric charge, and a detection part that detects the electric charge generated in the photoelectric conversion part. The photoelectric conversion part includes a plurality of photodiodes arranged in a matrix, and the detection part includes a plurality of thin film transistors provided corresponding to the plurality of photodiodes and arranged in a matrix. Each of the photodiodes includes a lower electrode, a semiconductor layer, and an upper electrode, and an insulating layer is provided between at least a portion of the lower electrode in the thickness direction and the semiconductor layer in the peripheral portion of the semiconductor layer. An end of the insulating layer has a tapered shape having an acute angle between the lower surface and the side surface of the insulating layer.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: December 8, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Rikiya Takita, Wataru Nakamura, Fumiki Nakano, Kazuhide Tomiyasu, Makoto Nakazawa, Hiroyuki Moriwaki
  • Publication number: 20200376857
    Abstract: A liquid ejecting apparatus including a transporting portion that transports a medium along a transport path, a liquid ejecting head that performs recording by ejecting, through a nozzle, a liquid onto the medium that is being transported, a mounting portion in which a liquid storage portion that stores the liquid supplied to the liquid ejecting head is mounted, and a heating portion that heats the medium on which the recording has been performed. The transport path includes an upper path positioned above the mounting portion in a vertical direction. After transporting and passing the medium, on which the recording has been performed, through the upper path, the transporting portion discharges the medium through a discharge port. The heating portion is provided above the mounting portion in the vertical direction and heats the medium transported through the upper path.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 3, 2020
    Inventors: Hiroyuki NAKAMURA, Izumi NOZAWA
  • Publication number: 20200373920
    Abstract: Provided is a semiconductor device capable of suppressing increase in size of a package and adjusting an amount of negative feedback. A power module as a semiconductor device includes an IGBT which is a switching element and a free wheel diode (FWD) parallelly connected to the switching element. The IGBT has, on a surface thereof, an emitter electrode and a gate electrode of the IGBT and a conductive pattern insulated from the emitter electrode and the gate electrode. The FWD has, on a surface thereof, an anode electrode of the FWD and a conductive pattern insulated from the anode electrode.
    Type: Application
    Filed: February 18, 2020
    Publication date: November 26, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Hiroyuki NAKAMURA
  • Patent number: 10847489
    Abstract: A first wire has a first contact connected to a first semiconductor element, and a second contact connected to a second semiconductor element. A second wire has a third contact connected to the first semiconductor element and a fourth contact connected to the second semiconductor element. A first linear portion between the first contact and the second contact of the first wire has an undulation. A second linear portion between the third contact and the fourth contact of the second wire has an undulation. A first top portion of the first linear portion is adjacent to a second top portion of the second linear portion. An interval between the first top portion and the second top portion is narrower than an interval between the first contact and the third contact. The interval between the first top portion and the second top portion is narrower than an interval between the second contact and the fourth contact.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: November 24, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Nakamura
  • Patent number: 10848923
    Abstract: A user location information detection and tracking system includes an IC tag that a user can carry, a user terminal configured to receive identification information outputted from the IC tag, a magnetic field device configured to form a magnetic field in a predetermined area, and a managing device communicably connected to the user terminal. The IC tag outputs at a predetermined timing, as the identification information, tag ID for identifying the IC tag, in response to detection of the magnetic field formed by the magnetic field device, the IC tag outputs, as the identification information, magnetic field identification information for identifying the magnetic field, and in response to the identification information received from the IC tag, the user terminal sends the identification information to the managing device.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: November 24, 2020
    Assignee: NOMURA RESEARCH INSTITUTE, LTD.
    Inventors: Motoki Suzuki, Taro Morioka, Akira Arai, Hiroyuki Nakamura
  • Publication number: 20200361883
    Abstract: The present disclosure relates to novel crystalline forms of sulfonamide compounds, pharmaceutical compositions containing the crystalline form compounds and methods of preparing and using the same.
    Type: Application
    Filed: November 28, 2018
    Publication date: November 19, 2020
    Applicant: Taiho Pharmaceutical Co., Ltd.
    Inventors: Hiroyuki Nakamura, Jing Teng, Nathan Gignac
  • Patent number: 10838315
    Abstract: An electrophotographic photosensitive member having a protective layer wherein the density unevenness among output images is reduced with abrasion resistance maintained is provided. The present invention is an electrophotographic photosensitive member having a support, a photosensitive layer and a protective layer in this order, wherein the protective layer has a triarylamine structure and a cyclic structure represented by the formula (1) or (2): and an A value expressed by expression (4), A=S1/S2, wherein, in expression (4), S1 is a peak area based on in-plane deformation vibration of terminal olefin (CH2?), and S2 is a peak area based on stretching vibration of C?O among peak areas of a spectrum obtained by measuring a surface of the protective layer by total reflection Fourier transform infrared spectroscopy using Ge as an internal reflection element and using a measurement condition of 45° as an incidence angle is from 0.065 to 0.100.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 17, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideharu Shimozawa, Tsutomu Nishida, Atsushi Okuda, Yuka Ishiduka, Nobuhiro Nakamura, Hiroyuki Watanabe
  • Patent number: 10840202
    Abstract: A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: November 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Toyohiro Aoki, Takashi Hisada, Hiroyuki Mori, Eiji Nakamura, Yasumitsu Orii
  • Publication number: 20200353447
    Abstract: Provided is, for example, an exhaust gas-purifying three-way catalyst which is suppressed in particle growth due to sintering of a catalytically active component on a carrier in exposure to a high temperature and thus is enhanced in purification performance, and a method for producing the same, as well as an integral structure type exhaust gas-purifying catalyst using the same. The exhaust gas-purifying three-way catalyst of the present invention includes a composite particle which contains a base material particle having a pore size of 100 to 650 nm as measured by a mercury intrusion method and a catalytically active particle of a platinum group element supported on the base material particle, in which a content proportion of the catalytically active particle is 0.001 to 30% by mass in total in terms of metal of the platinum group element, based on a total amount of the composite particle.
    Type: Application
    Filed: January 28, 2019
    Publication date: November 12, 2020
    Applicant: N.E. CHEMCAT Corporation
    Inventors: Hiroyuki HARA, Yuki TOYA, Hiroki NAKAYAMA, Takumi NAKAMURA
  • Patent number: 10831118
    Abstract: A method for producing an electrophotographic photosensitive member having a photosensitive layer and a protective layer above a support in this order includes: forming a coating film for a protective layer by coating a coating liquid for the protective layer for forming the protective layer on the photosensitive layer and curing the coating film for the protective layer, in which the coating liquid for the protective layer contains a solvent, a compound represented by a general formula (1), a compound represented by a general formula (2), and a compound represented by a general formula (3) at a specific ratio. In addition, in an electrophotographic photosensitive member having a photosensitive layer and a protective layer above a support in this order, the protective layer is obtained by curing a coating liquid for the protective layer.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: November 10, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hiroyuki Watanabe, Tsutomu Nishida, Yuka Ishiduka, Atsushi Okuda, Hideharu Shimozawa, Nobuhiro Nakamura, Koichi Nakata, Haruki Mori, Kenichi Kaku
  • Patent number: 10832099
    Abstract: There is provided a display control system including a plurality of display units, an imaging unit configured to capture a subject, a predictor configured to predict an action of the subject according to a captured image captured by the imaging unit, a guide image generator configured to generate a guide image that guides the subject according to a prediction result from the predictor, and a display controller configured to, on the basis of the prediction result from the predictor, select a display unit capable of displaying an image at a position corresponding to the subject from the plurality of display units, and to control the selected display unit to display the guide image at the position corresponding to the subject.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: November 10, 2020
    Assignee: Sony Corporation
    Inventors: Kazuhiro Watanabe, Yoichiro Sako, Akira Tange, Kazuyuki Sakoda, Kohei Asada, Takatoshi Nakamura, Mitsuru Takehara, Yasunori Kamada, Takayasu Kon, Kazunori Hayashi, Hiroyuki Hanaya, Yuki Koga, Tomoya Onuma