Patents by Inventor Hiroyuki Nakamura

Hiroyuki Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11340089
    Abstract: Information related to a vehicle can be displayed by projecting an image based on the information on a road surface or the like. An image projection apparatus that projects an image includes: a sensor unit that acquires information related to a vehicle; and an image projection unit that projects the image based on the information acquired by the sensor unit.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: May 24, 2022
    Assignee: MAXELL, LTD.
    Inventors: Yasuhiko Kunii, Takuya Shimizu, Hiroyuki Nakamura, Nobuyuki Kaku
  • Publication number: 20220154138
    Abstract: There are provided a method of producing a placenta-like organoid that can be subjected to long-term culture, a placenta-like organoid that is produced by the above producing method, and a production or test kit that contains the above placenta-like organoid. The method of producing a placenta-like organoid includes subjecting a pluripotent stem cell to suspension culture in the presence of a bone morphogenetic protein BMP4.
    Type: Application
    Filed: November 19, 2021
    Publication date: May 19, 2022
    Applicant: FUJIFILM Corporation
    Inventors: Koji MURAYA, Hidenori AKUTSU, Hiroyuki NAKAMURA, Tomoyuki KAWASAKI
  • Publication number: 20220148937
    Abstract: A semiconductor device includes: a package to seal a semiconductor element; a lead frame having one end portion connected to the semiconductor element and the other end portion protruding from a side surface of the package; a plurality of threaded holes formed in the package to enable the package to be fixed to the substrate; and a resin part capable of closing each of the plurality of threaded holes. A type name of the semiconductor device is represented by open and closed states of the respective threaded holes.
    Type: Application
    Filed: September 10, 2021
    Publication date: May 12, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Mamoru TOGAMI, Toshitaka SEKINE, Teruaki NAGAHARA, Hiroyuki NAKAMURA, Kazuhiro KAWAHARA, Kosuke YAMAGUCHI, Shota O
  • Publication number: 20220144884
    Abstract: A method for producing an amide, including mixing a first composition containing a carboxylic acid or a carboxylic acid active species, and an organic solvent and a second composition containing an amine having at least one carboxyl group and water and causing the carboxylic acid or the carboxylic acid active species to react with the amine to obtain an amide.
    Type: Application
    Filed: February 3, 2020
    Publication date: May 12, 2022
    Inventors: Shinichiro FUSE, Koshiro MASUDA, Yuma OTAKE, Hiroyuki NAKAMURA
  • Patent number: 11323041
    Abstract: A higher-current device is implemented by increasing cross-sectional areas of terminals while securing solderability during mounting. The device makes securing of a creepage distance between terminals compatible with a reduction in package size. A semiconductor device 1 is provided with a package 2, a semiconductor circuit 3, a control circuit 6, a plurality of main terminals 7 and control terminals 8. Each main terminal 7 is configured of a plurality of subterminals S1, S2 and S3 arranged at mutually neighboring positions and projecting from the package 2. Distal end portions of the subterminals S1, S2 and S3 making up the same main terminal 7 are bent toward a mounting surface on which the semiconductor device 1 is mounted and the bending positions of the subterminals S1, S2 and S3 are configured to differ between the mutually neighboring subterminals S1 and S2, and subterminals S2 and S3.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: May 3, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Nakamura
  • Publication number: 20220121048
    Abstract: Based on information about a vehicle, the information can be projected and displayed onto a road surface or the like. An image projection apparatus, which projects an image, includes an acquisition unit that acquires the information about the vehicle, and an image projection unit that projects the image based on the information acquired by the acquisition unit.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Inventors: Yasuhiko KUNII, Nobuyuki KAKU, Masahiro KISHIGAMI, Hiroyuki NAKAMURA, Megumi KURACHI, Takuya SHIMIZU
  • Publication number: 20220123712
    Abstract: An acoustic wave device that includes a spinel layer, a piezoelectric layer and an interdigital transducer electrode on the piezoelectric layer is disclosed. The piezoelectric layer is disposed between the interdigital transducer electrode and the spinel layer. The acoustic wave device is configured to generate an acoustic wave having a wavelength of ?. The piezoelectric layer can have a thickness than is less than A. In some embodiments, the acoustic wave device can include a temperature compensating layer that is disposed between the piezoelectric layer and the spinel layer.
    Type: Application
    Filed: December 29, 2021
    Publication date: April 21, 2022
    Inventors: Gong Bin Tang, Rei Goto, Hiroyuki Nakamura, Keiichi Maki
  • Publication number: 20220118902
    Abstract: Information related to a vehicle can be displayed by projecting an image based on the information on a road surface or the like. An image projection apparatus that projects an image includes: an acquisition unit that acquires information to be displayed; and an image projection unit that projects the image based on the information to be displayed acquired by the acquisition unit.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Inventors: Yasuhiko KUNII, Nobuyuki KAKU, Toshinori SUGIYAMA, Hiroyuki NAKAMURA, Hiroshi CHIBA, Masahiro KISHIGAMI, Hiroyuki KAJIKAWA, Chohei ONO, Megumi KURACHI, Noriaki HARADA
  • Publication number: 20220119463
    Abstract: The present invention relates to a modified fibroin including a domain sequence represented by Formula 1: [(A)n motif-REP]m or Formula 2: [(A)n motif-REP]m-(A)n motif, and having a serine residue content rate of less than 5.5%. [In Formula 1 and Formula 2, the (A)n motif represents an amino acid sequence consisting of 4 to 27 amino acid residues, and the number of alanine residues with respect to the total number of amino acid residues in the (A)n motif is 80% or more. REP represents an amino acid sequence consisting of 10 to 200 amino acid residues. m represents an integer of 10 to 300. The plurality of (A)n motifs may be the same amino acid sequence or different amino acid sequences. A plurality of REPs may be the same amino acid sequence or different amino acid sequences.
    Type: Application
    Filed: January 9, 2020
    Publication date: April 21, 2022
    Inventors: Keisuke MORITA, Yunosuke ABE, Hiroyuki NAKAMURA, Shota TOGASHI, Tetsuo ASAKURA
  • Patent number: 11307551
    Abstract: The invention provides, methods, systems and computer program products that enable generation of executable sequential function charts, for subsequent retrieval and implementation by a process control system. In an embodiment, generating an executable sequential function chart comprises (i) receiving equipment selection data representing a selected equipment for implementing operating functions within a sequence flow, (ii) receiving operation data representing a set of operating functions intended to be implemented by the selected equipment, (iii) assigning values to one or more configuration parameters, (iv) receiving control statement data representing a set of control statements intended to be implemented for process flow control during implementation of the set of operating functions, (v) assigning values to one or more control statement configuration parameters, and generating machine readable SEBOL program code for implementing the set of operating functions.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: April 19, 2022
    Assignee: YOKOGAWA ELECTRIC CORPORATION
    Inventors: Daisuke Yasunami, Yi Ee Loke, Maricel Mercurio Bacacao, Archie Sambitan Orido, Max Jisong Zhang, Wilfred Woon Yew Teo, Hiroyuki Nakamura, Tadateru Ohkawara, Keiko Yuasa
  • Publication number: 20220102250
    Abstract: According to the present disclosure, a method of manufacturing a semiconductor device includes the steps of (a) preparing a lead frame including a switching element die pad, a control element die pad, and a third-side side rail portion, (b) mounting a switching element and a diode element on the switching element die pad and mounting a control element configured to control the switching element on the control element die pad, (c) sealing the switching element, the diode element, and the control element with a mold resin such that the power side terminal, the control side terminal, and a part of the third-side side rail portion protrude outward, and (d) forming a third-side side rail terminal by cutting the third-side side rail portion, the third-side side rail terminal extending from a part of the third-side side rail portion.
    Type: Application
    Filed: July 6, 2021
    Publication date: March 31, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shuhei YOKOYAMA, Hiroyuki NAKAMURA
  • Patent number: 11265056
    Abstract: A radio communication system includes a transmitting station, and at least one receiving apparatus.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: March 1, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hayato Fukuzono, Keita Kuriyama, Toshio Ito, Shuta Ueno, Masafumi Yoshioka, Tsutomu Tatsuta, Hiroyuki Nakamura
  • Patent number: 11264312
    Abstract: An object of the present invention is to achieve both securing an insulation distance and securing a chip mounting area in a non-insulated power module. A non-insulated power module includes a plurality of die pads, a plurality of semiconductor chips mounted on upper surfaces of the plurality of die pads, and a package sealing the semiconductor chips, in which lower surfaces of the plurality of die pads are exposed from a lower surface of the package, on the lower surface of the package, first grooves are formed in areas between the plurality of die pads, and the plurality of die pads have a trapezoidal cross-sectional shape in the thickness direction, in which an area of an upper surface is larger than an area of the lower surface.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: March 1, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Nakamura
  • Patent number: 11260664
    Abstract: A liquid ejecting apparatus including a transporting portion that transports a medium along a transport path, a liquid ejecting head that performs recording by ejecting, through a nozzle, a liquid onto the medium that is being transported, a mounting portion in which a liquid storage portion that stores the liquid supplied to the liquid ejecting head is mounted, and a heating portion that heats the medium on which the recording has been performed. The transport path includes an upper path positioned above the mounting portion in a vertical direction. After transporting and passing the medium, on which the recording has been performed, through the upper path, the transporting portion discharges the medium through a discharge port. The heating portion is provided above the mounting portion in the vertical direction and heats the medium transported through the upper path.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: March 1, 2022
    Assignee: Seiko Epson Corporation
    Inventors: Hiroyuki Nakamura, Izumi Nozawa
  • Publication number: 20220055984
    Abstract: A method for producing an amide includes: subjecting carboxylic acids to dehydration condensation or causing a reaction between a carboxylic acid and a haloformic acid ester; and subsequently causing a reaction with a first base and a reaction with an amine to obtain an amide, wherein the reaction with a first base and/or the reaction with an amine is performed by adding an acid thereto.
    Type: Application
    Filed: December 11, 2019
    Publication date: February 24, 2022
    Inventors: Shinichiro FUSE, Yuma OTAKE, Hiroyuki NAKAMURA
  • Patent number: 11258429
    Abstract: Acoustic wave devices are disclosed. An acoustic wave device can include a first filter and a second filter coupled to a common node. The second filter includes acoustic wave resonators of a first type (e.g., bulk acoustic wave resonators) and a series acoustic wave resonator of the second type (e.g., a surface acoustic wave resonator) that is coupled between the acoustic wave resonators of the first type and the common node. The acoustic wave device can further include a loop circuit coupled to the first filter, in which the loop circuit is configured to generate an anti-phase signal to a target signal at a particular frequency. In certain embodiments, the first filter is a receive filter and the second filter is a transmit filter.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: February 22, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Yoshiaki Ando, Yasuyuki Saito, Hiroyuki Nakamura
  • Patent number: 11256171
    Abstract: A film resist is a member for being bonded to a main surface of a substrate, which main surface is provided with a mark. The film resist includes a cutout for the mark to be checked.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: February 22, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroyuki Nakamura, Shinya Soneda, Shoichi Kuga
  • Patent number: 11251177
    Abstract: A semiconductor device 1 has an IGBT region and a MOSFET region. A plurality of channel doped P layers formed in the MOSFET region include a trench-adjacent channel doped P layer whose side surface is in contact with a boundary trench gate formed between the IGBT region and the MOSFET region. A formation depth of the trench-adjacent channel doped P layer is set deeper than a formation depth of the boundary trench gate. In the MOSFET region, an N type MOSFET having a planar structure is configured including a channel region in the channel doped P layer, a gate insulating film in an interlayer oxide film, and a gate polysilicon serving as a planar gate.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: February 15, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazutoyo Takano, Hiroyuki Nakamura
  • Patent number: 11247605
    Abstract: Information related to a vehicle can be displayed by projecting an image based on the information on a road surface or the like. An image projection apparatus that projects an image includes: an acquisition unit that acquires information to be displayed; and an image projection unit that projects the image based on the information to be displayed acquired by the acquisition unit.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: February 15, 2022
    Assignee: MAXELL, LTD.
    Inventors: Yasuhiko Kunii, Nobuyuki Kaku, Toshinori Sugiyama, Hiroyuki Nakamura, Hiroshi Chiba, Masahiro Kishigami, Hiroyuki Kajikawa, Chohei Ono, Megumi Kurachi, Noriaki Harada
  • Patent number: 11249341
    Abstract: Based on information about a vehicle, the information can be projected and displayed onto a road surface or the like. An image projection apparatus, which projects an image, includes an acquisition unit that acquires the information about the vehicle, and an image projection unit that projects the image based on the information acquired by the acquisition unit.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: February 15, 2022
    Assignee: MAXELL HOLDINGS, LTD.
    Inventors: Yasuhiko Kunii, Nobuyuki Kaku, Masahiro Kishigami, Hiroyuki Nakamura, Megumi Kurachi, Takuya Shimizu