Patents by Inventor Hiroyuki Okuyama

Hiroyuki Okuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040032612
    Abstract: An image forming apparatus has a collating section which collates image information from a scanner with a specific image and determines whether or not there is a same portion, and a line delay section which outputs the image information after delaying the image information in accordance with time spent on collation processing. Because a dedicated memory is unnecessary due to timing between processing of the collation processing section and other processings being coordinated at the line delay section, a large reduction in costs can be realized.
    Type: Application
    Filed: March 20, 2003
    Publication date: February 19, 2004
    Applicant: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Hiroyuki Okuyama
  • Publication number: 20040027615
    Abstract: An image forming apparatus has a region identifying section which receives first image information DATC from a scanner and outputs a first region identifying signal DSCC, a transforming look-up table which receives second image information DATP from a printer controller and attribute information TAG, and transforms them into second identifying information DSCP of a standard common with that of the first region identifying signal by using a transforming table, a high image quality processing section which processes the image information in accordance with these identifying information, and a printer engine which forms an image in accordance with the processed image information. Because the identifying information are common, for example, due to circuits of the high image quality processing section being used in common, a reduction in costs is aimed for.
    Type: Application
    Filed: March 20, 2003
    Publication date: February 12, 2004
    Applicant: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Hiroyuki Okuyama
  • Patent number: 6686611
    Abstract: In a nitride semiconductor of BpAlqGarInsN (0≦p≦1, 0≦q≦1, 0≦r≦1, 0≦s≦1, p+q+r+s=1), in particular a p-type nitride compound semiconductor, a point defect concentration of the p-type semiconductors is set to 1×1019 cm−3 or more. This makes it possible to obtain a high carrier concentration at room temperature.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: February 3, 2004
    Assignee: Sony Corporation
    Inventors: Hiroyuki Okuyama, Hiroshi Nakajima, Fumihiko Nakamura
  • Publication number: 20030183824
    Abstract: In a semiconductor light emitting device configured to extract light through a substrate thereof, an electrode layer is formed on a p-type semiconductor layer (such as p-type GaN layer) formed on an active layer, and a nickel layer is formed as a contact metal layer between the electrode layer and the p-type semiconductor layer and adjusted in thickness not to exceed the intrusion length of light generated in the active layer. Since the nickel layer is sufficiently thin, reflection efficiency can be enhanced.
    Type: Application
    Filed: May 7, 2003
    Publication date: October 2, 2003
    Inventors: Masato Doi, Hiroyuki Okuyama, Goshi Biwa, Toyoharu Oohata
  • Publication number: 20030180977
    Abstract: A semiconductor light emitting device includes a crystal layer formed on a substrate, the crystal layer having a tilt crystal plane tilted from the principal plane of the substrate, and a first conductive type layer, an active layer, and a second conductive type layer, which are formed on the crystal layer in such a manner as to extend within planes parallel to the tilt crystal plane, wherein the device has a shape formed by removing the apex and its vicinity of the stacked layer structure formed on the substrate. Such a semiconductor light emitting device is excellent in luminous efficiency even if the device has a three-dimensional device structure. The present invention also provides a method of fabricating the above semiconductor light emitting device.
    Type: Application
    Filed: January 14, 2003
    Publication date: September 25, 2003
    Inventors: June Suzuki, Hiroyuki Okuyama, Goshi Biwa, Etsuo Morita
  • Patent number: 6623560
    Abstract: A crystal growth method includes forming a mask layer capable of impeding crystal growth on a substrate in such a way a first nitride semiconductor layer has irregularities at a surface thereof exposed at a window region opened at a part of the mask layer, and growing a second nitride semiconductor layer over a region including the surface of the mask layer through crystal growth from the irregularities. Through-type dislocations can be reliably prevented from propagation due to the discontinuity of crystals at the irregularities and also to lateral crystal growth.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: September 23, 2003
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20030168666
    Abstract: A semiconductor light emitting device including an active layer formed on a tilt crystal is provided. The device generates induced emission light by optical pumping, and has an excellent luminous efficiency. The active layer has a multi-quantum well structure including, for example, an InGaN layer as a quantum well. The contents of In and Ga in the InGaN layer satisfy a relation of In/(In+Ga)≧0.9. The device is equivalent to a super luminescent diode, and if having a resonance structure, it becomes a laser diode. In particular, a pyramid type laser diode can be also realized.
    Type: Application
    Filed: January 14, 2003
    Publication date: September 11, 2003
    Inventors: Hiroyuki Okuyama, Goshi Biwa
  • Publication number: 20030141508
    Abstract: A semiconductor light emitting device is fabricated by forming a mask having an opening on a substrate, forming a crystal layer having a tilt crystal plane tilted from the principal plane of the substrate by selective growth from the opening of the mask, and forming, on the crystal layer, a first conductive type layer, an active layer, and a second conductive type layer, which extend within planes parallel to the tilt crystal plane, and removing the mask. The semiconductor light emitting device can be fabricated without increasing fabrication steps while suppressing threading dislocations extending from the substrate side and keeping a desirable crystallinity. The semiconductor light emitting device is also advantageous in that since deposition of polycrystal on the mask is eliminated, an electrode can be easily formed, and that the device structure can be finely cut into chips.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 31, 2003
    Inventors: Hiroyuki Okuyama, Goshi Biwa
  • Publication number: 20030140846
    Abstract: In a selective growth method, growth interruption is performed at the time of selective growth of a crystal layer on a substrate. Even if the thickness distribution of the crystal layer becomes non-uniform at the time of growth of the crystal layer, the non-uniformity of the thickness distribution of the crystal layer can be corrected by inserting the growth interruption. As a result of growth interruption, an etching rate at a thick portion becomes higher than that at a thin portion, to eliminate the difference in thickness between the thick portion and the thin portion, thereby solving the problem associated with degradation of characteristics due to a variation in thickness of the crystal layer, for example, an active layer. The selective growth method is applied to fabrication of a semiconductor light emitting device including an active layer as a crystal layer formed on a crystal layer having a three-dimensional shape by selective growth.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 31, 2003
    Inventors: Goshi Biwa, Hiroyuki Okuyama
  • Publication number: 20030138983
    Abstract: At the time of selective growth of an active layer on a substrate, crystal is previously grown in an active layer non-growth region, and the active layer is grown in an active layer selective growth region. With this configuration, a source supplied to the non-growth region is incorporated in the deposited crystal from the initial stage of growth, so that the supplied amount of the source to the active layer selective growth region is kept nearly at a constant value over the entire period of growth of the active layer, to eliminate degradation of characteristics of the device due to a variation in growth rate of the active layer. In particular, the selective growth method is effective in fabrication of a semiconductor light emitting device including a cladding layer, a guide layer, and an active layer, each of which is formed by selective growth, wherein the active layer has multiple quantum wells.
    Type: Application
    Filed: January 14, 2003
    Publication date: July 24, 2003
    Inventors: Goshi Biwa, Hiroyuki Okuyama
  • Publication number: 20030107047
    Abstract: A semiconductor light-emitting element having a structure that does not complicate a fabrication process, can be formed in high precision and does not invite any degradation of crystallinity is provided. A light-emitting element is formed, which includes a selective crystal growth layer formed by selectively growing a compound semiconductor of a Wurtzite type, and a clad layer of a first conduction type, an active layer and a clad layer of a second conduction type, which are formed on the selective crystal growth layer wherein the active layer is formed so that the active layer extends in parallel to different crystal planes, the active layer is larger in size than a diffusion length of a constituent atom of a mixed crystal, or the active layer has a difference in at least one of a composition and a thickness thereof, thereby forming the active layer having a plurality of light-emitting wavelength region whose emission wavelengths differ from one another.
    Type: Application
    Filed: July 23, 2002
    Publication date: June 12, 2003
    Inventors: Hiroyuki Okuyama, Masato Doi, Goshi Biwa, Toyoharu Oohata
  • Patent number: 6576571
    Abstract: Disclosed herein is a process for vapor phase growth of gallium nitride compound semiconductor which yields uniform crystal layers with good reproducibility. The process comprises forming a first nitride semiconductor layer on a substrate, forming thereon a protective film for crystal growth prevention in such a way that it has partly open window regions through which the first nitride semiconductor layer is exposed, forming a second nitride semiconductor layer by selective growth from the first nitride semiconductor layer at a crystal growth starting temperature, and continuing crystal growth at a temperature higher than the crystal growth starting temperature. The vapor phase growth at a low temperature yields a uniform crystal layer, and the ensuing vapor phase growth at a raised temperature yields a uniform crystal layer with good reproducibility in conformity with the first crystal layer.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: June 10, 2003
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20030053137
    Abstract: An image processing apparatus includes an edge detecting unit which identifies an area of given image data as a gradation sequence area and a character/line art area and which outputs edge information of the character/line art, a level converting unit which generates a strength modulation signal so as to emphasize an edge of the character/line art area, a laser driver which outputs a laser drive signal in order to form a picture dot larger than a standard size in response to the strength modulation signal. Further, according to the present invention, it is possible to print an image with emphasizing an edge portion of a character/line art by a laser printer.
    Type: Application
    Filed: September 19, 2001
    Publication date: March 20, 2003
    Applicant: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Hiroyuki Okuyama
  • Publication number: 20030045042
    Abstract: A first conductive type layer having a band gap energy smaller than that of an under growth layer formed on a substrate is formed by selective growth from an opening portion formed in the under growth layer, and an active layer and a second conductive type layer are stacked on the first conductive type layer, to form a stacked structure. When such a stacked structure for forming a semiconductor device is irradiated with laser beams having an energy value between the band gap energies of the under growth layer and the first conductive type layer, abrasion occurs at a first conductive type layer side interface between the under growth layer and the first conductive type layer, so that the stacked structure is peeled from the substrate and the under growth layer and simultaneously isolated from another stacked structure for forming another semiconductor device.
    Type: Application
    Filed: August 2, 2002
    Publication date: March 6, 2003
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20030017633
    Abstract: Semiconductor light emitting devices and a method of fabricating the semiconductor light emitting devices are provided. The semiconductor light emitting device includes a growth substrate, a first growth layer formed on the growth substrate, a growth obstruction film formed on the first growth layer, and a second growth layer formed by selective growth from an opening portion formed in the growth obstruction film, wherein device isolation trenches for isolating devices from each other are formed in the first growth layer formed on the growth substrate, and the second growth layer is formed by selective growth after formation of the device isolation trenches.
    Type: Application
    Filed: March 6, 2002
    Publication date: January 23, 2003
    Inventors: Masato Doi, Hiroyuki Okuyama, Goshi Biwa, Toyoharu Oohata
  • Publication number: 20020185660
    Abstract: Nitride semiconductor devices and methods of producing same are provided. The present invention includes forming a nitride semiconductor layer on a base body of the nitride semiconductor under selective and controlled crystal growth conditions. For example, the crystal growth rate, the supply of crystal growth source material and/or the crystal growth area can be varied over time, thus resulting in a nitride semiconductor device with enhanced properties.
    Type: Application
    Filed: April 18, 2002
    Publication date: December 12, 2002
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20020175341
    Abstract: Nitride semiconductor devices and methods of producing same are provided. The present invention includes forming an active layer on a substrate by vapor phase growth at a first temperature and forming thereon one or more nitride semiconductor layers at a temperature which is greater from the first temperature, such as by about 250° C. or less. The nitride semiconductor devices of the present invention can be used in a variety of different applications.
    Type: Application
    Filed: April 18, 2002
    Publication date: November 28, 2002
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Publication number: 20020170489
    Abstract: Methods of crystal growth for semiconductor materials, such as nitride semiconductors, and methods of manufacturing semiconductor devices are provided. The method of crystal growth includes forming a number of island crystal regions during a first crystal growth phase and continuing growth of the island crystal regions during a second crystal growth phase while bonding of boundaries of the island crystal regions occurs. The second crystal growth phase can include a crystal growth rate that is higher than the crystal growth rate of the first crystal growth phase and/or a temperature that is lower than the first crystal growth phase. This can reduce the density of dislocations, thereby improving the performance and service life of a semiconductor device which is formed on a nitride semiconductor made in accordance with an embodiment of the present invention.
    Type: Application
    Filed: April 11, 2002
    Publication date: November 21, 2002
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: D472529
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: April 1, 2003
    Assignee: Sony Corporation
    Inventors: Hiroyuki Okuyama, Masato Doi, Goshi Biwa, Toyoharu Oohata
  • Patent number: D472531
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: April 1, 2003
    Assignee: Sony Corporation
    Inventors: Hiroyuki Okuyama, Masato Doi, Goshi Biwa, Toyoharu Oohata