Abstract: There are provided an oxide semiconductor material, capable of attaining stability of a threshold voltage (Vth) (threshold voltage shift amount ?Vth within a range of ±3 V in PDS and NBIS) and field-effect mobility of 5 cm2/Vs or more necessary for the operation of an OLED display device. An oxide semiconductor target in which an oxide semiconductor material with one or more of oxides of W, Ta, and Hf of 5d transition metal added each by 0.07 to 3.8 at %, 0.5 to 4.7 at %, and 0.32 to 6.4 at % to a semiconductor material with Zn—Sn—O as a main ingredient is sintered; a semiconductor channel layer formed by using the target, and an oxide semiconductor material for TFT protective film, as well as a semiconductor device having the same.

Abstract: A semiconductor substrate includes scribe and product regions, with grooves formed in the scribe region. The grooves are embedded with an insulating film to provide an isolation region, and an active region, including semiconductor elements, is formed in the product region. Dummy patterns are formed in the scribe region, which include a first dummy pattern and second dummy patterns for preventing dishing of the insulating film. The second dummy patterns are surrounded and defined by the isolation region. A target pattern for optical pattern recognition is arranged over the first dummy pattern, and includes a first conductive film. A plane area of the first dummy pattern is larger than a plane area of each of the second dummy patterns, and the first dummy pattern and the second dummy patterns are arranged in order from an edge of the semiconductor substrate toward the product region.

Abstract: A method of forming a semiconductor IC includes forming grooves in a substrate to define a first dummy region and second dummy regions formed at a scribing area, and third dummy regions and a fourth dummy region formed at a product area. A width of the first dummy region is greater than widths of each of the second and third dummy regions and a width of the fourth dummy region is greater than widths of each of the third dummy regions. A conductor pattern is formed over the first dummy region for optical pattern recognition. The first dummy region is formed under the conductor pattern so the grooves are not formed under the conductor pattern. The second dummy regions are spaced from one another by a predetermined spacing at the scribing area, and the third dummy regions are spaced from one another by a predetermined spacing at the product area.

Abstract: A technique capable of forming an oxide semiconductor target with a high quality in a low cost is provided. In a step of manufacturing zinc tin oxide (ZTO target) used in manufacturing an oxide semiconductor forming a channel layer of a thin-film transistor, by purposely adding the group IV element (C, Si, or Ge) or the group V element (N, P, or As) to a raw material, excessive carriers caused by the group III element (Al) mixed in the step of manufacturing the ZTO target are suppressed, and a thin-film transistor having good current (Id)-voltage (Vg) characteristics is achieved.

Abstract: Disclosed herein is a device that includes a semiconductor substrate having a first area, a plurality of cell transistors arranged on the first area of the semiconductor substrate, and a plurality of cell capacitors each coupled to an associated one of the cell transistors, the cell capacitors being provided so as to overlap with one another on the first area.

Abstract: A semiconductor device includes: a transistor including source and drain diffusion-layers, a gate insulating film and a gate electrode; first and second plugs formed in a first interlayer-insulating film and connected to the source and drain diffusion-layers, respectively; a third plug extending through a second interlayer-insulating film and connected to the first plug; a first interconnection-wire formed on the second interlayer-insulating film and connected to the third plug; a second interconnection-wire formed on a third interlayer-insulating film and intersecting the first interconnection-wire; a fourth interlayer-insulating film; a hole extending through the fourth, third and second interlayer-insulating films, the hole being formed such that a side surface of the second interconnection-wire is exposed; and a fourth plug filling the hole via an intervening dielectric film and connected to the second plug, wherein a capacitor is formed using the fourth plug, the second interconnection-wire and the diele

Abstract: Disclosed is an oxide semiconductor layer (13) which forms a channel for a thin-film transistor and which includes at least In and oxygen and one or more types of elements from among Zn, Cd, Al, Ga, Si, Sn, Ce, and Ge. A high concentration region (13d) is disposed on one section of the oxide semiconductor layer (13), whereby said region has a maximum In concentration 30 at %; or higher than other regions on the oxide semiconductor layer (13). The film thickness of the oxide semiconductor layer (13) is 100 nm max., and the film thickness of the high concentration region (13d) is 20 nm max. or, preferably, 6 nm max. This enables a thin-film transistor with a sub-threshold slope of 100 mV/decade max., a high on-current, and a high field effect mobility to be achieved.

Abstract: An object of the present invention relates to distinguishing, from a fluorophore of an unreacted substrate, a single fluorophore attached to a nucleotide that is incorporated into a probe by a nucleic acid synthesis. The present invention relates to a nucleic acid analyzing device that analyzes a nucleic acid in sample by fluorescence, wherein a localized surface plasmon is generated by illumination, and a probe for analyzing the nucleic acid in the sample is on the site where the surface plasmon is generated. According to the present invention, since it is possible to efficiently produce fluorescence intensifying effects due to the surface plasmon and to immobilize the probe to a region within the reach of the fluorescence intensifying effects, it becomes possible to measure a nucleic acid synthesis without removing unreacted nucleotide to which fluorophores are attached.

Abstract: Oxygen defects formed at the boundary between the zinc oxide type oxide semiconductor and the gate insulator are terminated by a surface treatment using sulfur or selenium as an oxygen group element or a compound thereof, the oxygen group element scarcely occurring physical property value change. Sulfur or selenium atoms effectively substitute oxygen defects to prevent occurrence of electron supplemental sites by merely applying a gas phase or liquid phase treatment to an oxide semiconductor or gate insulator with no remarkable change on the manufacturing process. As a result, this can attain the suppression of the threshold potential shift and the leak current in the characteristics of a thin film transistor.

Abstract: A semiconductor device including: a bit line being arranged on top surfaces of first and second contact plugs via a first insulation layer and extending in a direction connecting a first impurity diffusion layer and a second impurity diffusion layer; a bit line contact plug being formed through the first insulation layer and electrically connecting the bit line to the first contact plug; a first cell capacitor having a first lower electrode beside one of side surfaces of the bit line; a first insulation film insulating the bit line and the first lower electrode from each other; and a first contact conductor electrically connecting a bottom end of the first lower electrode to a side surface of the second contact plug.

Abstract: In a TFT that adopts an oxide semiconductor as an active layer and has a resistance layer interposed between the active layer and one of a source and drain electrode, while Vth close to 0 V and a small off current are sustained, an on-current is increased. In a thin-film transistor including a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode, the semiconductor layer that links the source electrode and drain electrode is made of a metal oxide. The semiconductor layer includes three regions of first, second, and third regions. The first region is connected with the source electrode, the third region is connected with the drain electrode, and the second region is connected between the first region and third region. The resistivities of the three regions have the relationship of the first region>the second region>the third region.

Abstract: A method of forming a semiconductor IC includes forming grooves in a substrate to define a first dummy region and second dummy regions formed at a scribing area, and third dummy regions and a fourth dummy region formed at a product area. A width of the first dummy region is greater than widths of each of the second and third dummy regions and a width of the fourth dummy region is greater than widths of each of the third dummy regions. A conductor pattern is formed over the first dummy region for optical pattern recognition. The first dummy region is formed under the conductor pattern so the grooves are not formed under the conductor pattern. The second dummy regions are spaced from one another by a predetermined spacing at the scribing area, and the third dummy regions are spaced from one another by a predetermined spacing at the product area.

Abstract: There are provided an oxide semiconductor material, capable of attaining stability of a threshold voltage (Vth) (threshold voltage shift amount ?Vth within a range of ±3 V in PDS and NBIS) and field-effect mobility of 5 cm2/Vs or more necessary for the operation of an OLED display device. An oxide semiconductor target in which an oxide semiconductor material with one or more of oxides of W, Ta, and Hf of 5d transition metal added each by 0.07 to 3.8 at %, 0.5 to 4.7 at %, and 0.32 to 6.4 at % to a semiconductor material with Zn—Sn—O as a main ingredient is sintered; a semiconductor channel layer formed by using the target, and an oxide semiconductor material for TFT protective film, as well as a semiconductor device having the same.

Abstract: A semiconductor device includes a plurality of MOS transistors and wiring connected to a source electrode or a drain electrode of the plurality of MOS transistors and, the wiring being provided in the same layer as the source electrode and the drain electrode in a substrate, or in a position deeper than a surface of the substrate.

Abstract: A semiconductor IC includes grooves formed in a substrate to define a first dummy region and second dummy regions formed at a scribing area, and third dummy regions and a fourth dummy region formed at a product area. A width of the first dummy region is greater than widths of each of the second and third dummy regions and a width of the fourth dummy region is greater than widths of each of the third dummy regions. A conductor pattern is formed over the first dummy region for optical pattern recognition. The first dummy region is formed under the conductor pattern so the grooves are not formed under the conductor pattern. The second dummy regions are spaced from one another by a predetermined spacing at the scribing area, and the third dummy regions are spaced from one another by a predetermined spacing at the product area.

Abstract: A semiconductor IC includes grooves formed in a substrate to define a first dummy region and second dummy regions formed at a scribing area, and third dummy regions and a fourth dummy region formed at a product area. A width of the first dummy region is greater than widths of each of the second and third dummy regions and a width of the fourth dummy region is greater than widths of each of the third dummy regions. A conductor pattern is formed over the first dummy region for optical pattern recognition. The first dummy region is formed under the conductor pattern so the grooves are not formed under the conductor pattern. The second dummy regions are spaced from one another by a predetermined spacing at the scribing area, and the third dummy regions are spaced from one another by a predetermined spacing at the product area.

Abstract: Disclosed is a technique for suppressing fluctuation of device characteristics in thin film transistors using an oxide semiconductor film as a channel layer. In a thin film transistor using an oxide semiconductor film as a channel layer (4), said channel layer (4) is configured from an oxide semiconductor having as main materials a zinc oxide and tin oxide with introduced group IV elements or group V elements, wherein the ratio (A/B) of the impurity concentration (A) of the group IV elements or group V elements contained in the channel layer (4) and the impurity concentration (B) of the group III elements contained in the channel layer (4) satisfies A/B?1.0, and ideally A/B?0.3.

Abstract: Disclosed is an oxide semiconductor layer (13) which forms a channel for a thin-film transistor and which includes at least In and oxygen and one or more types of elements from among Zn, Cd, Al, Ga, Si, Sn, Ce, and Ge. A high concentration region (13d) is disposed on one section of the oxide semiconductor layer (13), whereby said region has a maximum In concentration 30 at %; or higher than other regions on the oxide semiconductor layer (13). The film thickness of the oxide semiconductor layer (13) is 100 nm max., and the film thickness of the high concentration region (13d) is 20 nm max. or, preferably, 6 nm max. This enables a thin-film transistor with a sub-threshold slope of 100 mV/decade max., a high on-current, and a high field effect mobility to be achieved.

Abstract: To provide an active region having first and second diffusion layers positioned at both sides of a gate trench and a third diffusion layer formed on a bottom surface of the gate trench, first and second memory elements connected to the first and second diffusion layers, respectively, a bit line connected to the third diffusion layer, a first gate electrode that covers a first side surface of the gate trench via a gate dielectric film and forms a channel between the first diffusion layer and the third diffusion layer, and a second gate electrode that covers a second side surface of the gate trench via a gate dielectric film and forms a channel between the second diffusion layer and the third diffusion layer. According to the present invention, because separate transistors are formed on both side surfaces of a gate trench, two times of conventional integration can be achieved.

Abstract: A semiconductor device includes: a cell gate trench with a bottom face and first/second side faces; a field-shield gate trench narrower than the cell gate trench; a first upper diffusion layer between the cell gate trench and the field-shield gate trench; a second upper diffusion layer on the opposite side of the cell gate trench from the first upper diffusion layer; a third upper diffusion layer on the opposite side of the field-shield gate trench from the first upper diffusion layer; a lower diffusion layer on the bottom face of the cell gate trench; first and second storage elements electrically connected to the first and second upper diffusion layers, respectively; a bit line electrically connected to the lower diffusion layer; a word line covering first and second side faces via a gate insulating film; and a field-shield gate electrode in the field-shield gate trench via a gate insulating film.