Patents by Inventor Hisashi Adachi

Hisashi Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6658216
    Abstract: Plural subcarrier-multiplexed AM signals 30 are input and narrow-band-FM-modulated by a voltage controlled oscillator 4 including the fundamental carrier wave and higher-order harmonics as the output, and the FM carrier wave component of the higher-order harmonics of the fundamental carrier wave is selectively taken out by a band-rejection filter 5, shifted to the lower frequency side by a frequency converter 7, converted into an optical signal by an electric/optic converter 3 and transmitted.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: December 2, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masanori Iida, Hisashi Adachi, Hiroyuki Asakura
  • Patent number: 6643470
    Abstract: An FM signal converter comprising: an amplitude detecting unit for detecting amplitude variation of a plurality of signals that are multiplexed with subcarriers, as an amplitude variation signal; a peak detection unit for determining from said amplitude variation signal whether a peak of the amplitude of said plurality of signals exceeds a threshold and for generating peak detection information that includes information about said peak of the amplitude; a frequency signal source for providing signal with a predetermined frequency that differs from any of the frequencies of said subcarriers; an amplitude phase control unit for adjusting amplitude and phase of the signal from the frequency signal source according to said peak detecting information and outputting the adjusted signal as a corrected signal; signal combining means for combining said corrected signal and said plurality of signals multiplexed with subcarriers, with considering a time for generating the corrected signal; and an FM modulator for
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: November 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masanori Iida, Hisashi Adachi, Hiroyuki Asakura
  • Patent number: 6639471
    Abstract: To provide a power amplifier circuit with a smaller circuit scale and with good characteristics over a wide range of load impedance. A configuration includes: a DC/DC converter 2108 which delivers a supply voltage from a battery 2111 to a power amplifier 1302 according to control commands from a control circuit 2109; a directional coupler 2101 which outputs a signal from one terminal 2101a according to signal waves received by an antenna 1306 from a second matching circuit 105 and outputs a signal from another terminal 2101b according to reflected waves received from the antenna 1306; and detectors 2102 and 2103 or the like.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: October 28, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Hisashi Adachi, Makoto Sakakura, Hiroyuki Handa, Toshio Obara
  • Publication number: 20030174026
    Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 18, 2003
    Inventors: Hisashi Adachi, Makoto Sakakura
  • Publication number: 20030133517
    Abstract: In a signal generating circuit SG1, a 90-degree divider 3 generates, from a local oscillation signal SLO supplied through an input terminal 1, an intermediate reference phase signal ISREF and an intermediate quadrature signal ISQR orthogonal in phase to the intermediate reference phase signal ISREF for output to mixers 6 and 7, respectively. A shifter 4 shifts the phase of the local oscillation signal supplied through an input terminal 2 by a predetermined amount to generate a shift signal SSFT for output through a divider 5 to the mixers 6 and 7. The mixer 6 mixes the input intermediate reference phase signal ISREF and the input shift signal SSFT to generate a reference phase signal SREF. The mixer 7 mixes intermediate quadrature signal ISQR and the input shift signal SSFT to generate a quadrature signal SQR. With this, it is possible to provide a signal generator capable of generating highly-accurate, high-frequency reference phase signals and quadrature signals.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 17, 2003
    Inventors: Koji Takinami, Hisashi Adachi, Makoto Sakakura
  • Patent number: 6563387
    Abstract: A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: May 13, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunsuke Hirano, Ryoichi Yamada, Yasunori Miyahara, Yukio Hiraoka, Hisashi Adachi
  • Publication number: 20030021550
    Abstract: An optical mount substrate of the present invention includes: an optical waveguide groove 11 provided in a glass substrate 17 where loss in high frequencies is small; and via holes 12 for connection wiring or heat radiation that are provided in a direction of substrate thickness.
    Type: Application
    Filed: August 26, 2002
    Publication date: January 30, 2003
    Inventors: Tsuguhiro Korenaga, Hiroyuki Asakura, Masanori Iida, Hisashi Adachi, Mikihiro Shimada
  • Publication number: 20020186440
    Abstract: A transmitting circuit apparatus has
    Type: Application
    Filed: February 21, 2002
    Publication date: December 12, 2002
    Inventors: Hisashi Adachi, Masanori Iida, Hiroyuki Asakura
  • Publication number: 20020186757
    Abstract: An antenna duplexer has an antenna terminal;
    Type: Application
    Filed: February 27, 2002
    Publication date: December 12, 2002
    Inventors: Hiroyuki Nakamura, Toshio Ishizaki, Hisashi Adachi, Makoto Sakakura, Hiroaki Kosugi, Hiroyuki Itokawa, Toshiaki Nakamura
  • Publication number: 20020175764
    Abstract: To provide a power amplifier circuit with a smaller circuit scale and with good characteristics over a wide range of load impedance. A configuration includes: a DC/DC converter 2108 which delivers a supply voltage from a battery 2111 to a power amplifier 1302 according to control commands from a control circuit 2109; a directional coupler 2101 which outputs a signal from one terminal 2101a according to signal waves received by an antenna 1306 from a second matching circuit 105 and outputs a signal from another terminal 2101b according to reflected waves received from the antenna 1306; and detectors 2102 and 2103 or the like.
    Type: Application
    Filed: April 16, 2002
    Publication date: November 28, 2002
    Inventors: Toru Matsuura, Hisashi Adachi, Makoto Sakakura, Hiroyuki Handa, Toshio Obara
  • Patent number: 6441692
    Abstract: The invention provides a high-speed PLL frequency synthesizer in which the frequency of a reference signal can be made larger than a frequency interval of an external output with a simple configuration. An n-th harmonic of an output of a voltage-controlled oscillator is caused to pass through a band pass filter. The frequency of an output of the band pass filter is divided by M in a variable frequency divider. The phase of an output of the variable frequency divider is compared with that of the reference signal in a phase comparator. An output of the phase comparator is smoothed by a loop filter. The output of the voltage-controlled oscillator is controlled by an output of the loop filter. The fundamental wave of the output of the voltage-controlled oscillator is caused to pass through another band pass filter, and then output to the outside. At this time, the frequency of the reference signal is n times a frequency interval of the fundamental wave of the output of the voltage-controlled oscillator.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: August 27, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshifumi Nakatani, Hisashi Adachi, Hiroaki Kosugi, Yuji Saito, Shunsuke Hirano, Hiroshi Haruki
  • Patent number: 6421530
    Abstract: The present invention concerns a radio circuit including a local oscillator, a first receive frequency converter, a frequency divider and a demodulator. A receive signal and an output of the local oscillator are input to the first receive frequency converter. The receive signal is converted into a first intermediate signal by the first receive frequency converter, and the first intermediate frequency signal is input to the demodulator. The output of the local oscillator is frequency-divided by the frequency divider and also input to the demodulator. The signal converted into the first intermediate frequency is demodulated into a baseband signal by the demodulator.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: July 16, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Hiroaki Kosugi, Kaoru Ishida, Hiroshi Haruki, Junichi Yasuno, Kazuhiko Ikeda
  • Publication number: 20020075539
    Abstract: The optical transmission system according to the present invention includes a wavelength division multiplex optical transmitter having a band division portion 3 for dividing a frequency-multiplexed electrical signal into a plurality of frequency bands, semiconductor lasers 8 and 9 for converting the electrical signals of the plurality of frequency bands into a plurality of optical signals utilizing respective different wavelengths for each of the frequency bands, and an optical multiplex portion 12 for multiplexing each of the optical signals, and a wavelength division multiplex optical receiver having light-to-electricity conversion portion 34 and 35 for converting an optical signal from the wavelength division multiplex optical transmitter into an electrical signal, and respectively reconstructing the electrical signals of the plurality of frequency bands by dividing the converted electrical signal into a plurality of frequency bands.
    Type: Application
    Filed: September 14, 2001
    Publication date: June 20, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masanori Iida, Hisashi Adachi, Hiroyuki Asakura, Tsuguhiro Korenaga, Mikihiro Shimada
  • Publication number: 20020061086
    Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to output data from a multiplier, and outputs resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step, and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step, and outputs resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to average data of the period.
    Type: Application
    Filed: December 12, 2000
    Publication date: May 23, 2002
    Inventors: Hisashi Adachi, Toshifumi Nakatani, Hiroaki Kosugi, Masakatsu Maeda, Shunsuke Hirano
  • Publication number: 20020061773
    Abstract: The invention provides a radio circuit realizing a desired receiving characteristic even when a strong-level interfering wave is received and operating with small power when no interfering wave is received. The radio circuit comprises a receiving circuit for selecting a signal having a desired frequency from received signals and demodulating the signal, an input-power detector for detecting power P1 of the receiving circuit, a received-power detector for detecting power P2 of a signal selected by the receiving circuit, and a reception control circuit for controlling the receiving circuit. The reception control circuit controls the receiving circuit at a low distortion by increasing the power consumption of a circuit included in the receiving circuit and thereby expanding the linear operation range when the power P1 detected by the input-power detector is larger than a predetermined value t1 and the power P2 detected by the input-power detector is smaller than a predetermined value t3.
    Type: Application
    Filed: October 9, 2001
    Publication date: May 23, 2002
    Applicant: Matsushita Electric industrial Co. Ltd.
    Inventors: Hisashi Adachi, Masanori Iida, Hiroyuki Asakura
  • Patent number: 6347219
    Abstract: A method for generating a local oscillation signal comprising two separate frequency converters, of which one frequency converter includes an output unit for generating an internal output signal to be used for its frequency conversion, and the other frequency converter employs the same internal output signal from the output unit as the local oscillation signal.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: February 12, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Takinami, Hisashi Adachi, Hiroaki Kosugi, Ikuo Ohta, Jyunichi Yoshizumi, Toshiaki Nakamura
  • Publication number: 20010052823
    Abstract: A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 20, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunsuke Hirano, Ryoichi Yamada, Yasunori Miyahara, Yukio Hiraoka, Hisashi Adachi
  • Publication number: 20010050962
    Abstract: A transmitting circuit apparatus has a first digital modulator and a second digital modulator for modulating an I signal and a Q signal which are multi-valued digital baseband modulation signals, into a digital I signal and a digital Q signal, respectively, having the number of bits smaller than that of the baseband modulation signals; and a quadrature modulator for outputting a signal synthesized from the signals generated by modulating (two) carrier waves each having a phase perpendicular to each other by using the modulated I and Q signals, respectively.
    Type: Application
    Filed: May 30, 2001
    Publication date: December 13, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Masanori Iida, Hiroyuki Asakura
  • Publication number: 20010036817
    Abstract: A frequency synthesizer device comprising a PLL circuit (9) and a frequency-division ratio control circuit (5). The PLL circuit (9) includes a phase comparator (1), a low-pass filter (2), a voltage-controlled oscillator (3), and a variable frequency divider (4). The frequency-division ratio control circuit (5) controls the variable frequency divider (4) such that a frequency division ratio of the variable frequency divider (4) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider (4) and an output fdiv2 obtained via a delay element (10) are used as clocks of an accumulator portion (81) in the frequency-division ratio control circuit (5).
    Type: Application
    Filed: February 26, 2001
    Publication date: November 1, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryoichi Yamada, Shunsuke Hirano, Yasunori Miyahara, Hisashi Adachi, Hisashi Takahashi, Hiroki Kojima
  • Patent number: 6259895
    Abstract: In the receiver using a PLL synthesizer, there is a limit in reducing boot-up time or frequency switching time, which shortens battery life. A first local frequency L01 from a multiplier 22 and a receiving signal are input to a first frequency converter 10 to convert it to a first intermediate frequency IF1. The first intermediate frequency IF1 is converted in a second frequency converter 12 by a frequency L02 of an N1 frequency divider 24 to a second intermediate frequency IF2. Also, the outputs of the N1 frequency divider 24 and N2 frequency divider 26 are mixed in the frequency converter for transmission 34, and L04 and the local frequency L01 are added to a lower-side-band cancel mixer 50 to extract the upper side band of the transmission frequency.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: July 10, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshishige Yoshikawa, Yoshio Horiike, Hisashi Adachi, Hiroaki Kosugi