Abstract: The present invention provides an amplifier for amplifying a high-frequency signal and outputting an amplified signal. The amplifier includes: an amplification element which is a bipolar transistor or a field-effect transistor; and an inductor connected between a base and a collector or between a gate and a drain of the amplification element. The inductance of the inductor is chosen so that, within a predetermined frequency range, a parallel resonance occurs with a parasitic capacitor of the amplification element and an intrinsic capacitor of the amplification element, the intrinsic capacitor being a base-collector capacitance or a gate-drain capacitance.

Abstract: A voltage controlled oscillator comprises a parallel resonance circuit including an inductor circuit, a variable capacitance circuit, and a high-frequency switch circuit, a negative resistance circuit and a frequency control section, and a frequency tuning sensitivity control section. The frequency control section shifts a band of an oscillation frequency by controlling ON/OFF of a switching element included in the high-frequency switch circuit. The frequency tuning sensitivity control section adjusts a change rate of a total capacitance of the variable capacitance circuit with respect to a control voltage, depending on a band to be used. The frequency tuning sensitivity control section is connected to a virtual ground point of a differential signal.

Abstract: A transmission circuit operating at a high efficiency and a low distortion is provided. A signal generation section 11 generates a vector signal and an amplitude signal. A vector modulation section 13 performs vector modulation on the vector signal. An amplification section 15 amplifies the signal processed with the vector modulation. A signal processing section 12 performs predetermined signal processing on the amplitude signal and outputs the resultant signal. A regulator 14 controls a voltage to be supplied to the amplification section 15 based on the magnitude of the signal which is output from the signal processing section 12. The signal processing section 12 determines whether or not the amplitude signal exceeds a threshold value at an interval of a predetermined time period, selects a discrete value to be output based on the determination result, and outputs a signal having the selected discrete value.

Abstract: There provides a two-point modulation phase modulation apparatus capable of obtaining an RF phase modulation signal of superior modulation precision with low power consumption and a simple configuration even in the event of inputting a wide band baseband modulation signal. A differentiator (21) of the opposite characteristics to the attenuation characteristics of anti-alias filter (22) is provided at the front stage of a D/A converter (6). As a result, it is possible to sufficiently suppress an alias signal without raising the sampling frequency of the D/A converter (6) (i.e. low power consumption) using an anti-alias filter (22) of a simple configuration (i.e. low cost) with a low order for a narrower bandwidth than a PLL modulation frequency bandwidth, and it is possible to obtain an RF phase modulation signal where the entire frequency band of input digital baseband modulation signal (S1) is reflected in a superior manner.

Abstract: Provided is a transmitter circuit capable of outputting a transmission signal having high accuracy irrespective of bandwidth and operating with high efficiency. In the transmitter circuit 1, a delay detection section 18 selects two observation points at which angle change amounts of the complex envelope are larger than a predetermined angle threshold value and selects, as a singular point, an observation point at which a magnitude of the complex envelope is larger than that at one of the two observation points. Based on a positional relationship among the singular point, a preceding symbol, and a succeeding symbol, a relationship between delay times of the amplitude signal and the phase signal is detected. Based on the relationship between delay times of the amplitude signal and the phase signal, a delay setting section 19 sets a delay time in a delay adjuster 12. Based on the set delay time, the delay adjuster 12 adjusts the delay times of the amplitude signal and the phase signal.

Abstract: A wireless transmission apparatus of multi-mode operation with superior power efficiency is provided. Switches (115 and 117) are switched over in such a manner that a modulation signal outputted from a wireless GSM/EDGE (UB) signal formation circuit (101-3) of a high-frequency signal processing circuit (101) is outputted to a high-frequency power amplifier (104) at the time of output of a GSM modulation signal, and is outputted to a high-frequency amplifier (105) at the time of output of an EDGE modulation signal. As a result, the EDGE modulation signal is power amplified using a high-frequency power amplifier (105) for an UMTS modulation signal use that is compatible with regards to the EDGE modulation signal and the maximum output power and presence or absence of envelope fluctuation. It is therefore possible to amplify the EDGE modulation scheme wireless signal with high efficiency.

Abstract: In a signal generating circuit SG1, a 90 -degree divider 3 generates, from a local oscillation signal SLO supplied through an input terminal 1, an intermediate reference phase signal ISREF and an intermediate quadrature signal ISQR orthogonal in phase to the intermediate reference phase signal ISREF for output to mixers 6 and 7, respectively. A shifter 4 shifts the phase of the local oscillation signal supplied through an input terminal 2 by a predetermined amount to generate a shift signal SSFT for output through a divider 5 to the mixers 6 and 7. The mixer 6 mixes the input intermediate reference phase signal ISREF and the input shift signal SSFT to generate a reference phase signal SREF. The mixer 7 mixes intermediate quadrature signal ISQR and the input shift signal SSFT to generate a quadrature signal SQR. With this, it is possible to provide a signal generator capable of generating highly-accurate, high-frequency reference phase signals and quadrature signals.

Abstract: In order to enhance a reverse isolation characteristic of a differential amplifier, which is used as, for example, an RE amplifier or a local amplifier of a mobile telephone, differential amplifier is provided which includes a differential amplification circuit for amplifying a difference in potential between two input signals in reverse phase with each other, which are inputted into Port1 and Port2, and for outputting two output signals in reverse phase with each other from Port3 and Port4; a feedback capacitor connected between Port and Port4; and a feedback capacitor connected between Port2 and Port3. Signals for canceling feedback signals are inputted into input terminals via the feedback capacitors, whereby it is possible to the reverse isolation characteristic of the differential amplifier.

Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

Abstract: An amplifier includes a modulation coder receiving an original modulation signal and generating an amplitude signal and a phase signal, a voltage adjusting instrument which generates an amplitude modulation signal from the amplitude signal, a carrier generator generating a phase modulation signal from the phase signal, and an amplification device receiving the phase modulation signal and the amplitude modulation signal serving as a bias voltage and outputting a modulation signal obtained by restoring and amplifying the original modulation signal. The voltage adjusting instrument determines a DC offset voltage on the basis of a level control signal indicating the level of the amplitude modulation signal and generates the amplitude modulation signal to which the DC offset voltage is added.

Abstract: A semiconductor differential circuit comprising a semiconductor substrate, a first semiconductor device on the semiconductor substrate having a gate electrode for having one of differential signals conveyed thereto and a drain electrode for outputting one of the differential signals controlled by the gate electrode, a second semiconductor device formed on the semiconductor substrate having a gate electrode for having the other of the differential signals conveyed thereto and a drain electrode for outputting the other of the differential signals controlled by the gate electrode, and wherein the drain electrode and drain electrode are placed in the proximity so that, at a predetermined frequency, it is equivalent to the one in which the drain electrode is grounded via a predetermined resistance, and the drain electrode is grounded via the predetermined resistance.

Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.

Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

Abstract: A fraction part control circuit of a frequency synthesizer apparatus including a PLL circuit is of a plural-n-th-order delta-sigma modulator circuit for controlling a fraction part of a number of frequency division to a variable frequency divider of the PLL circuit. An adder adds data of the fraction part to an output data from a multiplier and outputs the resultant data to a quantizer through a second-order integrator. The quantizer quantizes input data with a quantization step and outputs the quantized data to the multiplier through a feedback circuit. The quantized data is used as data of the controlled fraction part. The multiplier multiplies data from the feedback circuit by the quantization step and outputs the resultant data to the adder. The fraction part control circuit periodically changes the data of the fraction part, thereby setting a frequency of an output signal from a VCO according to an average value of the period.

Abstract: An antenna duplexer has an antenna terminal; a transmitting phase-shift circuit, one side of which is connected to the antenna terminal; a receiving phase-shift circuit, one side of which is connected to the antenna terminal; a transmitting filter connected to the other side of the transmitting phase-shift circuit and a transmitting terminal; and a receiving filter connected to the other side of the receiving phase-shift circuit and a receiving terminal; wherein the transmitting filter and/or the receiving filter is a composite filter, and the composite filter attains a characteristic having an attenuation pole at simultaneous transmission and reception time when transmission and reception are simultaneously performed, and controls respective impedances by the transmitting phase-shift circuit and the receiving phase-shift circuit to operate as a sharing unit and attains a characteristic where the attenuation pole is removed at non simultaneous transmission and reception time when transmission and reception

Abstract: A transmitting circuit apparatus has a frequency modulator that performs frequency modulation of a carrier wave with frequency modulation data and outputs the frequency-modulated carrier wave; a sigma-delta modulator which performs sigma delta modulation of amplitude modulation data; and an amplitude modulator that performs amplitude modulation of the frequency-modulated carrier wave with an output signal of the sigma-delta modulator and outputs the amplitude-modulated carrier wave.

Abstract: A transmitting circuit apparatus has a first digital modulator and a second digital modulator for modulating an I signal and a Q signal which are multi-valued digital baseband modulation signals, into a digital I signal and a digital Q signal, respectively, having the number of bits smaller than that of the baseband modulation signals; and a quadrature modulator for outputting a signal synthesized from the signals generated by modulating (two) carrier waves each having a phase perpendicular to each other by using the modulated I and Q signals, respectively.

Abstract: A phase modulation apparatus is provided whereby excellent RF phase modulation signals can be obtained even when the modulation sensitivity of a voltage controlled oscillator varies. Phase modulation apparatus 100 has: phase detector 105 that performs phase detection with respect to an RF phase modulation signal outputted from VCO 101; comparator 106 that compares the phase of the detected signal with the phase of a baseband phase modulation signal and outputs the difference between the signals; variable gain amplifier 107 that controls the gain of the baseband phase modulation signal based on the output of comparator 106 and supplies the gain-controlled baseband phase modulation signal to VCO 101.

Abstract: In a power amplifier of the present invention, distributed constant lines 105a and 105b have a total line length corresponding to a ½ wavelength of a fundamental wave so as to invert the phase of a fundamental wave component of a first signal amplified by a first amplification element 102a. A series resonant circuit 106 is connected a tone end between the distributed constant lines 105a and 105b, which invert the phase of a second-order harmonic component, so as to be in parallel connection with the distributed constant lines 105a and 105b. Further, the series resonant circuit 106 is connected at the other end to an output side of the second amplification element 102b. The series resonant circuit 106 resonates with a second-order harmonic frequency, thereby canceling out the second-order harmonic component.

Abstract: A wireless communication base station system of the present invention includes a wireless key base station, an optical forward base station, and an optical transmitter which connects the wireless key base station and the optical forward base station to each other. An optical signal modulated by a signal component and that modulated by a distortion component are transmitted from the wireless key base station to the optical forward base station. In the optical forward base station, these optical signals are converted to high-frequency electrical signals, and the high-frequency signal consisting of the signal component is amplified. Thereafter, the amplified signal is combined with the high-frequency signal consisting of the distortion component with their phases opposite to each other, so that the distortion component include in the amplified signal is removed.