Patents by Inventor Hisashi Ogawa
Hisashi Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160163649Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: ApplicationFiled: February 2, 2016Publication date: June 9, 2016Inventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Patent number: 9287392Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: GrantFiled: November 28, 2012Date of Patent: March 15, 2016Assignee: Pannova Semic, LLCInventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Publication number: 20150343744Abstract: Cracking of a laminated glass assembly having a device encapsulated therein during the manufacturing process is prevented. The laminated glass assembly includes a first and a second glass sheet; a first, a second and a third intermediate film interposed between the first and second glass sheets, in that order; an organic EL panel interposed between the first and second intermediate films and provided with a terminal member; and a first wiring member consisting of a metallic thin strip connected to the terminal member in a thickness-wise direction via a first solder; wherein at least one of the two glass sheets has a thickness of 1.0 mm to 1.6 mm; and at a connecting portion of the terminal member, the first solder and the first wiring member, the first wiring member has a thickness of 0.05 mm to 0.10 mm and a width of 3 mm to 15 mm, and the first solder has a thickness of 0.01 mm to 0.20 mm; and a total thickness of the terminal member, the first solder and the first wiring member is 0.16 mm to 0.40 mm.Type: ApplicationFiled: October 30, 2013Publication date: December 3, 2015Applicants: NIPPON SHEET GLASS CO., LTD., PILKINGTON GROUP LIMITEDInventors: HISASHI OGAWA, HISASHI ASAOKA, MARK A. CHAMBERLAIN
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Patent number: 8445096Abstract: A glass substrate is held by a glass substrate holding member in the vertical direction, and a nozzle is used to eject an infrared cutoff liquid onto the upper portion of the glass substrate. The infrared cutoff liquid flows vertically downward so as to be applied onto the glass substrate. The film thickness of the lower portion of an infrared cutoff film is greater than that of the upper portion. The glass substrate is dried for approximately five minutes at room temperature. Then, the glass substrate onto which the infrared cutoff liquid has been applied is placed in an oven preheated to 200° C., heated for ten minutes, and then cooled. The glass substrate having the infrared cutoff film thereon is installed in a railroad vehicle such that the lower portion of the glass substrate is located on the lower side with respect to the railroad vehicle.Type: GrantFiled: January 11, 2007Date of Patent: May 21, 2013Assignee: Nippon Sheet Glass Company, LimitedInventors: Takashi Muromachi, Hisashi Ogawa, Mamoru Yoshida, Nobuki Iwai
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Patent number: 8367187Abstract: A window pane for an automobile includes a single sheet of glass plate and an infrared cutoff film formed on the single sheet of glass plate. A film thickness of the infrared cutoff film on an upper portion of the window pane is greater than the film thickness on a lower portion of the window pane when the window pane is installed in the automobile. A variation from a minimum value in the film thickness on the lower portion to a maximum value in the film thickness on the upper portion is at least 1000 nm per 600 mm in a vertical direction of the window pane when installed in the automobile. The infrared cutoff film is formed on a surface of the single sheet of glass plate by using a flow coating method.Type: GrantFiled: December 21, 2006Date of Patent: February 5, 2013Assignee: Nippon Sheet Glass Company, LimitedInventors: Takashi Muromachi, Nobuki Iwai, Hisashi Ogawa, Mamoru Yoshida
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Publication number: 20130022819Abstract: An object of the present invention is to provide a method for producing a transfer body, which method neither causes adhesion failure at the interface between a transferring film and a substrate, nor causes interlayer peeling in the transferring film. Another object of the present invention is to provide a method for producing a transfer body with high productivity, which method neither causes breakage of a functional pattern forming a transferring layer during peeling of a release film from the transferring film, nor causes any damage to the substrate during separation of an attaching roller and a peeling roller from the substrate.Type: ApplicationFiled: March 25, 2011Publication date: January 24, 2013Applicants: TOPPAN TDK LABEL CO., LTD., NIPPON SHEET GLASS COMPANY, LIMITEDInventors: Yota Yano, Hisashi Ogawa, Yukio Kimoto, Hiroyuki Okinaka, Toshikatsu Suehiro, Mitsuo Nakamura, Masaru Matsuda, Kimio Hase
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Patent number: 8350332Abstract: A first and second gate electrodes are formed on a first and second active regions, respectively. The first and second gate electrodes have a first and second metal-containing conductive films, respectively. The first and second metal-containing conductive films are formed on the isolation region for segmenting the first and second active regions to be spaced apart from each other. A third metal-containing conductive film, which is a part of each of the first and second gate electrodes, is continuously formed from a top of the first metal-containing conductive film through a top of the isolation region to a top of the second metal-containing conductive film. The third metal-containing conductive film is in contact with the first and second metal-containing conductive films.Type: GrantFiled: November 16, 2009Date of Patent: January 8, 2013Assignee: Panasonic CorporationInventors: Tsutomu Oosuka, Yoshihiro Sato, Hisashi Ogawa
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Patent number: 8344455Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: GrantFiled: May 31, 2011Date of Patent: January 1, 2013Assignee: Panasonic CorporationInventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Patent number: 8258582Abstract: A semiconductor device including a first transistor of a first conductivity type provided on a first active region of a semiconductor region, and a second transistor of a second conductivity type provided on a second active region of the semiconductor region. The first transistor includes a first gate insulating film and a first gate electrode, the first gate insulating film contains a high-k material and a first metal, and the first gate electrode includes a lower conductive film, a first conductive film and a first silicon film. The second transistor includes a second gate insulating film and a second gate electrode, the second gate insulating film contains a high-k material and a second metal, and the second gate electrode includes a second conductive film made of the same material as the first conductive film, and a second silicon film.Type: GrantFiled: July 14, 2011Date of Patent: September 4, 2012Assignee: Panasonic CorporationInventors: Hisashi Ogawa, Yoshihiro Mori
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Patent number: 8198686Abstract: A semiconductor device includes a first MIS transistor and a second MIS transistor. The first MIS transistor includes a first gate electrode includes a second metal film formed on a first gate insulating film, and an insulating film formed, extending over side surfaces of the first gate electrode and upper surfaces of regions located in the first active region laterally outside the first gate electrode. The second MIS transistor includes a second gate electrode including a first metal film formed on a second gate insulating film and a conductive film formed on the first metal film, and the insulating film formed, extending over side surfaces of the second gate electrode and upper surfaces of regions located in the second active region laterally outside the second gate electrode. The first and second metal films are made of different metal materials.Type: GrantFiled: December 2, 2009Date of Patent: June 12, 2012Assignee: Panasonic CorporationInventors: Yoshihiro Sato, Hisashi Ogawa
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Publication number: 20110266629Abstract: A semiconductor device including a first transistor of a first conductivity type provided on a first active region of a semiconductor region, and a second transistor of a second conductivity type provided on a second active region of the semiconductor region. The first transistor includes a first gate insulating film and a first gate electrode, the first gate insulating film contains a high-k material and a first metal, and the first gate electrode includes a lower conductive film, a first conductive film and a first silicon film. The second transistor includes a second gate insulating film and a second gate electrode, the second gate insulating film contains a high-k material and a second metal, and the second gate electrode includes a second conductive film made of the same material as the first conductive film, and a second silicon film.Type: ApplicationFiled: July 14, 2011Publication date: November 3, 2011Applicant: Panasonic CorporationInventors: Hisashi OGAWA, Yoshihiro Mori
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Publication number: 20110227168Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: ApplicationFiled: May 31, 2011Publication date: September 22, 2011Applicant: Panasonic CorporationInventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Patent number: 8021938Abstract: A semiconductor device includes: a first gate insulating film on a first region of a semiconductor substrate; a first gate electrode on the first gate insulating film; a second gate insulating film on a second region of the semiconductor substrate; and a second gate electrode on the second gate insulating film. The first gate insulating film includes a first insulating film composed of a first material containing a first metal, and the second gate insulating film includes a second insulating film composed of the first material and a second material containing a second metal.Type: GrantFiled: February 16, 2011Date of Patent: September 20, 2011Assignee: Panasonic CorporationInventor: Hisashi Ogawa
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Patent number: 8018004Abstract: A semiconductor device comprises a first MIS transistor and a second MIS transistor. The first MIS transistor includes a first gate insulating film formed on a first active region, and a first gate electrode formed on the first gate insulating film. The second MIS transistor includes a second gate insulating film formed on a second active region and made of an insulating material different from that of the first gate insulating film, and a second gate electrode formed on the second gate insulating film. Upper regions of the first gate electrode and the second gate electrode are electrically connected to each other on the isolation region located between the first active region and the second active region, and lower regions thereof are separated from each other with a sidewall insulating film made of the same insulating material as that of the first gate insulating film being interposed therebetween.Type: GrantFiled: February 8, 2008Date of Patent: September 13, 2011Assignee: Panasonic CorporationInventors: Yoshihiro Sato, Hisashi Ogawa
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Patent number: 8004044Abstract: A semiconductor device including a first transistor of a first conductivity type provided on a first active region of a semiconductor region, and a second transistor of a second conductivity type provided on a second active region of the semiconductor region. The first transistor includes a first gate insulating film and a first gate electrode, the first gate insulating film contains a high-k material and a first metal, and the first gate electrode includes a lower conductive film, a first conductive film and a first silicon film. The second transistor includes a second gate insulating film and a second gate electrode, the second gate insulating film contains a high-k material and a second metal, and the second gate electrode includes a second conductive film made of the same material as the first conductive film, and a second silicon film.Type: GrantFiled: May 28, 2009Date of Patent: August 23, 2011Assignee: Panasonic CorporationInventors: Hisashi Ogawa, Yoshihiro Mori
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Patent number: 7977800Abstract: The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.Type: GrantFiled: October 8, 2008Date of Patent: July 12, 2011Assignee: Panasonic CorporationInventors: Tsutomu Oosuka, Hisashi Ogawa, Yoshihiro Sato
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Publication number: 20110136331Abstract: A semiconductor device includes: a first gate insulating film on a first region of a semiconductor substrate; a first gate electrode on the first gate insulating film; a second gate insulating film on a second region of the semiconductor substrate; and a second gate electrode on the second gate insulating film. The first gate insulating film includes a first insulating film composed of a first material containing a first metal, and the second gate insulating film includes a second insulating film composed of the first material and a second material containing a second metal.Type: ApplicationFiled: February 16, 2011Publication date: June 9, 2011Applicant: PANASONIC CORPORATIONInventor: Hisashi OGAWA
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Patent number: 7915687Abstract: A semiconductor device includes: a first gate insulating film on a first region of a semiconductor substrate; a first gate electrode on the first gate insulating film; a second gate insulating film on a second region of the semiconductor substrate; and a second gate electrode on the second gate insulating film. The first gate insulating film includes a first insulating film composed of a first material containing a first metal, and the second gate insulating film includes a second insulating film composed of the first material and a second material containing a second metal.Type: GrantFiled: December 3, 2008Date of Patent: March 29, 2011Assignee: Panasonic CorporationInventor: Hisashi Ogawa
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Patent number: 7872312Abstract: A semiconductor device includes a first gate electrode formed in a first region on a semiconductor substrate with a first gate insulating film sandwiched therebetween; and a second gate electrode formed in a second region on the semiconductor substrate with a second gate insulating film sandwiched therebetween. The first gate insulating film includes a first high dielectric constant insulating film with a first nitrogen concentration and the second gate insulating film includes a second high dielectric constant insulating film with a second nitrogen concentration higher than the first nitrogen concentration.Type: GrantFiled: July 14, 2008Date of Patent: January 18, 2011Assignee: Panasonic CorporationInventor: Hisashi Ogawa
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Patent number: 7863753Abstract: A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region; and a first gate electrode formed on the isolation region and the active region and including a first region on the isolation region. The first region has a pattern width in a gate length direction larger than a pattern width of the first gate electrode on the active region. The first region includes a part having a film thickness different from a film thickness of the first gate electrode on the active region.Type: GrantFiled: September 7, 2007Date of Patent: January 4, 2011Assignee: Panasonic CorporationInventors: Chiaki Kudo, Hisashi Ogawa