Patents by Inventor Hisashi Ohtani
Hisashi Ohtani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7785933Abstract: To provide a method for manufacturing a highly-reliable semiconductor device, which is not damaged by external local pressure, with a high yield, a semiconductor device is manufactured by forming an element substrate having a semiconductor element formed using a single-crystal semiconductor substrate or an SOI substrate, providing the element substrate with a fibrous body formed from an organic compound or an inorganic compound, applying a composition containing an organic resin to the element substrate and the fibrous body so that the fibrous body is impregnated with the organic resin, and heating to provide the element substrate with a sealing layer in which the fibrous body formed from an organic compound or an inorganic compound is contained.Type: GrantFiled: March 14, 2008Date of Patent: August 31, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Dozen, Eiji Sugiyama, Hisashi Ohtani, Takuya Tsurume
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Patent number: 7776712Abstract: There is provided a crystalline TFT in which reliability comparable to or superior to a MOS transistor can be obtained and excellent characteristics can be obtained in both an on state and an off state. A gate electrode of the crystalline TFT is formed of a laminate structure of a first gate electrode made of a semiconductor material and a second gate electrode made of a metal material. An n-channel TFT includes an LDD region, and a region overlapping with the gate electrode and a region not overlapping with the gate electrode are provided, so that a high electric field in the vicinity of a drain is relieved, and at the same time, an increase of an off current is prevented.Type: GrantFiled: May 2, 2007Date of Patent: August 17, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hideomi Suzawa, Toru Takayama
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Publication number: 20100200663Abstract: In the present application, is disclosed a method of manufacturing a flexible semiconductor device having an excellent reliability and tolerance to the loading of external pressure. The method includes the steps of: forming a separation layer over a substrate having an insulating surface; forming an element layer including a semiconductor element comprising a non-single crystal semiconductor layer, over the separation layer; forming an organic resin layer over the element layer; providing a fibrous body formed of an organic compound or an inorganic compound on the organic resin layer; heating the organic resin layer; and separating the element layer from the separation layer. This method allows the formation of a flexible semiconductor device having a sealing layer in which the fibrous body is impregnated with the organic resin.Type: ApplicationFiled: April 27, 2010Publication date: August 12, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshitaka DOZEN, Eiji SUGIYAMA, Hisashi OHTANI, Takuya TSURUME
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Patent number: 7772592Abstract: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.Type: GrantFiled: November 19, 2007Date of Patent: August 10, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Toru Mitsuki, Akiharu Miyanaga, Yasushi Ogata
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Patent number: 7767559Abstract: A process for fabricating a semiconductor device comprising the steps of: introducing into an amorphous silicon film, a metallic element which accelerates the crystallization of the amorphous silicon film; applying heat treatment to the amorphous silicon film to obtain a crystalline silicon film; irradiating a laser beam or an intense light to the crystalline silicon film; and heat treating the crystalline silicon film irradiated with a laser beam or an intense light.Type: GrantFiled: November 12, 2008Date of Patent: August 3, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisashi Ohtani, Takeshi Fukunaga, Akiharu Miyanaga
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Patent number: 7759681Abstract: A practical operational amplifier circuit is formed using thing film transisters. An operational amplifier circuit is formed by thin film transistors formed on a quartz substrate wherein cumulative distribution of mobilities of the n-channel type thin film transistors becomes 90% or more at 260 cm2/Vs and wherein cumulative distribution of mobilities of the p-channel type thin film transistors becomes 90% or more at 150 cm2/Vs. The thin film transistors have active layers formed using a crystalline silicon film fabricated using a metal element that selected to promote crystallization of silicon. The crystalline silicon film is a collection of a multiplicity of elongate crystal structures extending in a certain direction, and the above-described characteristics can be achieved by matching the extending direction and the moving direction of carriers.Type: GrantFiled: August 7, 2006Date of Patent: July 20, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Hisashi Ohtani
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Patent number: 7759788Abstract: A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 ?m. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.Type: GrantFiled: August 29, 2008Date of Patent: July 20, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Tomoyuki Aoki, Takuya Tsurume, Hiroki Adachi, Hisashi Ohtani
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Patent number: 7749819Abstract: It is an object to obtain a crystalline silicon film having preferable characteristics for a thin film transistor. A crystalline silicon film having improved crystallinity is obtained by the following steps: forming a silicon nitride film substantially in contact with an amorphous silicon film on glass substrate; introducing a catalyst element such as nickel; performing an annealing treatment at a temperature of 500 to 600° C. for crystallization; and further irradiating it with a laser light, thereby a crystalline silicon film having improved crystallinity can be obtained. By using the crystalline silicon film thus obtained, a semiconductor device such as a TFT having improved characteristic can be obtained.Type: GrantFiled: June 6, 2007Date of Patent: July 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hisashi Ohtani, Akiharu Miyanaga, Hongyong Zhang, Naoaki Yamaguchi
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Patent number: 7736958Abstract: In the present application, is disclosed a method of manufacturing a flexible semiconductor device having an excellent reliability and tolerance to the loading of external pressure. The method includes the steps of: forming a separation layer over a substrate having an insulating surface; forming an element layer including a semiconductor element comprising a non-single crystal semiconductor layer, over the separation layer; forming an organic resin layer over the element layer; providing a fibrous body formed of an organic compound or an inorganic compound on the organic resin layer; heating the organic resin layer; and separating the element layer from the separation layer. This method allows the formation of a flexible semiconductor device having a sealing layer in which the fibrous body is impregnated with the organic resin.Type: GrantFiled: March 14, 2008Date of Patent: June 15, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Dozen, Eiji Sugiyama, Hisashi Ohtani, Takuya Tsurume
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Publication number: 20100144077Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: ApplicationFiled: February 12, 2010Publication date: June 10, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Hisashi OHTANI, Hiroyuki SHIMADA, Mitsunori SAKAMA, Hisashi ABE, Satoshi TERAMOTO
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Publication number: 20100134709Abstract: There is disclosed an active matrix reflective liquid crystal display panel on which an active matrix circuit is integrated with peripheral driver circuits. Metal lines in the peripheral driver circuits are formed simultaneously with pixel electrodes. Thus, neither the process sequence nor the structure is complicated.Type: ApplicationFiled: January 7, 2010Publication date: June 3, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Hisashi OHTANI, Jun KOYAMA, Satoshi TERAMOTO
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Patent number: 7709837Abstract: Nickel is selectively held in contact with a particular region of an amorphous silicon film. Crystal growth parallel with a substrate is effected by performing a heat treatment. A thermal oxidation film is formed on the silicon film by performing a heat treatment in an oxidizing atmosphere containing a halogen element. During this step, in the silicon film, impurities included such as oxygen or chlorine, are segregated with extending along the crystal growth, the crystallinity is improved, and the gettering of nickel element proceeds. A thin-film transistor is formed so that the direction connecting source and drain regions coincides with the above crystal growth direction. As a result, a TFT having superior characteristics such as a mobility larger than 200 cm2/Vs and an S value smaller than 100 mV/dec. can be obtained.Type: GrantFiled: July 10, 2006Date of Patent: May 4, 2010Assignee: Semiconductor Energy Laboratory Co., LtdInventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
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Publication number: 20100099227Abstract: A semiconductor device having a CMOS structure, wherein, in manufacturing a CMOS circuit, an impurity element which imparts p-type conductivity to the active layer of the p-channel type semiconductor device is added before forming the gate insulating film. Then, by applying thermal oxidation treatment to the active layer, the impurity element is subjected to redistribution, and the concentration of the impurity element in the principal surface of the active layer is minimized. The precise control of threshold voltage is enabled by the impurity element that is present in a trace quantity.Type: ApplicationFiled: December 21, 2009Publication date: April 22, 2010Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Takeshi Fukunaga
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Patent number: 7700421Abstract: A semiconductor device using a crystalline semiconductor film is manufactured. The crystalline semiconductor film is formed by providing an amorphous silicon film with a catalyst metal for promoting a crystallization thereof and then heated for performing a thermal crystallization, following which the crystallized film is further exposed to a laser light for improving the crystallinity. The concentration of the catalyst metal in the semiconductor film and the location of the region to be added with the catalyst metal are so selected in order that a desired crystallinity and a desired crystal structure such as a vertical crystal growth or lateral crystal growth can be obtained. Further, active elements and driver elements of a circuit substrate for an active matrix type liquid crystal device are formed by such semiconductor devices having a desired crystallinity and crystal structure respectively.Type: GrantFiled: July 18, 2008Date of Patent: April 20, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akiharu Miyanaga, Hisashi Ohtani, Yasuhiko Takemura
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Patent number: 7691692Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: September 17, 2008Date of Patent: April 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 7679087Abstract: There is disclosed a method of fabricating a thin-film transistor having excellent characteristics. Nickel element is held in contact with selected regions of an amorphous silicon film. Then, thermal processing is performed to crystallize the amorphous film. Subsequently, thermal processing is carried out in an oxidizing ambient containing a halogen element to form a thermal oxide film. At this time, the crystallinity is improved. Also, gettering of the nickel element proceeds. This crystalline silicon film consists of crystals grown radially from a number of points. Consequently, the thin-film transistor having excellent characteristics can be obtained.Type: GrantFiled: August 9, 2002Date of Patent: March 16, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Yasushi Ogata, Masahiko Hayakawa, Mitsuaki Osame, Hisashi Ohtani, Toshiji Hamatani
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Patent number: 7675583Abstract: There is disclosed an active matrix reflective liquid crystal display panel on which an active matrix circuit is integrated with peripheral driver circuits. Metal lines in the peripheral driver circuits are formed simultaneously with pixel electrodes. Thus, neither the process sequence nor the structure is complicated.Type: GrantFiled: November 21, 2005Date of Patent: March 9, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Jun Koyama, Satoshi Teramoto
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Publication number: 20100055852Abstract: There is disclosed a method of fabricating TFTs having reduced interconnect resistance by having improved contacts to source/drain regions. A silicide layer is formed in intimate contact with the source/drain regions. The remaining metallization layer is selectively etched to form a contact pad or conductive interconnects.Type: ApplicationFiled: November 10, 2009Publication date: March 4, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hisashi Ohtani, Etsuko Fujimoto
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Patent number: 7670935Abstract: Island-like semiconductor films and markers are formed prior to laser irradiation. Markers are used as positional references so as not to perform laser irradiation all over the semiconductor within a substrate surface, but to perform a minimum crystallization on at least indispensable portion. Since the time required for laser crystallization can be reduced, it is possible to increase the substrate processing speed. By applying the above-described constitution to a conventional SLS method, a means for solving such problem in the conventional SLS method that the substrate processing efficiency is insufficient, is provided.Type: GrantFiled: February 16, 2006Date of Patent: March 2, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akihisa Shimomura, Hisashi Ohtani, Masaaki Hiroki, Koichiro Tanaka, Aiko Shiga, Mai Akiba, Kenji Kasahara
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Patent number: 7667235Abstract: There is provided a technique to form a single crystal semiconductor thin film or a substantially single crystal semiconductor thin film. A catalytic element for facilitating crystallization of an amorphous semiconductor thin film is added to the amorphous semiconductor thin film, and a heat treatment is carried out to obtain a crystalline semiconductor thin film. After the crystalline semiconductor thin film is irradiated with ultraviolet light or infrared light, a heat treatment at a temperature of 900 to 1200° C. is carried out in a reducing atmosphere. The surface of the crystalline semiconductor thin film is extremely flattened through this step, defects in crystal grains and crystal grain boundaries disappear, and the single crystal semiconductor thin film or substantially single crystal semiconductor thin film is obtained.Type: GrantFiled: August 21, 2006Date of Patent: February 23, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Tamae Takano
