Patents by Inventor Hon-Lin Huang

Hon-Lin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10510661
    Abstract: Semiconductor devices and methods of forming the same are provided. One of the semiconductor devices comprises a conductive layer, a first dielectric layer disposed over the conductive layer, a magnetic layer disposed over the first dielectric layer, and a plurality of tantalum layers and a plurality of tantalum oxide layers alternately disposed between the magnetic layer and the first dielectric layer.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hon-Lin Huang, Chen-Shien Chen, Chin-Yu Ku, Kuan-Chih Huang, Wei-Li Huang
  • Publication number: 20190371653
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first conductive line over a substrate. The method includes forming a first protection cap over a first portion of the first conductive line. The first protection cap and the first conductive line are made of different conductive materials. The method includes forming a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The method includes forming a first opening in the first photosensitive dielectric layer and over the first protection cap. The method includes forming a conductive via structure and a second conductive line over the first conductive line. The conductive via structure is in the first opening and over the first protection cap, and the second conductive line is over the conductive via structure and the first photosensitive dielectric layer.
    Type: Application
    Filed: May 29, 2018
    Publication date: December 5, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Li YANG, Wei-Li HUANG, Sheng-Pin YANG, Chi-Cheng CHEN, Hon-Lin HUANG, Chin-Yu KU, Chen-Shien CHEN
  • Publication number: 20190355660
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate, and the substrate includes a first region and a second region. The semiconductor device structure includes a first conductive structure formed over the first region of the substrate and a bottom magnetic layer formed over the second region of the substrate. The semiconductor device structure also includes a second conductive structure formed over the bottom magnetic layer and a first insulating layer formed over a sidewall surface of the first conductive structure. The semiconductor device structure further includes a second insulating layer formed over the first insulating layer, and the second insulating layer has a stair-shaped structure.
    Type: Application
    Filed: December 17, 2018
    Publication date: November 21, 2019
    Inventors: Hon-Lin HUANG, Wei-Li HUANG, Chun-Kai TZENG, Cheng-Jen LIN, Chin-Yu KU
  • Patent number: 10483226
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Publication number: 20190326239
    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
    Type: Application
    Filed: April 20, 2018
    Publication date: October 24, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Hon-Lin Huang, Chao-Yi Wang, Chen-Shien Chen, Chien-Hung Kuo
  • Publication number: 20190295977
    Abstract: A semiconductor device comprises a semiconductor substrate, a conductive pad over the semiconductor substrate, a conductive bump over the conductive pad, a conductive cap over the conductive bump, and a passivation layer over the semiconductor substrate and surrounding the conductive bump. A combination of the conductive bump and the conductive cap has a stepped sidewall profile. The passivation layer has an inner sidewall at least partially facing and spaced apart from an outer sidewall of the conductive bump.
    Type: Application
    Filed: June 10, 2019
    Publication date: September 26, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU
  • Publication number: 20190295925
    Abstract: Semiconductor devices and methods of forming the same are disclosed. One of the semiconductor devices includes a first conductive layer, an organic layer, a silicon layer, a magnetic layer and a second conductive layer. The organic layer is disposed over and exposes a portion of the first conductive layer. The silicon layer is disposed on and in contact with the organic layer. The magnetic layer is disposed over the first conductive layer. The second conductive layer is disposed over the organic layer and the magnetic layer to electrically connect the first conductive layer.
    Type: Application
    Filed: March 23, 2018
    Publication date: September 26, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Lung Yang, CHIH-HUNG Su, Chen-Shien Chen, Hon-Lin Huang, Kun-Ming Tsai, Wei-Je Lin
  • Publication number: 20190267445
    Abstract: A method of manufacturing a semiconductor device and the semiconductor device are provided in which a plurality of layers with cobalt-zirconium-tantalum are formed over a semiconductor substrate, the plurality of layers are patterned, and multiple dielectric layers and conductive materials are deposited over the CZT material. Another layer of CZT material encapsulates the conductive material.
    Type: Application
    Filed: May 13, 2019
    Publication date: August 29, 2019
    Inventors: Wei-Li Huang, Chi-Cheng Chen, Hon-Lin Huang, Chien-Chih Chou, Chin-Yu Ku, Chen-Shien Chen
  • Publication number: 20190229081
    Abstract: Semiconductor devices are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump. The spacer surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Patent number: 10319695
    Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: June 11, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii, Kai-Di Wu, Chien-Hung Kuo, Chao-Yi Wang, Hon-Lin Huang, Zi-Zhong Wang, Chun-Mao Chiu
  • Patent number: 10290697
    Abstract: A method of manufacturing a semiconductor device and the semiconductor device are provided in which a plurality of layers with cobalt-zirconium-tantalum are formed over a semiconductor substrate, the plurality of layers are patterned, and multiple dielectric layers and conductive materials are deposited over the CZT material. Another layer of CZT material encapsulates the conductive material.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: May 14, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Li Huang, Chi-Cheng Chen, Hon-Lin Huang, Chien-Chih Chou, Chin-Yu Ku, Chen-Shien Chen
  • Patent number: 10276528
    Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Patent number: 10276561
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate. The method includes transferring the substrate from a stage to a deposition chamber, and no heating operation is performed on the stage. The method also includes depositing a resistor layer on the substrate. The resistor layer may have a major structure that is amorphous.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: I-Tseng Chen, Hon-Lin Huang, Chun-Hsien Huang, Yu-Hung Lin
  • Patent number: 10269703
    Abstract: A semiconductor device includes: a first conductive line disposed on a substrate, a second conductive line disposed on the substrate, and the second conductive line separated with the first conductive line by a trench; an insulating layer disposed on the first conductive line and the second conductive line, and filled the trench between the first conductive line and the second conductive line; and a magnetic film having a first surface and a second surface opposite to the first surface, and the first surface disposed on the insulating layer; wherein the first surface has a first concave directly above the trench, and the first concave has a first obtuse angle of at least 170 degree.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Yu Ku, Sheng-Pin Yang, Chen-Shien Chen, Hon-Lin Huang, Chien-Chih Chou, Ting-Li Yang
  • Patent number: 10263064
    Abstract: Semiconductor devices and methods of forming the same are disclosed. One of the semiconductor device includes an inductor structure, and the inductor structure is on a substrate and includes a first metal layer, a magnetic stack, a polymer layer and a second metal layer. The first metal layer is over the substrate. The magnetic stack is over the first metal layer and has a substantially zigzag shaped sidewall. The polymer layer is over the first metal layer and encapsulates the magnetic stack. The second metal layer is over the polymer layer.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 16, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Chien-Chih Chou, Chen-Shien Chen, Hon-Lin Huang, Chi-Cheng Chen, Kuang-Yi Wu
  • Publication number: 20190096804
    Abstract: Semiconductor devices and methods of forming the same are provided. One of the semiconductor devices comprises a conductive layer, a first dielectric layer disposed over the conductive layer, a magnetic layer disposed over the first dielectric layer, and a plurality of tantalum layers and a plurality of tantalum oxide layers alternately disposed between the magnetic layer and the first dielectric layer.
    Type: Application
    Filed: November 29, 2018
    Publication date: March 28, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hon-Lin Huang, Chen-Shien Chen, Chin-Yu Ku, Kuan-Chih Huang, Wei-Li Huang
  • Publication number: 20190051545
    Abstract: A semiconductor processing station including a central transfer chamber, a load lock chamber disposed adjacent to the central transfer chamber, and a cooling stage disposed adjacent to the load lock chamber and the central transfer chamber is provided. The load lock chamber is adapted to contain a wafer carrier including a plurality of wafers. The central transfer chamber communicates between the cooling stage and the load lock chamber to transfer a wafer of the plurality of wafers between the cooling stage and the load lock chamber.
    Type: Application
    Filed: October 14, 2018
    Publication date: February 14, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Wei Lu, Hon-Lin Huang, Hung-Chih Wang
  • Publication number: 20190027553
    Abstract: A method of manufacturing a semiconductor device and the semiconductor device are provided in which a plurality of layers with cobalt-zirconium-tantalum are formed over a semiconductor substrate, the plurality of layers are patterned, and multiple dielectric layers and conductive materials are deposited over the CZT material. Another layer of CZT material encapsulates the conductive material.
    Type: Application
    Filed: September 24, 2018
    Publication date: January 24, 2019
    Inventors: Wei-Li Huang, Chi-Cheng Chen, Hon-Lin Huang, Chien-Chih Chou, Chin-Yu Ku, Chen-Shien Chen
  • Publication number: 20190027452
    Abstract: A semiconductor device and a manufacturing method for the semiconductor device are provided. The semiconductor device includes a first dielectric layer, a bump, an etching stop layer and a spacer. The first dielectric layer is disposed over and exposes a conductive structure. The bump is partially disposed in the first dielectric layer to electrically connect the conductive structure. The etching stop layer is disposed over the first dielectric layer aside the bump a spacer and surrounds the bump and disposed between the etching stop layer and the bump.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 24, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Yu Ku, Cheng-Lung Yang, Chen-Shien Chen, Hon-Lin Huang, Chao-Yi Wang, Ching-Hui Chen, Chien-Hung Kuo
  • Publication number: 20190006303
    Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
    Type: Application
    Filed: September 26, 2017
    Publication date: January 3, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Yu WU, Ching-Hui CHEN, Mirng-Ji LII, Kai-Di WU, Chien-Hung KUO, Chao-Yi WANG, Hon-Lin HUANG, Zi-Zhong WANG, Chun-Mao CHIU