Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.

Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to output a reset signal, command/address signals and data. The second semiconductor device may be configured to generate internal commands, internal addresses and internal data for performing an initialization operation. The second semiconductor device may be configured to store the internal data in a plurality of memory cells selected by the internal commands and the internal addresses.

Abstract: A method for accessing a flash memory module is provide. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least one super block of the flash memory chips; and allocating a buffer memory space to store a plurality of temporary parities generated when data is written into the at least one first super block.

Abstract: Methods for treating central nervous system (CNS) disorders or attenuating pain with a lithium benzoate compound.

Abstract: A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least a first super block and at least a second super block of the flash memory chips; and allocating the second super block to store a plurality of temporary parities generated when data is written into the first super block.

Abstract: The present disclosure relates to a cosmetic vessel. The cosmetic vessel includes a discharge unit discharging cosmetics to an outside, and a discharge plate provided at one side of the discharge unit from which the cosmetics are discharged, the discharge plate including a plurality of discharge holes, wherein the cosmetics are discharged through the plurality of discharge holes of the discharge plate, and a thin film is formed on one surface of the discharge plate exposed to the outside.

Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.

Abstract: A method for accessing a flash memory module is provided. The flash memory module is a 3D flash memory module including a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, each block includes a plurality of pages, and the method includes: configuring the flash memory chips to set at least one super block of the flash memory chips; and allocating a buffer memory space to store a plurality of temporary parities generated when data is written into the at least one first super block.

Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to output commands and addresses. The first semiconductor device may be configured to output a strobe signal toggled and data after an initialization operation. The second semiconductor device may be configured to start the initialization operation if the commands have a first combination and stores internal data having a predetermined level during a set period of the initialization operation if the commands have a second combination.

Abstract: A method used in a flash memory module having a plurality of storage blocks is disclosed. Each storage block can be used as a first block or a second block wherein a cell of the first block is arranged for storing data of 1 bit and a cell of the second block is arranged for storing data of at least 2 bits. The method includes: classifying data to be programmed into a plurality of groups of data; executing error code encoding to generate a corresponding parity check code to store the groups of data and the corresponding parity check code to at least one block of first blocks; and after completing storing the groups of data, performing an internal copy operation upon the groups of data and the corresponding parity check code from the at least one block of the first blocks to at least one second block.

Abstract: A method used for a flash memory module having a plurality of storage blocks each can be used as a first block or a second block includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate a first corresponding parity check code to store the groups of data and the first corresponding parity check code into the flash memory module as first blocks; reading out the groups of data from the first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon the de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon the randomized data to generate a second corresponding parity check code; and storing the randomized data and the second corresponding parity check code into the flash memory module as the second block.

Abstract: A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programming and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.

Abstract: A method used for a flash memory module having a plurality of storage blocks each can be used as a first block or a second block includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate a first corresponding parity check code to store the groups of data and the first corresponding parity check code into the flash memory module as first blocks; reading out the groups of data from the first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon the de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon the randomized data to generate a second corresponding parity check code; and storing the randomized data and the second corresponding parity check code into the flash memory module as the second block.

Abstract: A method used in a flash memory module having a plurality of storage blocks is disclosed. Each storage block can be used as a first block or a second block wherein a cell of the first block is arranged for storing data of 1 bit and a cell of the second block is arranged for storing data of at least 2 bits. The method includes: classifying data to be programmed into a plurality of groups of data; executing error code encoding to generate a corresponding parity check code to store the groups of data and the corresponding parity check code to at least one block of first blocks; and after completing storing the groups of data, performing an internal copy operation upon the groups of data and the corresponding parity check code from the at least one block of the first blocks to at least one second block.

Abstract: A memory management method applicable to a data storage device is provided. The memory management method includes steps of: requesting a private memory space from a host; recording a reserved memory space given by the host; dividing a mapping table into a plurality of sub-mapping tables; determining whether a capacity of the reserved memory space is sufficient to store the sub-mapping tables; and if yes, uploading the sub-mapping tables to the reserved memory space via an interface logic.

Abstract: An operating method for a data storage device is provided. The operating method includes steps of: dividing a mapping table into a plurality of sub-mapping tables; receiving an access command comprising a data address and a command category; determining whether a target sub-mapping table corresponding to the data address has been cached, wherein the target sub-mapping table is one of the sub-mapping tables; and if false, reading and caching the target sub-mapping table from the sub-mapping tables.

Abstract: A garbage collection method for a data storage device includes steps of: entering a background mode from a foreground mode; selecting a plurality of source data blocks from a plurality of in-use data blocks; dividing a mapping table into a plurality of sub-mapping tables and selecting one of the sub-mapping tables as a target sub-mapping table, wherein the target sub-mapping table is used to manage one of the source data blocks; selecting a destination data block from a plurality of spare data blocks; and sequentially updating a correspondence relationship of data stored in the target sub-mapping table from the source data blocks to the destination data block, wherein the updating comprises copying the data stored in the source data blocks to the destination data block.

Abstract: Disclosed is a steering angle detecting apparatus, which detects a rotation angle of a steering wheel, and the apparatus includes a main gear configured to rotate in association with a steering shaft connected to the steering wheel, and a plurality of sub gears respectively having a magnet and configured to rotate in engagement with the main gear, wherein a triangle obtained by connecting centers of the main gear and the plurality of sub gears has an area of 334 mm2 or above and 528 mm2 or below.

Abstract: A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programing and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.

Abstract: The present invention relates to an improved food waste dryer utilizing waste heat, which includes a main frame, a dryer drum with an access door, to be positioned in the main frame, and an agitator positioned in the dryer drum. The improved food waste dryer comprises: a waste heat supply unit, a heating jacket positioned on the outer surface of the dryer drum, with a hot-air inlet to receive the waste heat from the waste heat supply unit and a hot-air outlet to discharge the waste heat inside the dryer drum, and a condensation system positioned in the main frame, to remove moisture included in the interior air of the dryer drum to increase the drying efficiency of the food waste dryer utilizing waste heat.