Abstract: A semiconductor device includes a substrate, a plurality of gate electrodes extending in a first direction parallel to an upper surface of a substrate on the substrate, and alternately arranged with an interlayer insulating layer in a second direction perpendicular to the upper surface of the substrate, a vertical channel layer on a sidewall of a vertical channel hole extending in the second direction by penetrating through the plurality of gate electrodes and the interlayer insulating layer, and connected to the upper surface of the substrate, and a first gap-fill insulating layer formed in the vertical channel hole and including an outer wall contacting the vertical channel layer and an inner wall opposite the outer wall, wherein a part of the inner wall forms a striation extending in the second direction.

Abstract: In one embodiment, the semiconductor device includes a stack of alternating first interlayer insulating layers and gate electrode layers on a substrate. At least one of the gate electrode layers has a first portion and a second portion. The second portion forms an end portion of the at least one gate electrode layer, and a bottom surface of the second portion is at a lower level than a bottom surface of the first portion. A contact plug extends from the second portion.

Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including interlayer insulating layers and first gate electrodes alternately stacked on each other, a semiconductor layer in an opening penetrating through the stack structure, a first dielectric layer between the semiconductor layer and the stack structure, and a lower pattern closer to the substrate than to the first gate electrodes in the stack structure, the lower pattern including a first surface facing the first dielectric layer, and a second surface facing the stack structure, the second surface defining an acute angle with the first surface, wherein the first dielectric layer includes a first portion facing the stack structure, and a second portion facing the first surface of the lower pattern, the second portion having a thickness greater than a thickness of the first portion.

Abstract: A semiconductor memory device may include: a stacking structure including a plurality of insulating layers and a plurality of gate electrodes alternately stacked on a substrate; a lower semiconductor pattern that protrudes from the top of the substrate; a vertical insulating pattern that extends in a vertical direction from the substrate and penetrates the stacking structure; and a vertical channel pattern on the inner surface of the vertical insulating pattern and contacting the lower semiconductor pattern, wherein an upper part of the lower semiconductor pattern includes a recess region including a curve-shaped profile, and in the recess region, the outer surface of a lower part of the vertical channel pattern contacts the lower semiconductor pattern along a curve of the recess region.

Abstract: A semiconductor device may include gate electrodes and interlayer insulating layers alternately stacked on a substrate, a channel layer penetrating the gate electrodes and the interlayer insulating layers, a gate dielectric layer between the gate electrodes and the channel layer, a filling insulation that fills at least a portion of an interior of the channel layer, a charge fixing layer between the channel layer and the filling insulation and including a high-k material and/or a metal, and a conductive pad connected to the channel layer and on the filling insulation. The conductive pad may be physically separated from the charge fixing layer.

Abstract: A vertical-type memory device may include a channel layer vertically extending on a substrate, a ground selection transistor at a side of the channel layer on the substrate, the ground selection transistor including a first gate insulation portion and a first replacement gate electrode, an etch control layer on the first replacement gate electrode, and a memory cell on the etch control layer, the memory cell including a second gate insulation portion and a second replacement gate electrode. The etch control layer may include a polysilicon layer doped with carbon, N-type impurities, or P-type impurities, or may include a polysilicon oxide layer comprising carbon, N-type impurities, or P-type impurities. A thickness of the first replacement gate electrode may be the same as a thickness of the second replacement gate electrode, or the first replacement gate electrode may be thicker than the second.

Abstract: In one embodiment, the semiconductor device includes a stack of alternating first interlayer insulating layers and gate electrode layers on a substrate. At least one of the gate electrode layers has a first portion and a second portion. The second portion forms an end portion of the at least one gate electrode layer, and a bottom surface of the second portion is at a lower level than a bottom surface of the first portion. A contact plug extends from the second portion.

Abstract: A vertical-type memory device may include a channel layer vertically extending on a substrate, a ground selection transistor at a side of the channel layer on the substrate, the ground selection transistor including a first gate insulation portion and a first replacement gate electrode, an etch control layer on the first replacement gate electrode, and a memory cell on the etch control layer, the memory cell including a second gate insulation portion and a second replacement gate electrode. The etch control layer may include a polysilicon layer doped with carbon, N-type impurities, or P-type impurities, or may include a polysilicon oxide layer comprising carbon, N-type impurities, or P-type impurities. A thickness of the first replacement gate electrode may be the same as a thickness of the second replacement gate electrode, or the first replacement gate electrode may be thicker than the second.

Abstract: An antifreeze member includes a metal substrate, and a first coating layer including a recombinant antifreeze protein in which a metal-binding protein is conjugated to a performance-enhancing reformed antifreeze protein, and being bonded to the metal substrate via the metal-binding protein.

Abstract: A method of manufacturing a semiconductor device, the method including forming a structure on a substrate, the structure including a metal pattern, at least a portion of the metal pattern being exposed; forming a preliminary buffer oxide layer to cover the structure, a metal oxide layer being formed at the exposed portion of the metal pattern; and deoxidizing the metal oxide layer so that the preliminary buffer oxide layer is transformed into a buffer oxide layer.

Abstract: In a reactor for solid ammonium salt, a method of controlling the reactor, and a NOx emission purification system using solid ammonium salt and selective catalytic reduction, the reactor includes a first chamber and a second chamber. The first chamber has an exhaust and a first heating element. Solid ammonium salt is in the first chamber. The second chamber has a second heating element and is formed at a side of the first chamber. The first chamber is connected with the second chamber. Solid ammonium salt is in the second chamber. An amount of the solid ammonium salt in the second chamber is more than that in the first chamber, so that the first chamber is heated and cooled faster than the second chamber.

Abstract: An electronic apparatus, including an emissive display configured to provide a first image having a first image quality; a transparent display disposed on the emissive display and configured to provide a second image having a second image quality; and a controller configured to control the emissive display to provide the first image in according to first mode and control the transparent display to provide the second image according to a second mode.

Abstract: A method of manufacturing a semiconductor device, the method including forming a structure on a substrate, the structure including a metal pattern, at least a portion of the metal pattern being exposed; forming a preliminary buffer oxide layer to cover the structure, a metal oxide layer being formed at the exposed portion of the metal pattern; and deoxidizing the metal oxide layer so that the preliminary buffer oxide layer is transformed into a buffer oxide layer.

Abstract: Systems and methods in accordance with embodiments of the invention utilize technology to facilitate student question creation. Interactive platforms such as mobile phones or tablets can allow questions to be written, saved, and communicated electronically. In one embodiment, a method for collaboratively generating a question includes generating question data in response to input of a question and answer choices on a first device, sending the question data to a repository, sending the question data from the repository to a second device, displaying the question and answer choices on the second device, generating revised question data in response to input that changes the question, sending the revised question data to the repository, sending the revised question data to a third device, displaying the question and answer choices on the third device, receiving input of the selection of answer choices on the third device, and providing feedback whether the selection is correct.

Abstract: The present invention relates to a technology of reducing nitrogen oxide (NOx) which is harmful discharge gas discharged from an internal combustion engine or a combustor, and to an exhaust gas purification system which inputs solid ammonium salt such as ammonium carbamate or ammonium carbonate into a reactor, thermally decomposes and converts the solid ammonium salt into the ammonia by using engine cooling water, exhaust gas, or an electric heater, which are installed in the reactor, and reduces the nitrogen oxide included in the exhaust pipe on a selective catalytic reduction into nitrogen by injecting the ammonia by using a pressure regulator and a dosing valve.

Abstract: An antifreeze member includes a metal substrate, and a first coating layer including a recombinant antifreeze protein in which a metal-binding protein is conjugated to a performance-enhancing reformed antifreeze protein, and being bonded to the metal substrate via the metal-binding protein.

Abstract: A heat exchanger having an improved structure in which heat-exchanging efficiency can be improved includes: a refrigerant pipe through which a refrigerant flows; and a plurality of fins that are coupled to an outer circumferential surface of the refrigerant pipe, wherein the plurality of fins include: a first region formed downstream in a direction in which air flows; and a second region formed upstream in the direction in which air flows, and at least one coating layer is formed in the first region and the second region, and thicknesses of the first region and the second region are different from each other.

Abstract: Provided are an organic light emitting display (OLED) device and a method of manufacturing the same. The OLED device includes: an array substrate, an intermediate layer over the array substrate, an insulating layer over the intermediate layer, and a plurality of driving signal lines over the insulating layer in a non-display area of the array substrate, the plurality of driving signal lines being completely separated from the intermediate layer by the insulating layer, each of the plurality of driving signal lines being configured to supply a driving signal from a driving circuit unit to a respective sub-pixel of a pixel among a plurality of pixels, wherein the intermediate layer under the plurality of driving signal lines is configured to reduce visibility of the driving signal lines such that incident light on the intermediate layer is uniformly reflected or absorbed with the plurality of driving signal lines.

Abstract: In a reactor for solid ammonium salt, a method of controlling the reactor, and a NOx emission purification system using solid ammonium salt and selective catalytic reduction, the reactor includes a first chamber and a second chamber. The first chamber has an exhaust and a first heating element. Solid ammonium salt is in the first chamber. The second chamber has a second heating element and is formed at a side of the first chamber. The first chamber is connected with the second chamber. Solid ammonium salt is in the second chamber. An amount of the solid ammonium salt in the second chamber is more than that in the first chamber, so that the first chamber is heated and cooled faster than the second chamber.

Abstract: An OLED device is disclosed that enhances display quality by minimizing capacitance deviation between data lines of the OLED device. The capacitance deviation may be minimized by utilizing an expansion portion of a power line of the OLED device. The capacitance deviation may also by minimized by utilizing an overlap pattern that overlaps a plurality of the data lines.