Abstract: A semiconductor device includes a capacitor having a bottom electrode, a dielectric layer formed on the bottom electrode, a top electrode formed on the dielectric layer, and a contact plug having a metal that is connected with the top electrode, wherein the top electrode includes a doped poly-Si1-xGex layer and a doped polysilicon layer epitaxially deposited on the doped poly-Si1-xGex layer and the contact plug makes a contact with the doped polysilicon layer.

Abstract: The present invention provides electronic methods and apparatus for storing and organizing access to restricted multimedia objects. This is accomplished using semantic networks by interactively defining a semantic network, identifying a relationship between nodes by associating a label with each semantic link, attaching multimedia objects to nodes and restricting user access to multimedia objects and/or the semantic network. The method allows users to access and edit the semantic network in a Java- or AJAX-based platform-independent software environment. The present invention further provides a method for rating semantic networks by allowing viewers to provide feedback regarding a semantic network's value or usefulness and then calculating a rating in accordance with the received feedback. The present invention further provides a method for linking semantic networks to build a knowledge base.

Abstract: A multi-layer membrane includes a fluorine containing layer and a substrate which are joined through spray coating and heat treatment in a multi-step technique.

Abstract: A method of forming a conductive polysilicon thin film and a method of manufacturing a semiconductor device using the same are provided. The method of forming a conductive polysilicon thin film may comprise simultaneously supplying a Si precursor having halogen elements as a first reactant and a dopant to a substrate to form a first reactant adsorption layer that is doped with impurities on the substrate and then supplying a second reactant having H (hydrogen) to the first reactant adsorption layer to react the H of the second reactant with the halogen elements of the first reactant to form a doped Si atomic layer on the substrate.

Abstract: An example embodiment of a non-volatile memory device and an example embodiment of a method of fabricating the same are provided. The non-volatile memory devices includes a tunnel insulation layer on a semiconductor substrate, a charge storage layer on the tunnel insulation layer, a blocking insulation layer including at least one nano dot on the charge storage layer, and a control gate electrode on the blocking insulation layer.

Abstract: A nonvolatile memory device may include: a tunnel insulating layer on a semiconductor substrate; a charge storage layer on the tunnel insulating layer; a blocking insulating layer on the charge storage layer; and a control gate electrode on the blocking insulating layer. The tunnel insulating layer may include a first tunnel insulating layer and a second tunnel insulating layer. The first tunnel insulating layer and the second tunnel insulating layer may be sequentially stacked on the semiconductor substrate. The second tunnel insulating layer may have a larger band gap than the first tunnel insulating layer. A method for fabricating a nonvolatile memory device may include: forming a tunnel insulating layer on a semiconductor substrate; forming a charge storage layer on the tunnel insulating layer; forming a blocking insulating layer on the charge storage layer; and forming a control gate electrode on the blocking insulating layer.

Abstract: A multi-layer article includes a fluoropolymer layer and a substrate which are joined permanently through a multi-step cross-linking technique.

Abstract: In a method of manufacturing a non-volatile memory device, a tunnel insulating layer may be formed on a channel region of a substrate. A charge trapping layer including silicon nitride may be formed on the tunnel insulating layer to trap electrons from the channel region. A heat treatment may be performed using a first gas including nitrogen and a second gas including oxygen to remove defect sites in the charge trapping layer and to densify the charge trapping layer. A blocking layer may be formed on the heat-treated charge trapping layer, and a conductive layer may then formed on the blocking layer. The blocking layer, the conductive layer, the heat-treated charge trapping layer and the tunnel insulating layer may be patterned to form a gate structure on the channel region. Accordingly, data retention performance and/or reliability of a non-volatile memory device including the gate structure may be improved.

Abstract: A polarizer of a liquid crystal display device and a method for manufacturing a liquid crystal display device using the same is disclosed. The polarizer includes a main body, a protection film on the main body, and a cutting line formed on the protection film. A method for manufacturing a liquid crystal display device includes providing a liquid crystal panel and a protection film having an active region and a dummy region, the protection film including at least a cutting line in the dummy region or a boundary area between the active region and the dummy region; attaching the protection film to a polarizer; attaching the polarizer to a liquid crystal panel; and, removing the dummy region of the protection film along the cutting line from the liquid crystal panel.

Abstract: A multi-layer membrane includes a fluorine containing layer and a substrate which are joined through spray coating and heat treatment in a multi-step technique.

Abstract: Provided herein are methods of forming a silicon dioxide layer on a substrate using an atomic layer deposition (ALD) method that include supplying a Si precursor to the substrate and forming on the substrate a Si layer including at least one Si atomic layer; and (b) supplying an oxygen radical to the Si layer to replace at least one Si—Si bond within the Si layer with a Si—O bond, thereby oxidizing the Si layer, to form a silicon dioxide layer on the substrate.

Abstract: In non-volatile memory devices and methods of manufacturing the non-volatile memory devices, a barrier layer having an upper portion of silicon nitride and a lower portion of silicon oxide is formed on a substrate by providing a silicon oxide layer on the substrate and performing a radical nitridation process on an upper portion of the silicon oxide layer. A trapping layer including silicon nitride is formed on the barrier layer. A blocking layer and a gate electrode layer are subsequently formed on the trapping layer. The gate electrode layer, the blocking layer, the trapping layer and the barrier layer are then partially etched to provide a gate structure.

Abstract: A method of forming a conductive polysilicon thin film and a method of manufacturing a semiconductor device using the same are provided. The method of forming a conductive polysilicon thin film may comprise simultaneously supplying a Si precursor having halogen elements as a first reactant and a dopant to a substrate to form a first reactant adsorption layer that is doped with impurities on the substrate and then supplying a second reactant having H (hydrogen) to the first reactant adsorption layer to react the H of the second reactant with the halogen elements of the first reactant to form a doped Si atomic layer on the substrate.

Abstract: A non-volatile memory device comprises a floating gate formed across an active region of a semiconductor substrate, and a control gate electrode formed over the floating gate. An insulation pattern is formed between the floating gate and the active region such that the insulation pattern makes contact with a bottom edge and a sidewall of the floating gate.

Abstract: A method for forming a non-volatile memory device is provided. According to the method, a device isolation layer defining an active region is formed on the device isolation layer. An upper surface of the device isolation layer is formed higher than a surface of the substrate to form a gap region surrounded by the upper portion of the device isolation layer. A tunnel insulation layer is formed on the active region, and a floating gate layer is formed on an entire surface of the substrate. The floating gate layer is reflowed by performing a hydrogen annealing to fill a gap region with the reflowed floating gate layer. The reflowed floating gate layer is planarized until the device isolation layer is exposed to form a floating gate pattern.

Abstract: A semiconductor device includes a capacitor having a bottom electrode, a dielectric layer formed on the bottom electrode, a top electrode formed on the dielectric layer, and a contact plug having a metal that is connected with the top electrode, wherein the top electrode includes a doped poly-Si1-xGex layer and a doped polysilicon layer epitaxially deposited on the doped poly-Si1-xGex layer and the contact plug makes a contact with the doped polysilicon layer.

Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.

Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.

Abstract: A multi-layer article includes a fluoropolymer layer and a substrate which are joined permanently through a multi-step cross-linking technique.