Patents by Inventor Hongyong Zhang
Hongyong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8542339Abstract: Techniques are provided for unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. This permits unification of the cross-sectional structure of the sealing material formation region.Type: GrantFiled: May 31, 2012Date of Patent: September 24, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hongyong Zhang
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Patent number: 8536577Abstract: The present invention provides an active matrix type display device having a high aperture ratio and a required auxiliary capacitor. A source line and a gate line are overlapped with part of a pixel electrode. This overlapped region functions to be a black matrix. Further, an electrode pattern made of the same material as the pixel electrode is disposed to form the auxiliary capacitor by utilizing the pixel electrode. It allows a required value of auxiliary capacitor to be obtained without dropping the aperture ratio. Also, it allows the electrode pattern to function as a electrically shielding film for suppressing the cross-talk between the source and gate lines and the pixel electrode.Type: GrantFiled: August 17, 2012Date of Patent: September 17, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Satoshi Teramoto
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Patent number: 8334964Abstract: A laminated spacer portion formed by laminating various thin films that constitute thin-film transistors is disposed in peripheral driver circuits. As a result, even in a structure in which part of a sealing member is disposed above the peripheral driver circuits, pressure exerted from spacers in the sealing member is concentrated on the laminated spacer portion, whereby destruction of a thin-film transistor of the peripheral driver circuits can be prevented caused by the pressure from the sealing portion.Type: GrantFiled: July 26, 2011Date of Patent: December 18, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Satoshi Teramoto
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Publication number: 20120305927Abstract: The present invention provides an active matrix type display device having a high aperture ratio and a required auxiliary capacitor. A source line and a gate line are overlapped with part of a pixel electrode. This overlapped region functions to be a black matrix. Further, an electrode pattern made of the same material as the pixel electrode is disposed to form the auxiliary capacitor by utilizing the pixel electrode. It allows a required value of auxiliary capacitor to be obtained without dropping the aperture ratio. Also, it allows the o electrode pattern to function as a electrically shielding film for suppressing the cross-talk between the source and gate lines and the pixel electrode.Type: ApplicationFiled: August 17, 2012Publication date: December 6, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hongyong Zhang, Satoshi Teramoto
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Publication number: 20120299008Abstract: Techniques are provided for unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. This permits unification of the cross-sectional structure of the sealing material formation region.Type: ApplicationFiled: May 31, 2012Publication date: November 29, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Hongyong ZHANG
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Patent number: 8319715Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.Type: GrantFiled: September 5, 2008Date of Patent: November 27, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hongyong Zhang
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Patent number: 8283788Abstract: Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In order to remove the undercuttings, a light etching process is carried out to widen the contact holes. Thus, tapering section are obtained, and the covering of connection wiring is improved.Type: GrantFiled: September 16, 2010Date of Patent: October 9, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hongyong Zhang
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Patent number: 8278660Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor having low leak current and high mobility are obtained in the same time in a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.Type: GrantFiled: October 27, 2011Date of Patent: October 2, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
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Patent number: 8273613Abstract: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.Type: GrantFiled: November 19, 2009Date of Patent: September 25, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Yasuhiko Takemura, Toshimitsu Konuma, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi
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Publication number: 20120230994Abstract: The present invention is directed to bladder cancer specific ligand peptides, comprising the amino acid sequence X1DGRX5GF (SEQ ID NO:1), and methods of their use, e.g., for imaging detection for diagnosis of bladder, tumor localization to guide transurethral resection of bladder cancer, imaging detection of bladder cancer for follow-up after the initial treatment that can replace or complement costly cystoscopy, imaging detection of metastatic bladder cancer, and targeted therapy for superficial and metastatic bladder cancer.Type: ApplicationFiled: September 23, 2010Publication date: September 13, 2012Applicant: The Regents Of The University of California, Office of TechnologyInventors: Chong-xian Pan, Hongyong Zhang, Kit S. Lam, Olulanu H. Aina
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Publication number: 20120168880Abstract: Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In order to remove the undercuttings, a light etching process is carried out to widen the contact holes. Thus, tapering section are obtained, and the covering of connection wiring is improved.Type: ApplicationFiled: March 15, 2012Publication date: July 5, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Hongyong Zhang
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Patent number: 8198683Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.Type: GrantFiled: December 2, 2010Date of Patent: June 12, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Akira Sugawara, Yukiko Uehara, Hongyong Zhang, Atsunori Suzuki, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi, Yasuhiko Takemura
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Patent number: 8194224Abstract: Techniques are provided for unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. This permits unification of the cross-sectional structure of the sealing material formation region.Type: GrantFiled: June 6, 2011Date of Patent: June 5, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hongyong Zhang
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Publication number: 20120105788Abstract: A display device of the present invention includes a thin film transistor in a pixel region formed over a substrate, the thin film transistor including an active layer and a gate electrode with a gate insulating film interposed between the active layer and the gate electrode, a silicon nitride film formed over the thin film transistor, a resin film formed over the silicon nitride film, an inorganic insulating film formed over the resin film; a metal layer formed over the substrate; and a sealing material formed over the metal layer, wherein the sealing material covers a region where the resin film is not formed over the silicon nitride film.Type: ApplicationFiled: January 4, 2012Publication date: May 3, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hongyong Zhang, Shunpei Yamazaki, Satoshi Teramoto, Yoshiharu Hirakata
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Patent number: 8154136Abstract: Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In order to remove the undercuttings, a light etching process is carried out to widen the contact holes. Thus, tapering section are obtained, and the covering of connection wiring is improved.Type: GrantFiled: September 16, 2010Date of Patent: April 10, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hongyong Zhang
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Publication number: 20120068266Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor having low leak current and high mobility are obtained in the same time in a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.Type: ApplicationFiled: October 27, 2011Publication date: March 22, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hongyong ZHANG, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
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Publication number: 20120034766Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.Type: ApplicationFiled: August 15, 2011Publication date: February 9, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hisashi OHTANI, Akiharu MIYANAGA, Takeshi FUKUNAGA, Hongyong ZHANG
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Publication number: 20110309369Abstract: Techniques are provided for unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. This permits unification of the cross-sectional structure of the sealing material formation region.Type: ApplicationFiled: June 6, 2011Publication date: December 22, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Hongyong ZHANG
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Patent number: 8062935Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film an a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.Type: GrantFiled: October 15, 2009Date of Patent: November 22, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
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Publication number: 20110278584Abstract: A laminated spacer portion formed by laminating various thin films that constitute thin-film transistors is disposed in peripheral driver circuits. As a result, even in a structure in which part of a sealing member is disposed above the peripheral driver circuits, pressure exerted from spacers in the sealing member is concentrated on the laminated spacer portion, whereby destruction of a thin-film transistor of the peripheral driver circuits can be prevented caused by the pressure from the sealing portion.Type: ApplicationFiled: July 26, 2011Publication date: November 17, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hongyong Zhang, Satoshi Teramoto