Patents by Inventor Hongyong Zhang

Hongyong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7507991
    Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: March 24, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoto Kusumoto
  • Publication number: 20090072238
    Abstract: An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
    Type: Application
    Filed: November 25, 2008
    Publication date: March 19, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuhiko TAKEMURA, Hongyong ZHANG
  • Publication number: 20090072235
    Abstract: A display device of the present invention includes a first substrate and a second substrate opposed to each other, a liquid crystal interposed between the first substrate and the second substrate, an active matrix circuit and a driving circuit each comprising a thin film transistor formed over the first substrate, a resin layer formed over the active matrix circuit and the driving circuit, a spacer formed over the active matrix circuit, a sealing material formed over the driving circuit, and a filler included in the sealing material and in contact with the resin layer.
    Type: Application
    Filed: September 30, 2008
    Publication date: March 19, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hongyong Zhang, Shunpei Yamazaki, Satoshi Teramoto, Yoshiharu Hirakata
  • Patent number: 7504288
    Abstract: A linear laser light which has an energy and is to be scanned is irradiated to a semiconductor device formed on a substrate, and then the substrate is rotated to irradiate to the semiconductor device a linear laser light which has a higher energy than that of the irradiated linear laser light and is to be scanned. Also, in a semiconductor device having an analog circuit region and a remaining circuit region wherein the analog circuit region is smaller than the remaining circuit region, a linear laser light having an irradiation area is irradiated to the analog circuit region without moving the irradiation area so as not to overlap the laser lights by scanning. On the other hand, the linear laser light to be scanned is irradiated to the remaining circuit region.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: March 17, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoaki Yamaguchi, Yasuhiko Takemura
  • Publication number: 20090035923
    Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.
    Type: Application
    Filed: July 15, 2008
    Publication date: February 5, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Akiharu Miyanaga, Takeshi Fukunaga, Hongyong Zhang
  • Publication number: 20090021684
    Abstract: Techniques are provided for unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. This permits unification of the cross-sectional structure of the sealing material formation region.
    Type: Application
    Filed: July 1, 2008
    Publication date: January 22, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Publication number: 20090015534
    Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.
    Type: Application
    Filed: September 5, 2008
    Publication date: January 15, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 7474376
    Abstract: A display device of the present invention includes a first substrate and a second substrate opposed to each other, a liquid crystal interposed between the first substrate and the second substrate, an active matrix circuit and a driving circuit each comprising a thin film transistor formed over the first substrate, a resin layer formed over the active matrix circuit and the driving circuit, a spacer formed over the active matrix circuit, a sealing material formed over the driving circuit, and a filler included in the sealing material and in contact with the resin layer.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: January 6, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Shunpei Yamazaki, Satoshi Teramoto, Yoshiharu Hirakata
  • Patent number: 7459724
    Abstract: A display device having a source line formed over a substrate; a gate line formed over the substrate extending across the source line; a pixel formed over the substrate at an intersection of the source and gate lines, the pixel having: first and second thin film transistors where a source or drain of the first thin film transistor is electrically connected to the source line; a pixel electrode electrically connected to a source or drain of the second thin film transistor where the first and second thin film transistors are electrically connected between the pixel electrode and the source line; where a portion of the source line covers a portion of the first thin film transistor, where a width of the source line is larger than a width of a channel region of the first thin film transistor, and where the pixel electrode does not overlap the source line.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: December 2, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 7456427
    Abstract: An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
    Type: Grant
    Filed: September 14, 2004
    Date of Patent: November 25, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Publication number: 20080258147
    Abstract: In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.
    Type: Application
    Filed: June 20, 2008
    Publication date: October 23, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hongyong ZHANG, Toru TAKAYAMA, Yasuhiko TAKEMURA, Akiharu MIYANAGA, Hisashi OHTANI
  • Patent number: 7435635
    Abstract: A semiconductor material and a method for forming the same, said semiconductor material having produced by a process comprising melting a noncrystal semiconductor film containing therein carbon, nitrogen, and oxygen each at a concentration of 5×1019 atoms·cm?3 or lower, preferably 1×1019 atoms·cm?3 or lower, by irradiating a laser beam or a high intensity light equivalent to a laser beam to said noncrystal semiconductor film, and then recrystallizing the thus molten amorphous silicon film. The present invention provides thin film semiconductors having high mobility at an excellent reproducibility, said semiconductor materials being useful for fabricating thin film semiconductor devices such as thin film transistors improved in device characteristics.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: October 14, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Naoto Kusumoto, Yasuhiko Takemura
  • Publication number: 20080246039
    Abstract: The formation of contact holes and a capacitor is performed in a semiconductor integrated circuit such as an active matrix circuit. An interlayer insulator having a multilayer (a lower layer is silicon oxide; an upper layer is silicon nitride) each having different dry etching characteristic is formed. Using a first mask, the silicon nitride corresponding to the upper layer in the interlayer insulator is etched by dry etching. This etching is completed by using the silicon oxide corresponding to the lower layer as an etching stopper. A pattern is formed using a second mask to form selectively the silicon oxide corresponding to the lower layer. Thus a first portion that the silicon oxide and the silicon nitride are etched and a second portion that only silicon nitride is etched are obtained. The first portion is used as a contact hole. A capacitor is formed in the second portion.
    Type: Application
    Filed: May 2, 2008
    Publication date: October 9, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 7425999
    Abstract: To suppress the occurrence of a failure caused by static electricity in the manufacturing process of an active matrix type display device in which an active matrix circuit and peripheral drive circuits are integrated on a glass substrate, a protective capacitor to be connected to a short ring is formed using a semiconductor layer made from the same material as the active layer of a thin film transistor present under the short ring. This protective capacitor has a function to absorb an electric pulse generated in the plasma using process. Discharge patterns are provided to prevent an electric pulse from affecting each circuit.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: September 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Satoshi Teramoto
  • Patent number: 7423291
    Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: September 9, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 7416907
    Abstract: A low temperature process for fabricating a high-performance and reliable semiconductor device in high yield, comprising forming a silicon oxide film as a gate insulator by chemical vapor deposition using TEOS as a starting material under an oxygen, ozone, or a nitrogen oxide atmosphere on a semiconductor coating having provided on an insulator substrate; and irradiating a pulsed laser beam or an intense light thereto to remove clusters of such as carbon and hydrocarbon to thereby eliminate trap centers from the silicon oxide film. Also claimed is a process comprising implanting nitrogen ions into a silicon oxide film and annealing the film thereafter using an infrared light, to thereby obtain a silicon oxynitride film as a gate insulator having a densified film structure, a high dielectric constant, and an improved-withstand voltage.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: August 26, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang
  • Patent number: 7394516
    Abstract: The present invention related to unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed on those surface, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. As a result, the cross-sectional structure along the line A–A? of the sealing material formation region 107 can be unified.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: July 1, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 7391051
    Abstract: In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: June 24, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Toru Takayama, Yasuhiko Takemura, Akiharu Miyanaga, Hisashi Ohtani
  • Patent number: 7381599
    Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: June 3, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshimitsu Konuma, Akira Sugawara, Yukiko Uehara, Hongyong Zhang, Atsunori Suzuki, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi, Yasuhiko Takemura
  • Patent number: 7371619
    Abstract: In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treatment is carried out to grow crystals (horizontal growth) in directions parallel to the substrate as indicated by arrows (104) to (107). At this point, the regions (108) to (110) having a width of 5 ?m or less serve as stopper regions so that horizontal growth starting from the regions (101) and (102) stops there. In this way, the horizontal growth regions can be formed with high controllability. Then a circuit such as a shift register can be constructed with a region having the same crystal growth form.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: May 13, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang