Abstract: Various embodiments of the present invention are generally directed to an apparatus and method for providing a fault-tolerant non-volatile buddy memory structure, such as a buddy cache structure for a controller in a data storage device. A semiconductor memory array of blocks of non-volatile resistive sense memory (RSM) cells is arranged to form a buddy memory structure comprising a first set of blocks in a first location of the array and a second set of blocks in a second location of the array configured to redundantly mirror the first set of blocks. A read circuit decodes a fault map which identifies a defect in a selected one of the first and second sets of blocks and concurrently outputs data stored in the remaining one of the first and second sets of blocks responsive to a data read operation upon said buddy memory structure.

Abstract: Apparatus and associated method for asymmetric write current compensation for resistive sense memory (RSM) cells, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) cells. In accordance with some embodiments, an RSM cell includes an RSM element coupled to a switching device. The switching device has a plurality of terminals. A control circuit compensates for asymmetric write characteristics of the RSM cell by limiting a range of voltage differentials across the terminals so as to be equal to or less than a magnitude of a source voltage applied to the switching device, thereby providing bi-directional write currents of substantially equal magnitude through the RSM element.

Abstract: Memory units that have a magnetic tunnel junction cell that utilizes spin torque and a current induced magnetic field to assist in the switching of the magnetization orientation of the free layer of the magnetic tunnel junction cell. The memory unit includes a spin torque current source for passing a current through the magnetic tunnel junction cell, the spin torque current source having a direction perpendicular to the magnetization orientations, and also includes a magnetic ampere field current source is oriented in a direction orthogonal or at some angles to the magnetization orientations.

Abstract: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

Abstract: A memory array and a method for accessing a memory array including: receiving an address from a host related to relevant data; accessing a first module based on the address received from the host, wherein accessing the first module includes: decoding the address for the first module; enabling a wordline based on the decoded address for the first module and sensing the contents of one or more bits at the decoded address for the first module; and outputting information regarding the first module; and accessing a second module based on the address received from the host, wherein accessing the second module includes: decoding the address for the second module; enabling a wordline based on the decoded address for the second module and sensing the contents of one or more bits at the decoded address for the second module; and outputting information regarding the second module, wherein the step of decoding the address for the second module occurs while the step of enabling a wordline based on the decoded address for

Abstract: A memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching.

Abstract: A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.

Abstract: A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device.

Abstract: A spin-transfer torque memory apparatus and non-destructive self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage and storing the first bit line read voltage in a first voltage storage device. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state and forming a second bit line read voltage and storing the second bit line read voltage in a second voltage storage device. The first read current is less than the second read current. Then the stored first bit line read voltage is compared with the stored second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

Abstract: The present invention relates to a circuit and a method for repairing a broken line of a flat panel display device. The circuit includes a second repairing line and a resistance access port is disposed on the second repairing line. The method includes: disposing a resistance access port on a second repairing line of the flat panel display device; and connecting a resistance meeting a display requirement to the resistance access port. The above solutions enable the circuit for repairing to adjust the load resistance so as to adjust the display effect by disposing the resistance access port; thereby improving the repairing effect and making the display quality of the repaired flat panel display device meet the requirement.

Abstract: The present invention relates to an array substrate of TFT-LCD and Method for manufacturing the same. The array substrate includes: gate lines, data lines, pixel electrodes and TFTs formed on a substrate; and a grid graph formed on each of the pixel electrode to make each of the pixel electrodes be simultaneously a built-in polarizer and change natural lights into linear polarized lights. The method for manufacturing an array substrate includes: forming a graph including gate electrodes and gate lines on a substrate; depositing continuously a gate insulating layer, a semiconductor layer and a doped semiconductor layer, and forming graphs of semiconductor layers and doped semiconductor layers above the gate electrodes; forming graphs of source electrodes, drain electrodes, data lines and pixel electrodes, in which a grid graph formed on each of the pixel electrode to make each of the pixel electrodes be simultaneously a built-in polarizer and change natural lights into linear polarized lights.

Abstract: The present invention relates to a polarizer and a method for produce for producing the same, and an LCD device. The polarizer includes a glass substrate and a metal wire grating disposed on the glass substrate. The polarizer disposed on the LCD device can greatly lower cost of the polarizer and the LCD device. Besides, the polarizer does not absorb incident lights so as to greatly reduce energy loss of lights passing through the polarizer and improve the utilization rate of light energy.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.

Abstract: The invention relates to methods and apparatus that allow data to be stored in a magnetic memory cell, such as a giant magneto-resistance (GMR) cell, of a magnetoresistive random access memory (MRAM). Embodiments of the invention advantageously wind a word line around a magnetic memory cell to increase the magnetic field induced by the word line. The word line can be formed by connecting a segment in a first layer to a segment in a second layer with the memory cell disposed between the first layer and the second layer. Advantageously, embodiments of the invention can include relatively narrow magnetic memory cells, and/or bit lines, have relatively high write selectivity, and can use relatively low word currents to store data. In one MRAM, current is passed through a word line by allowing current to flow through a corresponding word row line and a corresponding word column line.