Patents by Inventor Howard E. Rhodes

Howard E. Rhodes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7952096
    Abstract: An apparatus and method for fabricating an array of backside illuminated (“BSI”) image sensors is disclosed. Front side components of the BSI image sensors are formed into a front side of the array. A dopant layer is implanted into a backside of the array. The dopant layer establishes a dopant gradient to encourage photo-generated charge carriers to migrate towards the front side of the array. At least a portion of the dopant layer is annealed. A surface treatment is formed on the backside of the dopant layer to cure surface defects.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: May 31, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7948018
    Abstract: An image sensor pixel includes a substrate, an epitaxial layer, and a light collection region. The substrate is doped to have a first conductivity type. The epitaxial layer is disposed over the substrate and doped to have a second conductivity type opposite of the first conductivity type. The light collection region is disposed within the epitaxial layer for collecting photo-generated charge carriers. The light collection region is doped to have the first conductivity type as well.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 24, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: Vincent Venezia, Hidetoshi Nozaki, Duli Mao, Yin Qian, Hsin-Chih Tai, Howard E. Rhodes
  • Publication number: 20110115002
    Abstract: A backside illuminated imaging sensor with reinforced pad structure includes a device layer, a metal stack, an opening and a frame. The device layer has an imaging array formed in a front side of the device layer and the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer where the metal stack includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The frame is disposed within the opening to structurally reinforce the metal pad.
    Type: Application
    Filed: November 17, 2009
    Publication date: May 19, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Duli Mao, Vincent Venezia, Yin Qian
  • Patent number: 7943505
    Abstract: A four layer interconnect structure is disclosed which includes a bottom conductive reactive layer such as titanium, a conductive barrier layer, such as titanium nitride, a conductive layer, such as aluminum-copper alloy, and a top conductive barrier layer, such as titanium nitride. The interconnection structure can be fabricated using conventional sputter deposition technology. The resulting interconnection structure provides a highly conductive thin film structure that provides good contact to tungsten plugs with small contact dimensions, good patternability on fine lines, and good reliability.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: May 17, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Howard E. Rhodes, Steven D. Cummings
  • Patent number: 7939357
    Abstract: An active pixel using a photodiode with multiple species of P type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is a P? region formed within an N-type region. The P? region is formed from an implant of boron and an implant of indium. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: May 10, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7936955
    Abstract: A waveguide and resonator are formed on a lower cladding of a thermo optic device, each having a formation height that is substantially equal. Thereafter, the formation height of the waveguide is attenuated. In this manner, the aspect ratio as between the waveguide and resonator in an area where the waveguide and resonator front or face one another decreases (in comparison to the prior art) thereby restoring the synchronicity between the waveguide and the grating and allowing higher bandwidth configurations to be used. The waveguide attenuation is achieved by photomasking and etching the waveguide after the resonator and waveguide are formed. In one embodiment the photomasking and etching is performed after deposition of the upper cladding. In another, it is performed before the deposition. Thermo optic devices, thermo optic packages and fiber optic systems having these waveguides are also taught.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: May 3, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Guy T. Blalock, Howard E. Rhodes, Vishnu K. Agarwal, Gurtej Singh Sandhu, James S. Foresi, Jean-Francois Viens, Dale G. Fried
  • Publication number: 20110095188
    Abstract: A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer.
    Type: Application
    Filed: January 4, 2011
    Publication date: April 28, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Yin Qian, Howard E. Rhodes, Hsin-Chih Tai, Vincent Venezia, Duli Mao
  • Patent number: 7932174
    Abstract: A semiconductor device and fabrication process wherein the device includes a conductive layer with a localized thick region positioned below the contact hole. In one embodiment of the invention, the thick region to which contact is made is formed by means of an opening in an underlayer of material. This embodiment of the device includes an underlayer of material having an opening therein; a layer of thin conductive material formed on the underlayer and in the opening; and overlayer of material having a contact hole therethrough formed on the layer of thin conductive material; a conductor contacting the layer of thin conductive material through the contact hole; and wherein the opening in the underlayer is positioned below the contact hole and sized and shaped to form a localized thick region in the layer of thin conductive material within the opening.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: April 26, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Howard E. Rhodes, Luan Tran
  • Publication number: 20110089311
    Abstract: An image sensor provides high scalability and reduced image lag. The sensor includes a first imaging pixel that has a first photodiode region formed in a substrate of the image sensor. The sensor also includes a first vertical transfer transistor coupled to the first photodiode region. The first vertical transfer transistor can be used to establish an active channel. The active channel typically extends along the length of the first vertical transfer transistor and couples the first photodiode region to a floating diffusion.
    Type: Application
    Filed: October 20, 2009
    Publication date: April 21, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Vincent Venezia, Hsin-Chih Tai, Duli Mao, Howard E. Rhodes
  • Publication number: 20110089517
    Abstract: An image sensor includes a device wafer substrate of a device wafer, a device layer of the device wafer, and optionally a heat control structure and/or a heat sink. The device layer is disposed on a frontside of the device wafer substrate and includes a plurality of photosensitive elements disposed within a pixel array region and peripheral circuitry disposed within a peripheral circuits region. The photosensitive elements are sensitive to light incident on a backside of the device wafer substrate. The heat control structure is disposed within the device wafer substrate and thermally isolates the pixel array region from the peripheral circuits region to reduce heat transfer between the peripheral circuits region and the pixel array region. The heat sink conducts heat away from the device layer.
    Type: Application
    Filed: August 9, 2010
    Publication date: April 21, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Vincent Venezia, Duli Mao, Hsin-Chih Tai, Yin Qian, Howard E. Rhodes
  • Publication number: 20110085067
    Abstract: An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 14, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Vincent Venezia, Ashish Shah, Rongsheng Yang, Duli Mao, Yin Qian, Hsin-Chih Tai, Howard E. Rhodes
  • Publication number: 20110085062
    Abstract: A system and method for improving image processing. In one aspect of the invention the method includes receiving data indicating an intensity of light incident on a first pixel of a pixel array and determining from the received data if the intensity of incident light on the first pixel satisfies a first condition. A processing operation is performed on data received from a second, third and fourth pixel of the pixel array but skipped on the data received from the first pixel if the first condition is satisfied. The first condition includes whether the first pixel is substantially saturated in response to an intensity of light incident on the first pixel.
    Type: Application
    Filed: October 13, 2009
    Publication date: April 14, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventor: Howard E. Rhodes
  • Patent number: 7919828
    Abstract: A method and structure for reducing dark current in an image sensor includes preventing unwanted electrons from being collected in the photosensitive region of the image sensor. In one embodiment, dark current is reduced by providing a deep n-type region having an n-type peripheral sidewall formed in a p-type substrate region underlying a pixel array region to separate the pixel array region from a peripheral circuitry region of the image sensor. The method and structure also provide improved protection from blooming.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: April 5, 2011
    Assignee: Aptina Imaging Corporation
    Inventors: Howard E. Rhodes, Steve Cole
  • Publication number: 20110068429
    Abstract: An image sensor array includes a substrate layer, a metal layer, an epitaxial layer, a plurality of imaging pixels, and a contact dummy pixel. The metal layer is disposed above the substrate layer. The epitaxial layer is disposed between the substrate layer and the metal layer. The imaging pixels are disposed within the epitaxial layer and each include a photosensitive element for collecting an image signal. The contact dummy pixel is dispose within the epitaxial layer and includes an electrical conducting path through the epitaxial layer. The electrical conducting path couples to the metal layer above the epitaxial layer.
    Type: Application
    Filed: August 2, 2010
    Publication date: March 24, 2011
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Vincent Venezia, Duli Mao, Hsin-Chih Tai, Yin Qian, Howard E. Rhodes
  • Patent number: 7910963
    Abstract: A transistor of a pixel cell for use in a CMOS imager with a low threshold voltage of about 0.3 V to less than about 0.7 V is disclosed. The transistor is provided with high dosage source and drain regions around the gate electrode and with the halo implanted regions and/or the lightly doped LDD regions and/or the enhancement implanted regions omitted from at least one side of the gate electrode. The low threshold transistor is electrically connected to a high voltage transistor with a high threshold voltage of about 0.7 V.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: March 22, 2011
    Assignee: Round Rock Research, LLC
    Inventor: Howard E. Rhodes
  • Patent number: 7910961
    Abstract: A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but substantially not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but substantially not below the first plurality of color pixels.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: March 22, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: Duli Mao, Vincent Venezia, Hsin-Chih Tai, Yin Qian, Howard E. Rhodes
  • Patent number: 7902618
    Abstract: A backside illuminated imaging pixel with improved angular response includes a semiconductor layer having a front and a back surface. The imaging pixel also includes a photodiode region formed in the semiconductor layer. The photodiode region includes a first and a second n-region. The first n-region has a centerline projecting between the front and back surfaces of the semiconductor layer. The second n-region is disposed between the first n-region and the back surface of the semiconductor layer such that the second n-region is offset from the centerline of the first n-region.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: March 8, 2011
    Assignee: Omni Vision Technologies, Inc.
    Inventors: Duli Mao, Vincent Venezia, Hsin-Chih Tai, Yin Qian, Howard E. Rhodes
  • Patent number: 7902624
    Abstract: Embodiments of the invention provide an image sensor that includes a barrier region for isolating devices. The image sensor comprises a substrate and an array of pixel cells formed on the substrate. Each pixel cell comprises a photo-conversion device. The array comprises a first pixel cell having a first configuration, a second pixel cell having a second configuration, and at least one barrier region formed between the first and second pixel cells for capturing and removing charge. The barrier region comprises a charge accumulation region of a particular conductivity type in a substrate electrically connected to a voltage source terminal. The charge accumulation region accumulates charge and prevents charge transference from a pixel cell or peripheral circuitry on one side of the barrier region to a pixel cell on another side of the barrier region.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: March 8, 2011
    Assignee: Aptina Imaging Corporation
    Inventors: Howard E. Rhodes, Richard A. Mauritzson, William T. Quinlin
  • Patent number: 7898010
    Abstract: A pinned photodiode with improved short wavelength light response. In exemplary embodiments of the invention, a gate oxide is formed over a doped, buried region in a semiconductor substrate. A conductor is formed on top of the gate oxide. The gate conductor is transparent, and in one embodiment is a layer of indium-tin oxide. The transparent conductor can be biased to reduce the need for a surface dopant in creating a pinned photodiode region. The biasing of the transparent conductor produces a hole-rich accumulation region near the surface of the substrate. The gate conductor material permits a greater amount of charges from short wavelength light to be captured in the photo-sensing region in the substrate, and thereby increases the quantum efficiency of the photosensor.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: March 1, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard E. Rhodes
  • Patent number: 7888215
    Abstract: An image sensor with a high full-well capacity includes a photosensitive region, a transfer gate, and sidewall spacers. The photosensitive region is formed to accumulate an image charge in response to light. The transfer gate disposed adjacent to the photosensitive region and coupled to selectively transfer the image charge from the photosensitive region to other pixel circuitry. First and second sidewall spacers are disposed on either side of the transfer gate. The first sidewall spacer closest to the photosensitive region is narrower than the second sidewall spacer. In some cases, the first sidewall spacer may be omitted.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: February 15, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Yin Qian, Howard E. Rhodes