Abstract: Systems/techniques that facilitate learning-based clean data selection are provided. In various embodiments, a system can access a raw dataset. In various aspects, the system can select, via execution of a data selection machine learning model, a clean dataset from the raw dataset. In various instances, the system can train a target machine learning model to perform a target task based on the clean dataset. In various aspects, the clean dataset can include candidate-annotation groupings that are in the raw dataset and that are determined by the data selection machine learning model to be suitable for training of the target machine learning model, and the clean dataset can exclude candidate-annotation groupings that are in the raw dataset and that are determined by the data selection machine learning model to not be suitable for training of the target machine learning model.

Abstract: An artificial intelligence platform and associated methods of training and use are disclosed. An example apparatus includes a data pipeline to: preprocess data using one or more preprocessing operations applied to features associated with the data; and enable debugging to visualize the preprocessed data. The example apparatus includes a network to: instantiate one or more differentiable operations in a training configuration to train an artificial intelligence model; capture feedback including optimization and loss information to adjust the training configuration; and store one or more metrics to evaluate performance of the artificial intelligence model.

Abstract: A manufacturing method of a semiconductor thin film transistor (TFT) and a display panel are provided. According to the manufacturing method, a substrate is provided. A semiconductor pattern is formed on the substrate. A first insulating layer is formed on the substrate and covers the semiconductor pattern. A first metal layer is formed on the first insulating layer, and the first insulating layer is located between the semiconductor pattern and the first metal layer. A half-tone mask photoresist pattern is formed on the first metal layer. The half-tone mask photoresist pattern exposes a portion of the first metal layer. The portion of the first metal layer exposed by the half-tone mask photoresist pattern is removed to form a gate. The gate covers a portion of the semiconductor pattern. A source and a drain are formed on the semiconductor pattern.

Abstract: A processing method of a substrate is provided. The substrate is processed by a substrate processing apparatus. The substrate processing apparatus includes a reaction chamber and a secondary chamber surrounding the reaction chamber. The processing method includes: placing the substrate in the reaction chamber; performing a process to increase a pressure in the reaction chamber and a pressure in the secondary chamber, such that the pressure in the secondary chamber is between an atmospheric pressure and the pressure in the reaction chamber; increasing a temperature in the reaction chamber; and processing the substrate by a supercritical fluid in the reaction chamber.

Abstract: A thin film transistor and a method of fabricating the same are provided. The thin film transistor includes a channel layer, a source, a drain, an insulating layer and a gate. The channel layer is disposed on a substrate. The source and the drain are disposed separately on the channel layer. The insulating layer covers the source, the drain and the channel layer. The gate is disposed on the insulating layer, wherein two opposite sidewalls of the channel layer are respectively aligned to a sidewall of the source distant to the drain and a sidewall of the drain distant to the source. The thin film transistor of the invention improves the precision of alignment in the fabricating process, such that the film transistor has an excellent quality.

Abstract: A processing method of a substrate is provided. The substrate is processed by a substrate processing apparatus. The substrate processing apparatus includes a reaction chamber and a secondary chamber surrounding the reaction chamber. The processing method includes: placing the substrate in the reaction chamber; performing a process to increase a pressure in the reaction chamber and a pressure in the secondary chamber, such that the pressure in the secondary chamber is between an atmospheric pressure and the pressure in the reaction chamber; increasing a temperature in the reaction chamber; and processing the substrate by a supercritical fluid in the reaction chamber.

Abstract: A method for manufacturing a pixel structure is provided. A patterned semiconductor material layer, an insulation material layer, and a gate electrode material layer are formed in sequence on a substrate to form a stacked structure. A patterned photoresist layer is formed on the stacked structure by using a photomask. A portion of the stacked structure is removed to pattern the patterned semiconductor material layer into a patterned semiconductor layer by using the patterned photoresist layer as a mask. Another portion of the stacked structure is etched by using a portion of the patterned photoresist layer as a mask until a portion of the semiconductor layer in the stacked structure is exposed. Then, an exposed portion of the semiconductor layer is modified to increase a conductivity of the exposed portion of the semiconductor layer. Finally, the patterned photoresist layer is removed. A pixel structure manufactured by the method is provided.

Abstract: A method for manufacturing a pixel structure is provided. A patterned semiconductor material layer, an insulation material layer, and a gate electrode material layer are formed in sequence on a substrate to form a stacked structure. A patterned photoresist layer is formed on the stacked structure by using a photomask. A portion of the stacked structure is removed to pattern the patterned semiconductor material layer into a patterned semiconductor layer by using the patterned photoresist layer as a mask. Another portion of the stacked structure is etched by using a portion of the patterned photoresist layer as a mask until a portion of the semiconductor layer in the stacked structure is exposed. Then, an exposed portion of the semiconductor layer is modified to increase a conductivity of the exposed portion of the semiconductor layer. Finally, the patterned photoresist layer is removed. A pixel structure manufactured by the method is provided.

Abstract: A method of manufacturing a pixel structure is provided. A gate and a gate insulating layer are formed on a substrate. A channel layer is formed on the gate insulating layer, and the material of the channel layer includes a first metal oxide semiconductor material. A source and a drain are formed on opposite sides of the channel layer. An insulating layer has an opening exposing the drain. First and second transparent electrode material layers are formed on the substrate sequentially, the material of the first transparent electrode material layer includes a second metal oxide semiconductor material, and the material of the second transparent electrode material layer includes a metal oxide conductive material. The first and second transparent electrode material layers are patterned using the same mask to form first and second transparent electrode layers, wherein the first transparent electrode layer is in contact with the drain through the opening.

Abstract: The manufacturing method of the thin film transistor includes the following steps. A gate, a first insulating layer, a second insulating layer, a metal oxide semiconductor layer, a first etching stop layer, a second etching stop layer and a photoresist structure are sequentially formed. The second etching stop layer, the first etching stop layer, and the metal oxide semiconductor layer are patterned using the photoresist structure as a mask to form a pre-second etching stop pattern, a pre-first etching stop pattern, and a metal oxide semiconductor pattern. The pre-second etching stop pattern and the pre-first etching stop pattern are patterned using the remaining thick portion of the photoresist structure as a mask to form a second etching stop pattern and a first etching stop pattern, and a portion of the second insulating layer is removed to form an insulating pattern. A source and a drain are formed.

Abstract: A method of manufacturing a pixel structure is provided. A gate and a gate insulating layer are formed on a substrate. A channel layer is formed on the gate insulating layer, and the material of the channel layer includes a first metal oxide semiconductor material. A source and a drain are formed on opposite sides of the channel layer. An insulating layer has an opening exposing the drain. First and second transparent electrode material layers are formed on the substrate sequentially, the material of the first transparent electrode material layer includes a second metal oxide semiconductor material, and the material of the second transparent electrode material layer includes a metal oxide conductive material. The first and second transparent electrode material layers are patterned using the same mask to form first and second transparent electrode layers, wherein the first transparent electrode layer is in contact with the drain through the opening.

Abstract: A manufacturing method of a metal oxide semiconductor thin film transistor is provided. The manufacturing method includes following steps. A gate, a gate insulating layer, a patterned metal oxide semiconductor layer and a conductive layer are formed on a substrate first. Next, a first patterned photoresist layer and two second patterned photoresist layers are formed on the conductive layer. Next, a first etching process is performed and the first patterned photoresist layer is then removed. Next, a second etching process is performed to form a source and a drain, and the second patterned photoresist layers are then removed. The source and the drain of the present invention are formed by performing two etching processes to different portions of the conductive layer respectively. Thus, the metal oxide semiconductor layer is prevented from being influenced by the processes of forming the source and the drain, and the process stability is maintained.

Abstract: A method for manufacturing a thin-film transistor is provided, including the following steps. A gate electrode is formed on a substrate. An insulating layer is formed on the gate electrode. A patterned active layer is formed on the insulating layer. A conductive layer having a thickness is formed on the patterned active layer and the insulating layer. The thickness of a first portion of the conductive layer that overlies the patterned active layer is reduced to leave the first portion of the conductive layer over the pattern active layer. The conductive layer is etched to expose the patterned active layer under the first portion of the conductive layer.

Abstract: A thin film transistor disposed on a substrate, includes a gate, a gate insulation layer, a first source/drain, a semiconductor layer and a second source/drain. The gate is disposed on the substrate. The gate insulation layer covers the gate and the substrate. The first source/drain is disposed on the gate insulation layer. The semiconductor layer is disposed above the gate, extends from the gate insulation layer to the first source/drain, and includes a first portion disposed on the first source/drain and a second portion connected to the first portion. An electrical conductivity of the first portion is higher than that of the second portion. The second source/drain covers and is in contact with the second portion. A manufacturing method of thin film transistor is further provided.

Abstract: A method for manufacturing a pixel structure is provided. A patterned semiconductor material layer, an insulation material layer, and a gate electrode material layer are formed in sequence on a substrate to form a stacked structure. A patterned photoresist layer is formed on the stacked structure by using a photomask. A portion of the stacked structure is removed to pattern the patterned semiconductor material layer into a patterned semiconductor layer by using the patterned photoresist layer as a mask. Another portion of the stacked structure is etched by using a portion of the patterned photoresist layer as a mask until a portion of the semiconductor layer in the stacked structure is exposed. Then, an exposed portion of the semiconductor layer is modified to increase a conductivity of the exposed portion of the semiconductor layer. Finally, the patterned photoresist layer is removed. A pixel structure manufactured by the method is provided.

Abstract: A thin film transistor disposed on a substrate, includes a gate, a gate insulation layer, a first source/drain, a semiconductor layer and a second source/drain. The gate is disposed on the substrate. The gate insulation layer covers the gate and the substrate. The first source/drain is disposed on the gate insulation layer. The semiconductor layer is disposed above the gate, extends from the gate insulation layer to the first source/drain, and includes a first portion disposed on the first source/drain and a second portion connected to the first portion. An electrical conductivity of the first portion is higher than that of the second portion. The second source/drain covers and is in contact with the second portion. A manufacturing method of thin film transistor is further provided.

Abstract: A mask is provided. The mask includes a plurality of first rows of openings and a plurality of second rows of openings. Each of the first rows of openings includes a plurality of first openings arranged in a row. The first openings located at different first opening rows are aligned in a column direction. Each of the second opening rows includes a plurality of second openings arranged in a row. The second openings located at different second rows of openings are aligned in the column direction. The first opening rows and the second opening rows are disposed alternately, and any one of the second rows of openings is located between two adjacent first rows of openings. The first openings and the second openings are alternately arranged in the row direction.

Abstract: A thin film transistor disposed on a substrate, includes a gate, a gate insulation layer, a first source/drain, a semiconductor layer and a second source/drain. The gate is disposed on the substrate. The gate insulation layer covers the gate and the substrate. The first source/drain is disposed on the gate insulation layer. The semiconductor layer is disposed above the gate, extends from the gate insulation layer to the first source/drain, and includes a first portion disposed on the first source/drain and a second portion connected to the first portion. An electrical conductivity of the first portion is higher than that of the second portion. The second source/drain covers and is in contact with the second portion. A manufacturing method of thin film transistor is further provided.

Abstract: A display unit of a display panel includes three pixels having different colors. Each pixel has a color sub-pixel and a transparent sub-pixel, both approximately arranged in one column along a first direction. Each pixel has a ratio defined by the area of the color sub-pixel divided by the area of the corresponding transparent sub-pixel. The three pixels are arranged in one row along a second direction, and the ratios of the three pixels are different from each other. Thus, the light transmittance of the display unit can be increased, and the area of the color sub-pixel for each pixel can be adjusted according to lighting efficiency.

Abstract: A manufacturing method of an oxide semiconductor thin film transistor according to the disclosure includes the following. A source and a drain are formed. A channel layer is formed between the source and the drain, wherein the channel layer is separated from the source and the drain. An insulation layer is formed, wherein the insulation layer covers the source, the drain, and the channel layer. A first conductor is at least formed in a first opening of the insulation layer, wherein the first conductor contacts the source and the channel layer. A second conductor is at least formed in a second opening of the insulation layer, wherein the second conductor contacts the drain and the channel layer.