Abstract: An active device array substrate is provided. The active device array substrate includes an active matrix device, first bonding pads electrically connected to the active matrix device, second bonding pads electrically insulated from the first bonding pads, test bonding pads disposed between the first and the second bonding pads and separated from the second bonding pads, switch devices disposed between the test bonding pads and the first bonding pads and electrically connected to the test bonding pads, a test signal pad, a switch device control pad, and at least one driving chip electrically connected to the first bonding pads, the second bonding pads, and the test bonding pads. Each test bonding pad is corresponding to one of the second bonding pads. Both the test signal pad for inputting/outputting a test signal and the switch device control pad for turning on/off the switch devices are electrically connected to the switch devices.

Abstract: An array substrate includes a substrate, an organic layer, a via hole, an inorganic layer, and a patterned transparent pixel electrode layer. The thin film transistor is disposed on the substrate, and the thin film transistor comprises a drain electrode. The organic material layer covers the substrate and the thin film transistor. The via hole penetrates the organic material layer and exposes the drain electrode. The inorganic material layer covers at least a sidewall of the via hole and a part of the organic material layer, and exposes the drain electrode through the via hole. The patterned transparent pixel electrode layer is disposed on the first inorganic material layer and in the via hole, and the patterned transparent pixel electrode layer contacts the drain electrode.

Abstract: An inspection circuit is used for inspecting signal wires of a display area. The inspection circuit includes a shorting bar, plural first shorting switches, and plural second shorting switches. The plurality of the first and the second shorting switches are disposed at different sides of the display area for increasing space between each adjacent shorting switch so as to reduce coupling effect. In the inspection circuit, a first shorting switch is electrically connected between the shorting bar and first end of one signal wire, and a second shorting switch is electrically connected between the second end of that signal wire and second end of another signal wire.

Abstract: A pixel structure of a display device disposed on a substrate includes a plurality of sub-pixel structure. Each sub-pixel structure includes a light-absorption region, a reflection region, a first electrode disposed in the light-absorption region, a second electrode disposed in the reflection region, and a plurality of charge-carrying balls disposed over the first electrode and the second electrode. Each of the charge-carrying balls includes a white portion and a black portion. The white portion has a first conductivity type, and the black portion has second conductivity type.

Abstract: A liquid crystal display panel includes a plurality of scan lines, a plurality of data lines, a pixel array, a plurality of first common electrode lines and at least one second common electrode line. The first common electrode lines receive a common electrode signal through at least one first input node positioned at a first side of the pixel array. The second common electrode line receives the common electrode signal through at least one second input node positioned at a second side of the pixel array. In addition, at least one first common electrode line is electrically connected to the second common electrode lines in the pixel array.

Abstract: A method of manufacturing an array substrate includes the following steps. A substrate having a thin film transistor disposed thereon is provided. The thin film transistor includes a gate electrode, a gate insulating layer, a source electrode, and a drain electrode. An organic material layer is formed to cover the substrate and the thin film transistor. A via hole is formed in the organic material layer to expose the drain electrode. A first inorganic material layer is formed to cover at least a sidewall of the via hole and a part of the organic material layer, and the first inorganic material layer exposes at least the drain electrode. A patterned transparent pixel electrode layer is formed on the first inorganic material layer, wherein the patterned transparent pixel electrode layer contacts the drain electrode through the via hole.

Abstract: A fabricating method of a pixel structure is provided, which uses the original processes of fabricating a thin film transistor to simultaneously fabricate a reflective layer with an uneven surface. In the fabrication process of the thin film transistor, a plurality of bumps are formed under the reflective layer which is to be formed later on. The bumps and a gate of the TFT are formed simultaneously or the bumps and a semiconductor layer of the TFT are formed simultaneously. In addition, by stacking layers on the bumps, the reflective layer formed on the bumps can have good uneven shapes on the surface thereon. Therefore, the fabricating method of a pixel structure has simple processes and low manufacturing costs, and can be used for fabricating a transflective pixel structure or a reflective pixel structure.

Abstract: A pixel structure of a display device disposed on a substrate includes a plurality of sub-pixel structure. Each sub-pixel structure includes a light-absorption region, a reflection region, a first electrode disposed in the light-absorption region, a second electrode disposed in the reflection region, and a plurality of charge-carrying balls disposed over the first electrode and the second electrode. Each of the charge-carrying balls includes a white portion and a black portion. The white portion has a first conductivity type, and the black portion has second conductivity type.

Abstract: A pixel structure having capacitor compensation includes a thin-film transistor, and the thin-film transistor includes a source electrode, a drain electrode, a semiconductor layer and a gate electrode. The gate electrode includes a bar-shaped main part, and at least a protrusion part or two indention parts. One of the characteristics of the present invention lies in layout patterns of the drain electrode and gate electrode. An overlapping area between the drain electrode and gate electrode, and the position of the overlapping area can both be kept by virtue of the arrangement of the protrusion part or the indention parts of the gate electrode, even when the alignment between the drain electrode and gate electrode is changed. Therefore, the gate-drain capacitor (Cgd) will not be changed so that the quality of the liquid crystal display will be improved accordingly.

Abstract: A pixel array including first signal lines, second signal lines, switch devices, and pixel units coupling to the first signal lines and the second signal lines through the switch devices is provided. The first signal lines and the second signal lines are formed on different films. Each of the pixel units includes a common electrode line. In each of the pixel units of an ith row, the common electrode line has at least one first line segment and at least one second segment coupled to each other and formed on different films, and a distance between an (i?1)th first signal line and the first line segment is not equal to that between the (i?1)th first signal line and the second line segment. The first signal lines are either scan lines or data lines of the pixel array, and the second signal lines are the other kind.

Abstract: A fabricating method of display panel is provided. A first substrate having display area and non-display area is provided. A pixel array and a spacer layer are respectively formed in the display area and non-display area by forming many first strip electrodes parallel to each other and on the substrate, by forming an organic function layer on the substrate and covering the first strip electrodes, and by forming many second strip electrodes parallel to each other and on the organic function layer. An extension direction of the first strip electrodes is different to that of the second strip electrodes. The spacer layer surrounds the display area. A sealant is formed in the non-display area, and the spacer layer is disposed between the sealant and the pixel array. A second substrate is arranged above the first substrate, and the first substrate and the second substrate are fixed by using the sealant.

Abstract: The resistance measuring device of the present invention includes switch transistors and switch conductive lines disposed between the bonding pads on a first substrate and between the bumps on a second substrate, such that the bonding pads and the bumps are conducted when the transistors are turned on, and the bonding resistance between at least one of the bonding pads and its corresponding bump can be directly measured.

Abstract: An active device array substrate is provided. The active device array substrate includes an active matrix device, first bonding pads electrically connected to the active matrix device, second bonding pads electrically insulated from the first bonding pads, test bonding pads disposed between the first and the second bonding pads and separated from the second bonding pads, switch devices disposed between the test bonding pads and the first bonding pads and electrically connected to the test bonding pads, a test signal pad, a switch device control pad, and at least one driving chip electrically connected to the first bonding pads, the second bonding pads, and the test bonding pads. Each test bonding pad is corresponding to one of the second bonding pads. Both the test signal pad for inputting/outputting a test signal and the switch device control pad for turning on/off the switch devices are electrically connected to the switch devices.

Abstract: A switching device structure of active matrix display is provided. The switching device structure includes a substrate, a plurality of switching-device gate connection lines disposed on the substrate along a first direction and a plurality of switching devices disposed on the substrate along the first direction. Each switching device includes a gate electrode electrically connected to the any two adjacent switching-device gate connection lines, and the gate electrode protrudes from at least one side of the switching-device gate connection line along a second direction.

Abstract: An inspection circuit is used for inspecting signal wires of a display area. The inspection circuit includes a shorting bar, plural first shorting switches, and plural second shorting switches. The plurality of the first and the second shorting switches are disposed at different sides of the display area for increasing space between each adjacent shorting switch so as to reduce coupling effect. In the inspection circuit, a first shorting switch is electrically connected between the shorting bar and first end of one signal wire, and a second shorting switch is electrically connected between the second end of that signal wire and second end of another signal wire.

Abstract: A fabricating method of display panel is provided. A first substrate having display area and non-display area is provided. A pixel array and a spacer layer are respectively formed in the display area and non-display area by forming many first strip electrodes parallel to each other and on the substrate, by forming an organic function layer on the substrate and covering the first strip electrodes, and by forming many second strip electrodes parallel to each other and on the organic function layer. An extension direction of the first strip electrodes is different to that of the second strip electrodes. The spacer layer surrounds the display area. A sealant is formed in the non-display area, and the spacer layer is disposed between the sealant and the pixel array. A second substrate is arranged above the first substrate, and the first substrate and the second substrate are fixed by using the sealant.

Abstract: A method for fabricating a thin film transistor array substrate is provided. Wherein, a plurality of contact holes and recesses are formed in a protection layer disposed upon thin film transistors. Each recess comprises an under-cut profile while each contact hole exposes a drain-metal layer of a corresponding thin film transistor. Then, a transparent conductor layer is formed on the protection layer, which in turn fills in the contact holes so as to be electrically connected to the drain-metal layer. Besides, the transparent conductor layer automatically segregates at the recesses to form a plurality of pixel electrodes, whereby the plurality of pixel electrodes can be formed without the utilization of photolithography and etching processes and thus fabricating cost is lowered.

Abstract: A fabricating method of display panel is provided. A first substrate having display area and non-display area is provided. A pixel array is formed in the display area of the first substrate, and at the same time, a spacer layer is formed in the non-display area. The spacer layer surrounds the display area. Next, a sealant is formed in the non-display area, and the spacer layer is disposed between the sealant and the pixel array. A second substrate is arranged above the first substrate, and the first substrate and the second substrate are fixed by using the sealant. The spacer layer can prevent the overflow sealant from contaminating the devices in the panel. The spacer layer is formed during the fabricating process of the pixel array, so that no extra fabrication cost is needed.

Abstract: A liquid crystal display panel includes a plurality of scan lines, a plurality of data lines, a pixel array, a plurality of first common electrode lines and at least one second common electrode line. The first common electrode lines receive a common electrode signal through at least one first input node positioned at a first side of the pixel array. The second common electrode line receives the common electrode signal through at least one second input node positioned at a second side of the pixel array. In addition, at least one first common electrode line is electrically connected to the second common electrode lines in the pixel array.

Abstract: A fabricating method of a pixel structure is provided, which uses the original processes of fabricating a thin film transistor to simultaneously fabricate a reflective layer with an uneven surface. In the fabrication process of the thin film transistor, a plurality of bumps are formed under the reflective layer which is to be formed later on. The bumps and a gate of the TFT are formed simultaneously or the bumps and a semiconductor layer of the TFT are formed simultaneously. In addition, by stacking layers on the bumps, the reflective layer formed on the bumps can have good uneven shapes on the surface thereon. Therefore, the fabricating method of a pixel structure has simple processes and low manufacturing costs, and can be used for fabricating a transflective pixel structure or a reflective pixel structure.