Patents by Inventor Hsi Wu
Hsi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240158309Abstract: The invention provides a material surface treatment equipment, which is applied to a material substrate. The material surface treatment equipment includes a surface treatment device and at least one waveguide device. The surface treatment device is used to carry the material substrate to perform a surface treatment process. Each waveguide device is used for introducing electromagnetic waves to the material substrate to assist in performing the surface treatment process. Through the introduction of electromagnetic waves, the surface treatment process of the material substrate is easy to perform and can achieve the strengthening effect.Type: ApplicationFiled: December 15, 2022Publication date: May 16, 2024Inventors: TIEN-HSI LEE, JUN-HUANG WU, YU-SHENG CHIOU, SHU-CHENG LI, WEI-CHI HUANG, HSIN CHEN
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Publication number: 20240148753Abstract: The present invention pertains to a method for alleviating atherosclerosis in a subject comprising administrating to said subject a composition or pharmaceutical composition comprising Antcin K.Type: ApplicationFiled: January 10, 2024Publication date: May 9, 2024Applicant: ARJIL BIOTECH HOLDING COMPANY LIMITEDInventors: Yeh B WU, Jir-Mehng LO, Hui Ju LIANG, Pei-Hsin LIN, Chieh-Hsi WU, Chung-Hsin WU
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Patent number: 11978714Abstract: A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.Type: GrantFiled: December 19, 2022Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuo-Chiang Ting, Chi-Hsi Wu, Shang-Yun Hou, Tu-Hao Yu, Chia-Hao Hsu, Ting-Yu Yeh
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Publication number: 20240139142Abstract: Provided is a method for preventing or treating a liver disease, including administering a therapeutically effective amount of pharmaceutical composition to a subject in need, and the pharmaceutical composition includes the isothiocyanate structural modified compound and a pharmaceutically acceptable carrier thereof.Type: ApplicationFiled: September 14, 2023Publication date: May 2, 2024Applicants: TAIPEI VETERANS GENERAL HOSPITAL, NATIONAL YANG MING CHIAO TUNG UNIVERSITY, PHARMAESSENTIA CORPORATIONInventors: Jaw-Ching WU, Yung-Sheng CHANG, Kuo-Hsi KAO, Chan-Kou HWANG, Ko-Chung LIN
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Patent number: 11967546Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.Type: GrantFiled: July 21, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shang-Yun Hou, Hsien-Pin Hu, Sao-Ling Chiu, Wen-Hsin Wei, Ping-Kang Huang, Chih-Ta Shen, Szu-Wei Lu, Ying-Ching Shih, Wen-Chih Chiou, Chi-Hsi Wu, Chen-Hua Yu
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Publication number: 20240126861Abstract: A device unlocking method and an electronic device are provided. The method includes: detecting fingerprint information of a user by a first sensor of the electronic device; authenticating the fingerprint information and temporarily storing an authentication result of the fingerprint information; after authenticating the fingerprint information, detecting operation environment information related to the electronic device by a second sensor of the electronic device; and in response to the operation environment information meeting a default condition, unlocking the electronic device according to the authentication result.Type: ApplicationFiled: May 9, 2023Publication date: April 18, 2024Applicant: ASUSTeK COMPUTER INC.Inventors: Chih-Hsien Yang, Hui-Fen Chen, I-Hsi Wu
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Publication number: 20240129472Abstract: Improved lossless entropy coding techniques for coding of image data include selecting a context for entropy coding based on an ordered scan path of possible context locations. A symbol for a current location within a source image may be entropy coded based on a context of prior encoded symbols of other locations within source images, where the context is selected based on an ordered scan path enumerating a series of potential context locations within one or more source images. To select a context, a predetermined number of prior symbols may be selected by qualifying or disqualifying locations in the scan path, and then the current symbol may be encoded with a context based on prior symbols corresponding to the first qualifying context locations in the order of the scan path.Type: ApplicationFiled: September 18, 2023Publication date: April 18, 2024Inventors: Yeqing WU, Yunfei ZHENG, Alican NALCI, Yixin DU, Hilmi Enes EGILMEZ, Guoxin JIN, Alexandros TOURAPIS, Jun XIN, Hsi-Jung WU
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Patent number: 11961779Abstract: A package includes a substrate having a conductive layer, and the conductive layer comprises an exposed portion. A die stack is disposed over the substrate and electrically connected to the conductive layer. A high thermal conductivity material is disposed over the substrate and contacting the exposed portion of the conductive layer. The package further includes a contour ring over and contacting the high thermal conductivity material.Type: GrantFiled: May 27, 2021Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC).Inventors: Wensen Hung, Szu-Po Huang, Hsiang-Fan Lee, Kim Hong Chen, Chi-Hsi Wu, Shin-Puu Jeng
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Patent number: 11961800Abstract: A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.Type: GrantFiled: July 21, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh
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Patent number: 11953877Abstract: Manufacturing of a shoe or a portion of a shoe is enhanced by executing various shoe-manufacturing processes in an automated fashion. For example, information describing a shoe part may be determined, such as an identification, an orientation, a color, a surface topography, an alignment, a size, etc. Based on the information describing the shoe part, automated shoe-manufacturing apparatuses may be instructed to apply various shoe-manufacturing processes to the shoe part, such as a pickup and placement of the shoe part with a pickup tool.Type: GrantFiled: October 20, 2022Date of Patent: April 9, 2024Assignee: NILE, Inc.Inventors: Dragan Jurkovic, Patrick Conall Regan, Chih-Chi Chang, Chang-chu Liao, Ming-Feng Jean, Kuo-Hung Lee, Yen-Hsi Liu, Hung-Yu Wu
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Publication number: 20240103220Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.Type: ApplicationFiled: December 1, 2023Publication date: March 28, 2024Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Kuo-Chiang Ting, Sung-Hui Huang, Shang-Yun Hou, Chi-Hsi Wu
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Patent number: 11941178Abstract: An electronic device is provided. The electronic device includes a touch module, a motion sensor, a memory, and a control unit. The touch module is configured to generate a touch signal. The motion sensor is configured to detect motion of the electronic device to generate motion data. The memory stores a preset motion condition. The control unit is electrically connected to the touch module, the motion sensor, and the memory, and configured to: receive the motion data; and determine whether the motion data meets the preset motion condition or not, and generate a virtual touch signal when the motion data meets the preset motion condition. A control method applied to the electronic device is further provided.Type: GrantFiled: October 29, 2021Date of Patent: March 26, 2024Assignee: ASUSTEK COMPUTER INC.Inventors: Wen Fang Hsiao, I-Hsi Wu, Shin-Yi Huang
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20240072021Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.Type: ApplicationFiled: October 26, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
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Publication number: 20240073438Abstract: Techniques are disclosed for improved video coding with virtual reference frames. A motion vector for prediction of a pixel block from a reference may be constrained based on the reference. In as aspect, if the reference is a temporally interpolated virtual reference frame with corresponding time close to the time of the current pixel block, the motion vector for prediction may be constrained magnitude and/or precision. In another aspect, a bitstream syntax for encoding the constrained motion vector may also be constrained. In this manner, the techniques proposed herein contribute to improved coding efficiencies.Type: ApplicationFiled: August 18, 2023Publication date: February 29, 2024Inventors: Yeqing WU, Yunfei ZHENG, Guoxin JIN, Yixin DU, Alican NALCI, Hilmi Enes EGILMEZ, Jun XIN, Hsi-Jung WU
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Patent number: 11893229Abstract: A portable electronic device and a one-hand touch operation method thereof are provided. A touch operation performed on a touch screen is detected. When a shift amount of the touch operation in a first direction is greater than a first threshold, whether to activate a one-hand mode is determined according to a shift amount of the touch operation in a second direction. When the one-hand mode is activated, the operation interface image is zoomed out or shifted, and displayed in a one-hand mode interface display region.Type: GrantFiled: May 24, 2022Date of Patent: February 6, 2024Assignee: ASUSTeK COMPUTER INC.Inventors: Meng Chen Hsieh, Chen-Yu Hsu, Chih-Hsien Yang, I-Hsi Wu, Hsin-Yi Pu
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Publication number: 20240009849Abstract: A hand-eye calibration method and a hand-eye calibration device for a robot arm are provided. The method includes following steps. A first mapping relationship between a base of the robot arm and a terminal of the robot arm and a second mapping relationship between a camera and a target object are obtained. Based on a scale, a third mapping relationship between the terminal of the robot arm and a tool set mounted on the terminal and a fourth mapping relationship between the camera and the base in each dimension are updated to minimize an error between a position of the target object in an image captured by the camera and a position of the tool set. In response to the error being convergent and the scale being less than or equal to a scale threshold, the third mapping relationship and the fourth mapping relationship calibrated by the scale are output.Type: ApplicationFiled: May 10, 2023Publication date: January 11, 2024Applicant: PEGATRON CORPORATIONInventors: Ke-Jung Huang, Chao-Chien Lee, Jen-Hui Wang, Chun-Hsi Wu
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Patent number: 11852868Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.Type: GrantFiled: July 26, 2022Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Kuo-Chiang Ting, Sung-Hui Huang, Shang-Yun Hou, Chi-Hsi Wu
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Patent number: 11842983Abstract: The semiconductor structure includes a plurality of first dies, a plurality of second dies disposed over each of the first dies, and a dielectric material surrounding the plurality of first dies and the plurality of second die. Each of the second dies overlaps a portion of each first die.Type: GrantFiled: November 12, 2021Date of Patent: December 12, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chen-Hua Yu, Chi-Hsi Wu, Der-Chyang Yeh, Hsien-Wei Chen, An-Jhih Su, Tien-Chung Yang
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Patent number: 11837587Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.Type: GrantFiled: January 3, 2022Date of Patent: December 5, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu