Patents by Inventor Hsiao-Wen Zan

Hsiao-Wen Zan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160064499
    Abstract: A transistor including a substrate, a gate layer, a first insulating layer, an active layer, a source and a drain is provided. The gate layer is disposed on the first insulating layer, and has a plurality of first through holes. The first insulating layer covers the gate layer and a part of the substrate exposed by the first through holes, and forms a plurality of recesses respectively corresponding to the first through holes. The active layer is disposed on the first insulating layer, and has a plurality of second through holes. The second through holes communicate with the recesses, respectively. The source is disposed on a part of the active layer. The drain is disposed on another part of the active layer. A manufacturing method of the transistor is also provided.
    Type: Application
    Filed: May 8, 2015
    Publication date: March 3, 2016
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chia-Wei Chou, Cheng-Hang Hsu
  • Publication number: 20160020286
    Abstract: A transistor including a substrate, a source, a drain, an active portion, a fin-shaped gate, and an insulation layer is provided. The source is located on the substrate. The drain is located on the substrate. The active portion connects the source and the drain. The fin-shaped gate wraps the active portion. A first portion of the insulation layer separates the fin-shaped gate from the active portion, a second portion of the insulation layer separates the fin-shaped gate from the substrate, a third portion of the insulation layer separates the fin-shaped gate from the source and from the drain, and a fourth portion of the insulation layer is located on a surface of the fin-shaped gate facing away from the active portion. The insulation layer is integrally formed. A manufacturing method of a transistor is also provided.
    Type: Application
    Filed: July 1, 2015
    Publication date: January 21, 2016
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Hsin Chiao, Wei-Tsung Chen
  • Patent number: 9236492
    Abstract: An active device provided by the invention is disposed on a substrate and includes a gate, a gate insulating layer, an oxide semiconductor channel layer, a plurality of nano conductive wires, a source and a drain. The gate insulating layer is disposed between the gate and the oxide semiconductor channel layer. The nano conductive wires are distributed in the oxide semiconductor channel layer, in which the nano conductive wires do not contact the gate insulating layer and the nano conductive wires are arranged along a direction and not intersected with each other. The source and the drain are disposed on two sides opposite to each other of the oxide semiconductor channel layer, in which a portion of the oxide semiconductor channel layer is exposed between the source and the drain.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: January 12, 2016
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Pei-Chen Yu, Hung-Chuan Liu, Bing-Shu Wu, Yi-Chun Lai, Wei-Tsung Chen
  • Patent number: 9236494
    Abstract: A field effect transistor (FET) is provided. The active layer of this FET is composed of at least two different amorphous metal oxide semiconductor layer stacked together. Therefore, the two opposite surfaces of the active layer can have different band gap values.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: January 12, 2016
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chun-Hung Liao
  • Publication number: 20150233851
    Abstract: A semiconductor sensing device that includes a nanowire conductive layer, a semiconductor sensing layer, and a conductive layer is provided. The nanowire conductive layer includes a plurality of connected conductive nanowires, and gaps are formed between the conductive nanowires. The semiconductor sensing layer is electrically connected to the nanowire conductive layer. The conductive layer is electrically connected to the semiconductor sensing layer. The semiconductor sensing layer is located between the nanowire conductive layer and the conductive layer. A manufacturing method of a semiconductor sensing device is also provided.
    Type: Application
    Filed: December 9, 2014
    Publication date: August 20, 2015
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Pei-Chen Yu, Ming-Yen Chuang, Chia-Chun Yeh
  • Patent number: 8927330
    Abstract: Disclosed herein is a method for manufacturing a metal-oxide thin film transistor. The method includes the steps of: (a1) forming a gate electrode on a substrate; (a2) forming a gate insulating layer over the gate electrode; (a3) forming a metal-oxide semiconductor layer having a channel region on the gate insulating layer; (a4) forming a source electrode and a drain electrode on the metal-oxide semiconductor layer, wherein the source electrode is spaced apart from the drain electrode by a gap exposing the channel region; (a5) forming a mobility-enhancing layer on the channel region, wherein the mobility-enhancing layer is not in contact with the source electrode and the drain electrode; and (a6) annealing the metal-oxide semiconductor layer and the mobility-enhancing layer in an environment at a temperature of about 200° C. to 350° C.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: January 6, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chun-Cheng Yeh, Liang-Hao Chen
  • Publication number: 20140367707
    Abstract: A manufacturing method of a display panel including following steps is provided. An active device substrate including a first plate, active devices disposed on the first plate and pixel electrodes electrically connected to the active devices is provided. A display medium substrate including a second plate and a display medium disposed on the second plate is provided. The pixel electrodes are electrically connected to the display medium by a conductor. Moreover, a display panel manufactured by the manufacturing method is also provided.
    Type: Application
    Filed: February 27, 2014
    Publication date: December 18, 2014
    Applicant: E Ink Holdings Inc.
    Inventors: Hsin-Fei Meng, Wen-Syang Hsu, Hsiao-Wen Zan, Yu-Hsin Lin, Chuang-Chuang Tsai, Cheng-Hang Hsu, Kai-Cheng Chuang
  • Publication number: 20140326989
    Abstract: An active device provided by the invention is disposed on a substrate and includes a gate, a gate insulating layer, an oxide semiconductor channel layer, a plurality of nano conductive wires, a source and a drain. The gate insulating layer is disposed between the gate and the oxide semiconductor channel layer. The nano conductive wires are distributed in the oxide semiconductor channel layer, in which the nano conductive wires do not contact the gate insulating layer and the nano conductive wires are arranged along a direction and not intersected with each other. The source and the drain are disposed on two sides opposite to each other of the oxide semiconductor channel layer, in which a portion of the oxide semiconductor channel layer is exposed between the source and the drain.
    Type: Application
    Filed: January 23, 2014
    Publication date: November 6, 2014
    Applicant: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Pei-Chen Yu, Hung-Chuan Liu, Bing-Shu Wu, Yi-Chun Lai, Wei-Tsung Chen
  • Patent number: 8877535
    Abstract: The present invention provides a vertical type sensor, including a substrate; a first electrode formed on the substrate; a sensing layer formed on the first electrode layer and reactive to a target substance, wherein the first electrode layer is interposed between the substrate and the sensing layer; and a second electrode layer formed on the sensing layer and having a plurality of openings, wherein the sensing layer is interposed between the first electrode layer and the second electrode layer, and the target substance contacts the sensing layer via the plurality of openings. The vertical type sensor of the present invention provides instant, sensitive and rapid detection.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: November 4, 2014
    Assignee: National Chiao Tung University
    Inventors: Hsiao-Wen Zan, Hsin-Fei Meng, Ming-Zhi Dai, Yu-Chiang Chao
  • Patent number: 8829514
    Abstract: Disclosed herein is a thin film transistor, which includes a metal oxide semiconductor layer, an insulating layer, a gate electrode, a source electrode and a drain electrode. The metal oxide semiconductor layer includes a channel region having at least one first region and a second region. The first region has an oxygen vacancy concentration greater than an oxygen vacancy concentration of the second region. The second region surrounds the first region. A method for manufacturing the thin film transistor is disclosed as well.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: September 9, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chun-Hung Liao, Wei-Tsung Chen
  • Publication number: 20140213006
    Abstract: The present invention provides a vertical type sensor, including a substrate; a first electrode formed on the substrate; a sensing layer formed on the first electrode layer and reactive to a target substance, wherein the first electrode layer is interposed between the substrate and the sensing layer; and a second electrode layer formed on the sensing layer and having a plurality of openings, wherein the sensing layer is interposed between the first electrode layer and the second electrode layer, and the target substance contacts the sensing layer via the plurality of openings. The vertical type sensor of the present invention provides instant, sensitive and rapid detection.
    Type: Application
    Filed: April 1, 2014
    Publication date: July 31, 2014
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Hsiao-Wen Zan, Hsin-Fei Meng, Ming-Zhi Dai, Yu-Chiang Chao
  • Publication number: 20140209883
    Abstract: A vertical electro-optical component and a method for forming the same are provided. The vertical electro-optical component includes a substrate, a first electrode layer formed on the substrate, a patterned insulating layer formed on the first electrode layer, a metal layer formed on the patterned insulating layer, a semiconductor layer formed on the first electrode layer, and a second electrode layer formed on the semiconductor layer, wherein the semiconductor layer encapsulates the patterned insulating layer and the metal layer. The vertical electro-optical component thus has a low operational voltage of a vertical transistor and a high reaction speed of a photo diode, and may be used to form light-emitting transistors.
    Type: Application
    Filed: March 31, 2014
    Publication date: July 31, 2014
    Applicant: National Chiao Tung University
    Inventors: Hsiao-Wen Zan, Hsin-Fei Meng, Wu-Wei Tsai, Yu-Chiang Chao
  • Patent number: 8748221
    Abstract: The present invention discloses a nanoball solution coating method and applications thereof. The method comprises steps: using a scraper to coat a nanoball solution on a substrate to attach a plurality of nanoballs on the substrate; flushing or flowing through the substrate with a heated volatile solution to suspend the nanoballs unattached to the substrate in the volatile solution; and using the scraper to scrape off the volatile solution carrying the suspended nanoballs, whereby is simplified the process to coat nanoballs. The method can be used to fabricate nanoporous films, organic vertical transistors, and large-area elements and favors mass production.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: June 10, 2014
    Assignee: National Chiao Tung University
    Inventors: Hsin-Fei Meng, Hsiao-Wen Zan, Yen-Chu Chao, Kai-Ruei Wang, Yung-Hsuan Hsu
  • Patent number: 8723503
    Abstract: The present invention provides a vertical type sensor, including a substrate; a first electrode formed on the substrate; a sensing layer formed on the first electrode layer and reactive to a target substance, wherein the first electrode layer is interposed between the substrate and the sensing layer; and a second electrode layer formed on the sensing layer and having a plurality of openings, wherein the sensing layer is interposed between the first electrode layer and the second electrode layer, and the target substance contacts the sensing layer via the plurality of openings. The vertical type sensor of the present invention provides instant, sensitive and rapid detection.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: May 13, 2014
    Assignee: National Chiao Tung University
    Inventors: Hsiao-Wen Zan, Hsin-Fei Meng, Ming-Zhi Dai, Yu-Chiang Chao
  • Patent number: 8722454
    Abstract: A method for manufacturing an organic electronic component is provided. The method includes steps of providing a substrate and an organic material; coating the organic material onto the substrate; heating the substrate to form a first carrier transport layer; doping a material having a metal ion to an organic solvent to form an organic solution; and applying the organic solution onto the first carrier transport layer to form a second carrier transport layer.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: May 13, 2014
    Assignee: National Chiao Tung University
    Inventors: Hsin-Fei Meng, Hao-Wu Lin, Sheng-Fu Horng, Hsiao-Wen Zan, Hao-Wen Chang, Yu-Fan Chang, Yu-Chian Chiu
  • Patent number: 8723165
    Abstract: A vertical electro-optical component and a method for forming the same are provided. The vertical electro-optical component includes a substrate, a first electrode layer formed on the substrate, a patterned insulating layer formed on the first electrode layer, a metal layer formed on the patterned insulating layer, a semiconductor layer formed on the first electrode layer, and a second electrode layer formed on the semiconductor layer, wherein the semiconductor layer encapsulates the patterned insulating layer and the metal layer. The vertical electro-optical component thus has a low operational voltage of a vertical transistor and a high reaction speed of a photo diode, and may be used to form light-emitting transistors.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: May 13, 2014
    Assignee: National Chiao Tung University
    Inventors: Hsiao-Wen Zan, Hsin-Fei Meng, Wu-Wei Tsai, Yu-Chiang Chao
  • Publication number: 20140045298
    Abstract: A method for manufacturing an organic electronic component is provided. The method includes steps of providing a substrate and an organic material; coating the organic material onto the substrate; heating the substrate to form a first carrier transport layer; doping a material having a metal ion to an organic solvent to form an organic solution; and applying the organic solution onto the first carrier transport layer to form a second carrier transport layer.
    Type: Application
    Filed: November 5, 2012
    Publication date: February 13, 2014
    Applicant: National Chiao Tung University
    Inventors: Hsin-Fei MENG, Hao-Wu Lin, Sheng-Fu Horng, Hsiao-Wen Zan, Hao-Wen Chang, Yu-Fan Chang, Yu-Chian Chiu
  • Publication number: 20140045297
    Abstract: The present invention discloses a nanoball solution coating method and applications thereof. The method comprises steps: using a scraper to coat a nanoball solution on a substrate to attach a plurality of nanoballs on the substrate; flushing or flowing through the substrate with a heated volatile solution to suspend the nanoballs unattached to the substrate in the volatile solution; and using the scraper to scrape off the volatile solution carrying the suspended nanoballs, whereby is simplified the process to coat nanoballs. The method can be used to fabricate nanoporous films, organic vertical transistors, and large-area elements and favors mass production.
    Type: Application
    Filed: October 31, 2012
    Publication date: February 13, 2014
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Hsin-Fei MENG, Hsiao-Wen ZAN, Yen-Chu CHAO, Kai-Ruei WANG, Yung-Hsuan HSU
  • Publication number: 20140034944
    Abstract: A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the metal-oxide semiconductor channel are overlapped. The gate, the source, and the drain are separated by the dielectric layer. Besides, the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. The metal-oxide semiconductor channel includes a metal-oxide semiconductor layer and a plurality of nano micro structures disposed in the metal-oxide semiconductor layer and separated from one another. In another aspect, a display panel including the TFT and a method of fabricating the TFT are also provided.
    Type: Application
    Filed: March 15, 2013
    Publication date: February 6, 2014
    Applicant: E INK HOLDINGS INC.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Xue-Hung Tsai, Henry Wang, Wei-Tsung Chen
  • Publication number: 20130045567
    Abstract: Disclosed herein is a method for manufacturing a metal-oxide thin film transistor. The method includes the steps of: (a1) forming a gate electrode on a substrate; (a2) forming a gate insulating layer over the gate electrode; (a3) forming a metal-oxide semiconductor layer having a channel region on the gate insulating layer; (a4) forming a source electrode and a drain electrode on the metal-oxide semiconductor layer, wherein the source electrode is spaced apart from the drain electrode by a gap exposing the channel region; (a5) forming a mobility-enhancing layer on the channel region, wherein the mobility-enhancing layer is not in contact with the source electrode and the drain electrode; and (a6) annealing the metal-oxide semiconductor layer and the mobility-enhancing layer in an environment at a temperature of about 200° C. to 350° C.
    Type: Application
    Filed: August 13, 2012
    Publication date: February 21, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Hsiao-Wen ZAN, Chuang-Chuang TSAI, Chun-Cheng YEH, Liang-Hao CHEN