Patents by Inventor Hsiao-Wen Zan

Hsiao-Wen Zan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020153527
    Abstract: A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequentially formed over the amorphous silicon channel layer. A lightly doped source/drain region is formed in the amorphous silicon channel layer and then a spacer is formed over the gate electrode. A source/drain region is formed in the amorphous silicon channel layer. A portion of the oxide layer above the source/drain region is removed. An isolation spacer is formed on the sidewalls of the spacer. A self-aligned silicide layer is formed at the top section of the spacer and the source/drain region. Finally, a metal-induced lateral crystallization process is conducted to transform the amorphous silicon channel layer into a lateral-crystallization-polysilicon channel layer.
    Type: Application
    Filed: November 26, 2001
    Publication date: October 24, 2002
    Inventors: Ting-Chang Chang, Hsiao-Wen Zan, Po-Sheng Shih
  • Patent number: 6410373
    Abstract: A method of forming a polysilicon thin film transistor. An amorphous silicon channel layer is formed over an insulating substrate. An active region is patterned out in the amorphous silicon channel layer. An oxide layer and a gate electrode are sequentially formed over the amorphous silicon channel layer. A lightly doped source/drain region is formed in the amorphous silicon channel layer and then a spacer is formed over the gate electrode. A source/drain region is formed in the amorphous silicon channel layer. A portion of the oxide layer above the source/drain region is removed. An isolation spacer is formed on the sidewalls of the spacer. A self-aligned silicide layer is formed at the top section of the spacer and the source/drain region. Finally, a metal-induced lateral crystallization process is conducted to transform the amorphous silicon channel layer into a lateral-crystallization-polysilicon channel layer.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: June 25, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Hsiao-Wen Zan, Po-Sheng Shih