Abstract: A transflective liquid crystal display (LCD) includes at least a transmission pixel region and at least a reflection pixel region positioned in a pixel region. The transmission region includes at least a transmissive electrode connected to a first switching element. The reflection pixel region includes at least a reflective electrode connected to a second switching element. The transmissive and the reflective electrodes are controlled respectively by independent switching elements.

Abstract: An LCD having semiconductor components. In one embodiment of the invention, the structure with multiple silicon layers comprises a substrate, a first silicon layer on the substrate, a gate dielectric layer on the first silicon layer, a gate on the gate dielectric layer, an interlayer dielectric layer on the gate, and a second silicon layer on the interlayer dielectric layer.

Abstract: A driver device for providing multi-resolution modes for a display device, a liquid crystal display panel for example, is provided in this invention. This display driver includes a pixel circuit and a gate driving circuit. The gate driving circuit is coupled to the pixel circuit via a plurality of gate lines and determines either an original gate driving signal or a target gate driving signal to be the gate drive signal in response to the gate control signal. Wherein a switch circuit is configured for switching between the original driving signal and the target gate driving signal via a plurality of switches corresponding to shift registers therein. A source driving circuit is further incorporated in this present invention to configure a multi-resolution display device, coupled to the pixel circuit via a plurality of source lines and outputs the source driving signal in response to a source control signal.

Abstract: A testing apparatus for testing a display and an operation method of the testing apparatus are disclosed. The apparatus is electrically coupled to a driving line of a display, an image signal source and a shorting bar signal source comprises a first bonding pad, n probing terminals and n switch devices. In the present invention, the n probing terminals are electrically coupled to the first bonding pad, where the n is an integer not less than 1. The gate terminal of each switch device is electrically coupled to the shoring bar signal source, the first terminal is electrically coupled to the image signal source and the second terminal is electrically coupled to one of the n probing terminals. In the present invention, the voltage provided by the shorting bar signal source controls serving as a shorting bar test or a full contact test for testing the display.

Abstract: A shift register unit. The shift register unit outputs a shift register signal according to a clock signal, an inverse clock signal and a start signal. The shift register has first and second clock inversion circuits, and an inverter. In the first clock inversion circuit, a third PMOS transistor has a third source coupled to the first voltage, a third gate and a third drain. A fourth PMOS transistor has a fourth source coupled to the third drain, a fourth gate and a fourth drain coupled to the second voltage. A fifth PMOS transistor has a fifth source coupled to the third drain, a fifth drain coupled to the first gate, and a fifth gate. A sixth PMOS transistor having a sixth source coupled to the third gate, a sixth drain coupled to the second gate, and a sixth gate coupled to the fifth gate.

Abstract: The LCD device includes a pixel circuit and a driving circuit. The pixel circuit comprises thin film transistors serving for driving pixels of the LCD The driving circuit is coupled to the pixel circuit, generating a driving signal for driving the transistors. The gate terminal driving signal of the pixel transistors has a high state and a low state, and the threshold voltage of the transistor is set at a level at zero volt, or depending on whether the transistor is n-type or p-type, between zero volt and the low or high states of the gate terminal driving signal, respectively.

Abstract: A transflective liquid crystal display (LCD) includes at least a transmission pixel region and at least a reflection pixel region positioned in a pixel region. The transmission region includes at least a transmissive electrode connected to a first switching element. The reflection pixel region includes at least a reflective electrode connected to a second switching element. The transmissive and the reflective electrodes are controlled respectively by independent switching elements.

Abstract: A method of fabricating a thin film transistor (TFT) with self-aligned structure. A substrate is provided, with a semiconductor layer and gate insulation layer formed in sequence thereon, followed by formation of a conductive layer on the gate insulation layer, and definition of the conductive layer to form a gate conductive layer and a dummy conductive layer. The dummy conductive layer is on both sides of the gate conductive layer and provided with a gap therebetween. A first ion implantation is performed via the gap to form a lightly doped region on the semiconductor layer thereunder, and a sacrificial layer is formed to fill the gap. The dummy conductive layer is removed. The gate conductive layer and the remaining sacrificial layer are used as a mask. Finally, a second ion implantation is performed to form a heavily doped source/drain region on the semiconductor layer.

Abstract: A single pixel driving circuit for a transflective LCD is disclosed. It uses different digital/analog (D/A) signal converters to control the gamma correction signals of the transmissive liquid crystal capacitor and the reflective liquid crystal capacitor to improve the display quality of the transflective LCD. The driving circuit contains a first transistor and a second transistor whose gates couple together to a scan line, a first signal converter coupled to the source of the first transistor via a first data line, and a second signal converter coupled to the source of the second transistor via a second data line. The drain of the first transistor is coupled to the transmissive liquid crystal capacitor. The drain of the second transistor is coupled to the reflective liquid crystal capacitor.

Abstract: A method of fabricating a thin film transistor (TFT) with self-aligned structure. A substrate is provided, with a semiconductor layer and gate insulation layer formed in sequence thereon, followed by formation of a conductive layer on the gate insulation layer, and definition of the conductive layer to form a gate conductive layer and a dummy conductive layer. The dummy conductive layer is on both sides of the gate conductive layer and provided with a gap therebetween. A first ion implantation is performed via the gap to form a lightly doped region on the semiconductor layer thereunder, and a sacrificial layer is formed to fill the gap. The dummy conductive layer is removed. The gate conductive layer and the remaining sacrificial layer are used as a mask. Finally, a second ion implantation is performed to form a heavily doped source/drain region on the semiconductor layer.

Abstract: A switching signal generator of an active matrix display is disclosed. The switching signal generator includes at least one delay device connected to the switches of the active matrix display. The delay device consists of many delay units connected in series for receiving a source switching signal and correspondingly generating a plurality of target switching signals controlling the switches. There is a constant phase shift between any two successive target switching signals so that the switches are switched on one by one at regular intervals.

Abstract: A device for driving a thin film transistor array of a liquid crystal display is provided. The device includes an input line, a plurality of latch units, and a plurality of digital-to-analog converters. The input line is used for receiving therefrom a plurality of digital image signals. The plurality of latch units are in communication with the input line for latching the digital image signals. The plurality of digital-to-analog converters are in communication with and disposed between the latch units and the data lines, for receiving more than one of the latched digital image signals, converting the latched digital image signals into analog image signals, and outputting the analog image signals to display cells in the same driven scan line via corresponding data lines synchronously. A method for driving a thin film transistor array of a liquid crystal display is also provided.

Abstract: A method for manufacturing a magnetic field transducing device is provided which includes (a) providing a substrate, (b) subjecting the substrate to a semiconductor device fabricating process in order to obtain a magnetic field transducer, (c) forming an oxide over the magnetic field transducer and (d) covering a magnetic film on the oxide in order to obtain the magnetic field transducing device.

Abstract: The invention provides a method for manufacturing a transistor having a low leakage current. In general, spacers must be formed to isolate a gate from a subsequently-formed drain, thereby reducing a leakage current. In the invention, the spacers are formed on the vertical sides of the gate by using a selective deposition process. Therefore, the method for manufacturing a transistor having a low leakage current according to the invention not only constitutes a simplified process, but also controls the widths of the spacers precisely, so that the leakage current of the transistor can be greatly decreased.

Abstract: Ultrahigh vacuum chemical vapor deposition (UHV/CVD) and chemical mechanical polishing (CMP) systems are used in a method which can fabricate polycrystalline silicon (poly-Si) and polycrystalline silicon-germanium (poly-Si.sub.1-x -Ge.sub.x) thin film transistors at low temperature and low thermal budget. Poly-Si and poly-Si.sub.1-x -Ge.sub.x can be deposited by UHV/CVD without any anneal step. And due to the ultra low base pressure and ultraclean growth environment, the As-deposited poly films have low defect densities. However, the surface morphology retards the usage of the fabricating top-gate poly TFT's. In this invention, the CMP system is used for improving the surface morphology, high performance poly-Si and poly-Si.sub.1-x -Ge.sub.x TFT's can be obtained.

Abstract: A method for fabricating a self-aligned thin-film transistor, in accordance with the present invention, first involves forming a gate electrode on an insulating layer. Next, a gate dielectric layer is formed to enclose the gate electrode. Subsequently, a semiconductor layer, a conducting layer, and a first dielectric layer are formed to cover the substrate and the gate dielectric layer. Afterwards, a chemical mechanical polishing process is applied to subsequently polish the first dielectric layer and the conducting layer to expose the semiconductor layer above the gate electrode. Therefore, the conducting layer disposed at opposite sides of the gate electrode is self-aligned to act as the source/drain regions of the fabricated TFT device.

Abstract: A VLSI-compatible process for the manufacturing of a monolithic high-density electronic head in the form of a single composite IC chip for reading and/or writing multiple tracks of magnetically recordable information. The VLSI-compatible process comprises the steps of fabricating a digital signal process circuit as well as other desired circuit components on a substrate, then fabricating a plurality of read and/or write elements on the same substrate using a thin film technique. Because the silicon-based materials, which are used to replace the conventional magneto-resistant elements, show very little magneto-resistance effect at room temperature, a magnetically sensitive layer is provided which comprises a double-drain polycrystalline thin-films transistor (DTFT) to provide the required sensitivity.