Abstract: A layer of carbon (e.g., graphite or graphene) at a metal interface (e.g., between an MEOL interconnect and a gate contact or a source or drain region contact, between an MEOL contact plug and a BEOL metallization layer, and/or between BEOL conductive structures) is used to reduce contact resistance at the metal interface, which increases electrical performance of an electronic device. Additionally, in some implementations, the layer of carbon may help prevent heat transfer from a second metal to a first metal when the second metal is deposited over the first metal. This results in more symmetric deposition of the second metal, which reduces surface roughness and contact resistance at the metal interface. As an alternative, in some implementations, the layer of carbon is etched before deposition of the second metal in order to reduce contact resistance at the metal interface.

Abstract: The present disclosure relates to compounds of Formula I) as useful materials for OLED's. X1, X2 and X3 are N or C(R5); Ar1 and Ar2 are aryl, heteroaryl or cyano; L1 is single bond, arylene or heteroarylene; and R1, R2, R3 and R4 are diarylamino, carbazolyl, heteroaryl, H or alkyl.

Abstract: The present disclosure relates to compounds of Formula (I) as useful materials for OLED's. X is C(R)2, O, S or —N(Ph); at least one of A1 and A2 is CN, cyanoaryl, or heteroaryl having at least one nitrogen atom as a ring-constituting atom; and at least one of D1, D2, D3 and D4 is diarylamino.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first conductive structure disposed within a first layer of the semiconductor structure. The semiconductor structure includes a dielectric structure disposed within a second layer of the semiconductor structure, with the second layer being disposed on the first layer. The semiconductor structure includes a second conductive structure disposed within a recessed portion of the dielectric structure that extends to the first conductive structure, with the second conductive structure having a concave recessed portion on a top surface of the second conductive structure. The semiconductor structure includes multiple layers of conductive material disposed within the concave recessed portion of the second conductive structure.

Abstract: A semiconductor device includes a gate structure disposed over a substrate, and a first dielectric layer disposed over the substrate, including and over the gate structure. A first metal feature is disposed in the first dielectric layer, including an upper portion having a first width and a lower portion having a second width that is different than the first width. A dielectric spacer is disposed along the lower portion of the first metal feature, wherein the upper portion of the first metal feature is disposed over the dielectric spacer. A second dielectric layer is disposed over the first dielectric layer, including over the first metal feature and a second metal feature extends through the second dielectric layer to physically contact with the first metal feature. A third metal feature extends through the second dielectric layer and the first dielectric layer to physically contact the gate structure.

Abstract: Embodiments of the present invention provide a multiple-variable predictive maintenance method for a component of a production tool and a computer program product thereof, in which a multiple-variable time series prediction (TSPMVA) and an information criterion algorithm are adapted to build a best vector autoregression model (VAR), thereby forecasting the complicated future trend of accidental shutdown of the component of the production tool. Therefore, the multiple-variable prediction of the present invention can improve the accuracy of prediction compared with the single-variable prediction.

Abstract: In an embodiment, a method of manufacturing a semiconductor device includes preparing a deposition processing chamber by flowing first precursors to form a dielectric coat along an inner sidewall of the deposition processing chamber and flowing a second precursor to form a hydrophobic layer over the dielectric coat. In addition one or more deposition cycles are performed. Next, the second precursor is flowed again to repair the hydrophobic layer.

Abstract: The present disclosure relates to compounds of Formula (I) as compounds capable of emitting delayed fluorescence, and uses of the compounds in organic light-emitting diodes.

Abstract: The present disclosure relates to compounds of Formula (1) as useful materials for OLEDs. A is CN, cyanoaryl, or heteroaryl having at least one nitrogen atom as a ring-constituting atom; and D1, D2 and D3 are diarylamino or carbazolyl.

Abstract: An image capturing apparatus includes a main frame and a lens module, a middle pillar, a module board, a first housing, and a second housing assembled to the main frame respectively. The main frame has a side wall, and the first housing covers the module board. The first housing, the module board, and the middle pillar are located on a same longitudinal axis of the main frame. The first housing and the module board are opposite to the middle pillar with the main frame interposed therebetween. The module board is located between the first housing and the main frame, and the lens module is located on a horizontal axis of the main frame. The first housing and the second housing encapsulate the main frame, and the side wall leans against the first housing and the second housing.

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.

Abstract: A synchronous braking device for front and rear wheels of bicycles is revealed. A left brake cable and a right brake cable which are operated by a left brake lever and a right brake lever respectively are connected to a synchronous driving integration mechanism. No matter users squeeze the left brake lever, the right brake lever, or both the left and the right brake levers at the same time, a front brake cable and a rear brake cable are driven synchronously. Thereby a brake installed on a front wheel and a brake set on a rear wheel are further driven to brake at the same time. Thereby the rider's safety during riding is ensured.

Abstract: Embodiments of the present invention provide a predictive maintenance method for a component of a production tool, in which a time series prediction (TSP) algorithm and an information criterion algorithm are adapted to build a TSP model, thereby forecasting the complicated future trend of accidental shutdown of the component of the production tool. In addition, an alarm scheme is provided for performing maintenance immediately when the component is very likely to enter a dead state, and a death related indicator (DCI) is provided for quantitatively showing the possibility of the component entering the dead state.

Abstract: Provided are a memory device and an operation method thereof. The memory device includes a plurality of word lines. The operation method comprising: performing a pre-fill operation on the word lines, in a first loop, applying a selected word line voltage on a first selected word line group and applying an unselected word line voltage on a first unselected word line group, and in a second loop, applying the selected word line voltage on a second selected word line group and applying the unselected word line voltage on a second unselected word line group, the first selected word line group being different from the second selected word line group, and the first unselected word line group being different from the second unselected word line group; performing an erase operation on the word lines; and performing a programming operation on the word lines.

Abstract: A semiconductor device includes a gate structure disposed over a substrate, and a first dielectric layer disposed over the substrate, including and over the gate structure. A first metal feature is disposed in the first dielectric layer, including an upper portion having a first width and a lower portion having a second width that is different than the first width. A dielectric spacer is disposed along the lower portion of the first metal feature, wherein the upper portion of the first metal feature is disposed over the dielectric spacer. A second dielectric layer is disposed over the first dielectric layer, including over the first metal feature and a second metal feature extends through the second dielectric layer to physically contact with the first metal feature. A third metal feature extends through the second dielectric layer and the first dielectric layer to physically contact the gate structure.

Abstract: The disclosure discloses an anti-misoperation combined dining chair for children. The dining chair comprises a seat and a tabletop which are arranged in sequence on a supporting component. The support component comprises four No. 1 supporting tubes and No. 2 supporting tubes. One end of each of the four No. 1 supporting tubes is respectively inserted into one of four corners of the seat, and the other end of each of the four No. 1 supporting tubes is internally provided with a corresponding No. 2 supporting tube in an inserting manner respectively. The tabletop is arranged at peripheries of the No. 2 supporting tubes in a sleeved manner and is connected with the No. 1 supporting tubes and the No. 2 supporting tubes through locking mechanisms respectively.

Abstract: A program method for a memory device is provided. The memory device includes a plurality of memory cells, a bit line and word lines electrically connected to the plurality of memory cells. The plurality of memory cells includes a selected memory cell and unselected memory cells when the memory device is in a program operation. The program method including performing precharge steps, performing program steps and performing a verification step to the selected memory cell after the precharge steps and the program steps. Each of the precharge steps includes applying a precharge voltage to the bit line electrically connected to the unselected memory cells. Each of the program steps includes applying a program voltage to a word line of the word lines electrically connected to the selected memory cell.

Abstract: The present invention discloses an operation method of memory device, applied to a memory device including a number of word lines and one or more functional lines. The operation method includes: receiving a read command for a target memory cell of the memory device; and outputting a signal having a first waveform to a target word line corresponding to the target memory cell to be read among a plurality of the word lines of the memory device, output a signal having a second waveform to the one or more functional lines of the memory device, and output a signal having a third waveform to the word lines other than the target word line. A falling time of the third waveform is longer than a falling time of the first waveform.

Abstract: The present disclosure relates to compounds of formula (I) as compounds capable of emitting delayed fluorescence and uses of these compounds in organic light-emitting diodes.