Patents by Inventor Hsin-Chang Tsai
Hsin-Chang Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9177957Abstract: An embedded packaging device is provided, including a leadframe, a first semiconductor component, a second semiconductor component, a passive component, and a first dielectric layer. The leadframe forms a counterbore. The first semiconductor component is disposed on the leadframe. The second semiconductor component is disposed on the leadframe and electrically connected with the first semiconductor component through the leadframe. The passive component is disposed on the leadframe and has a different thickness from the first semiconductor component, wherein the passive component or the first semiconductor component is disposed in the counterbore of the leadframe, such that a top surface of the passive component has the same height as that of the first semiconductor component. The first dielectric layer is formed on the leadframe and covers the first semiconductor component, the second semiconductor component, and the passive component.Type: GrantFiled: October 16, 2014Date of Patent: November 3, 2015Assignee: DELTA ELECTRONICS, INC.Inventors: Peng Hsin Lee, Hsin Chang Tsai, Chia Yen Lee
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Publication number: 20150294910Abstract: A method of forming an interconnection structure is disclosed, including providing a substrate having a first side and a second side opposite to the first side, forming a via hole through the substrate, wherein the via hole has a first opening in the first side and a second opening in the second side, forming a first pad covering the first opening, and forming a via structure in the via hole subsequent to forming the first pad, wherein the via structure includes a conductive material and is adjoined to the first pad.Type: ApplicationFiled: June 24, 2015Publication date: October 15, 2015Inventors: Hsin-Chang TSAI, Peng-Hsin LEE
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Patent number: 9159699Abstract: An interconnection structure is provided having a substrate with at least one electric device formed adjacent to a first side of the substrate and a via hole formed therethrough. The via hole has a first opening adjacent to the first side of the substrate. A via structure is disposed in the via hole without exceeding the first opening. A first pad is disposed on the first side of the substrate and covers the via hole. A second pad is disposed on a second side of the substrate opposite to the first side, wherein the via structure extends into the second pad. The first pad is adjoined to the via structure and electrically connects with the at least one electric device, and the first pad has a protrusion portion extending into the via hole.Type: GrantFiled: November 13, 2012Date of Patent: October 13, 2015Assignee: DELTA ELECTRONICS, INC.Inventors: Hsin-Chang Tsai, Chia-Yen Lee, Peng-Hisn Lee
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Publication number: 20150129892Abstract: A wafer-level chip scale package is disclosed, including a chip including a substrate and a GaN transistor disposed on the substrate. The GaN transistor includes a first electrode, a dielectric layer disposed on the chip, and a redistribution trace disposed on the first dielectric layer and electrically connected with the first electrode, wherein the redistribution trace has a linear side and a curved side on opposite sides along its longitudinal direction.Type: ApplicationFiled: May 29, 2014Publication date: May 14, 2015Applicant: DELTA ELECTRONICS, INC.Inventors: Chia-Yen LEE, Chi-Cheng LIN, Hsin-Chang TSAI
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Publication number: 20150125995Abstract: A package structure including: a first semiconductor device including a first semiconductor substrate and a first electronic device, the first semiconductor device having a first side and a second side, wherein at least part of the first electronic device being adjacent to the first side, and the first semiconductor device has a via-hole formed through the first semiconductor device, wherein the via-hole has a first opening adjacent to the first side; an interconnection structure disposed in the first semiconductor device, wherein the interconnection structure includes: a via structure disposed in the via-hole without exceeding the first opening; a first pad disposed on the first side of the first semiconductor device and covering the via-hole; and a second semiconductor device vertically integrated with the first semiconductor device.Type: ApplicationFiled: January 7, 2015Publication date: May 7, 2015Inventors: Chia-Yen LEE, Hsin-Chang TSAI, Peng-Hsin LEE
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Publication number: 20150001692Abstract: A semiconductor component comprising a lateral semiconductor device, a vertical semiconductor device, and a leadframe is provided. The lateral semiconductor device has a first side and a second side, and a first electrode, a second electrode, and a control electrode positioned on the first side. The vertical semiconductor device has a first side and a second side, a second electrode and a control electrode of it positioned on the second side and a first electrode of it positioned on the first side. The leadframe electrically and respectively connected to each of the first electrode of the lateral semiconductor device, the second electrode of the lateral semiconductor device, the second electrode of the vertical semiconductor device, and the control electrodes, wherein the first side of the vertical semiconductor device is mounted on the second side of the lateral semiconductor device, and the first electrodes of both devices are electrically connected.Type: ApplicationFiled: June 28, 2013Publication date: January 1, 2015Inventors: Hsin-Chang TSAI, Chia-Yen LEE, Peng-Hsin LEE
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Publication number: 20150001727Abstract: The disclosure provides an embedded package structure comprising a metal substrate, a chip module, an insulation material layer, and at least one patterned metal layer. The metal substrate has a first surface and a second surface. The chip module is disposed on the first surface of the metal substrate, and comprises at least two stacked chips being electrically connected to each. The insulation material layer covers the first surface of the metal substrate and the stacked chips and has an electrical interconnection formed therein. The patterned metal layer is positioned on the insulation material layer, and is electrically connected the chip module through the electrical interconnection. The method for manufacturing the embedded package structure also provides.Type: ApplicationFiled: June 28, 2013Publication date: January 1, 2015Inventors: Chia-Yen LEE, Hsin-Chang TSAI, Peng-Hsin LEE
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Patent number: 8912663Abstract: The disclosure provides an embedded package structure comprising a metal substrate, a chip module, an insulation material layer, and at least one patterned metal layer. The metal substrate has a first surface and a second surface. The chip module is disposed on the first surface of the metal substrate, and comprises at least two stacked chips being electrically connected to each. The insulation material layer covers the first surface of the metal substrate and the stacked chips and has an electrical interconnection formed therein. The patterned metal layer is positioned on the insulation material layer, and is electrically connected the chip module through the electrical interconnection. The method for manufacturing the embedded package structure also provides.Type: GrantFiled: June 28, 2013Date of Patent: December 16, 2014Assignee: Delta Electronics, Inc.Inventors: Chia-Yen Lee, Hsin-Chang Tsai, Peng-Hsin Lee
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Publication number: 20140131887Abstract: A package structure including: a first semiconductor device including a first semiconductor substrate and a first electronic device, the first semiconductor device having a first side and a second side, wherein at least part of the first electronic device being adjacent to the first side, and the first semiconductor device has a via-hole formed through the first semiconductor device, wherein the via-hole has a first opening adjacent to the first side; an interconnection structure disposed in the first semiconductor device, wherein the interconnection structure includes: a via structure disposed in the via-hole without exceeding the first opening; a first pad disposed on the first side of the first semiconductor device and covering the via-hole; and a second semiconductor device vertically integrated with the first semiconductor device.Type: ApplicationFiled: September 6, 2013Publication date: May 15, 2014Applicant: DELTA ELECTRONICS, INC.Inventors: Chia-Yen LEE, Hsin-Chang TSAI, Peng-Hsin LEE
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Publication number: 20140131871Abstract: A method of forming an interconnection structure is disclosed, including providing a substrate having a first side and a second side opposite to the first side, forming a via hole through the substrate, wherein the via hole has a first opening in the first side and a second opening in the second side, forming a first pad covering the first opening, and forming a via structure in the via hole subsequent to forming the first pad, wherein the via structure includes a conductive material and is adjoined to the first pad.Type: ApplicationFiled: November 13, 2012Publication date: May 15, 2014Applicant: DELTA ELECTRONICS, INC.Inventors: Hsin-Chang TSAI, Chia-Yen LEE, Peng-Hisn LEE
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Patent number: 8405105Abstract: A light emitting device includes a carrier, a light emitting element disposed and electrically connected to the carrier, and a transparent plate disposed on the carrier and including a flat-portion and a lens-portion. The lens-portion covers the light emitting element and has a light incident surface, a light emitting surface, a first side surface and a second side surface. The light emitting element is adapted to emit a beam. A first partial beam of the beam passes through the light incident surface and emerges from the light emitting surface. A second partial beam of the beam passes through the light incident surface and is transmitted to the first side surface or the second side surface, and the first side surface or the second side surface reflects at least a part of the second partial beam of the beam which then emerges from the light emitting surface.Type: GrantFiled: February 10, 2010Date of Patent: March 26, 2013Assignee: Everlight Electronics Co., Ltd.Inventors: Jen-Ta Chiang, Chia-Hao Liang, Hsin-Chang Tsai
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Patent number: 8378358Abstract: A light emitting device includes a carrier, a light emitting element electrically connected to the carrier, a transparent plate having at least one through hole formed therein and including a flat-portion and a lens-portion and a permeable membrane structure disposed on a surface of the transparent plate. The lens-portion covers the light emitting element and has a light incident surface, a light emitting surface, a first and a second side surfaces. A first partial beam of the light beam passes through the light incident surface and leaves from the light emitting surface. A second partial beam of the light beam passes through the light incident surface and is transmitted to the first or the second side surface. The first or the second side surface reflects at least a part of the second partial beam of the light beam to be passed through the light emitting surface.Type: GrantFiled: August 6, 2010Date of Patent: February 19, 2013Assignee: Everlight Electronics Co., Ltd.Inventors: Hsin-Chang Tsai, Chia-Hao Liang, Jen-Ta Chiang
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Patent number: 8067781Abstract: The light emitting structure disclosed includes a light emitting device, a metal frame, and a repressing fastener. The light emitting device has a plurality of first coupling terminals, and the metal frame has a plurality of second coupling portions. The light emitting device is disposed in the metal frame, and the first coupling terminals touch the second coupling portions to electrically connect the light emitting device and the metal frame. The repressing fastener is disposed on the light emitting device and fastened to the metal frame to secure the light emitting device in the metal frame. An LED securing device is also disclosed.Type: GrantFiled: November 21, 2008Date of Patent: November 29, 2011Assignee: Everlight Electronics Co., Ltd.Inventors: Chia-Hao Liang, Hsin-Chang Tsai, Xie-Zhi Zhong
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Publication number: 20100295071Abstract: A light emitting device includes a carrier, a light emitting element electrically connected to the carrier, a transparent plate having at least one through hole formed therein and including a flat-portion and a lens-portion and a permeable membrane structure disposed on a surface of the transparent plate. The lens-portion covers the light emitting element and has a light incident surface, a light emitting surface, a first and a second side surfaces. A first partial beam of the light beam passes through the light incident surface and leaves from the light emitting surface. A second partial beam of the light beam passes through the light incident surface and is transmitted to the first or the second side surface. The first or the second side surface reflects at least a part of the second partial beam of the light beam to be passed through the light emitting surface.Type: ApplicationFiled: August 6, 2010Publication date: November 25, 2010Applicant: EVERLIGHT ELECTRONICS CO., LTD.Inventors: Hsin-Chang Tsai, Chia-Hao Liang, Jen-Ta Chiang
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Publication number: 20100207131Abstract: A light emitting device includes a carrier, a light emitting element disposed and electrically connected to the carrier, and a transparent plate disposed on the carrier and including a flat-portion and a lens-portion. The lens-portion covers the light emitting element and has a light incident surface, a light emitting surface, a first side surface and a second side surface. The light emitting element is adapted to emit a beam. A first partial beam of the beam passes through the light incident surface and emerges from the light emitting surface. A second partial beam of the beam passes through the light incident surface and is transmitted to the first side surface or the second side surface, and the first side surface or the second side surface reflects at least a part of the second partial beam of the beam which then emerges from the light emitting surface.Type: ApplicationFiled: February 10, 2010Publication date: August 19, 2010Applicant: EVERLIGHT ELECTRONICS CO., LTD.Inventors: Jen-Ta Chiang, Chia-Hao Liang, Hsin-Chang Tsai
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Publication number: 20090134424Abstract: The light emitting structure disclosed includes a light emitting device, a metal frame, and a repressing fastener. The light emitting device has a plurality of first coupling terminals, and the metal frame has a plurality of second coupling portions. The light emitting device is disposed in the metal frame, and the first coupling terminals touch the second coupling portions to electrically connect the light emitting device and the metal frame. The repressing fastener is disposed on the light emitting device and fastened to the metal frame to secure the light emitting device in the metal frame. An LED securing device is also disclosed.Type: ApplicationFiled: November 21, 2008Publication date: May 28, 2009Inventors: Chia-Hao Liang, Hsin-Chang Tsai, Xie-Zhi Zhong
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Patent number: 7528472Abstract: A chip package mechanism. A substrate is disposed in a receiving chamber of a base. A chip is disposed on a target surface of the substrate. A plurality of supporting elements is disposed on the target surface and surrounds the chip. A gap for receiving the chip is created in the receiving chamber and between the target surface and the base by means of the supporting elements. A barricade is disposed in the gap to separate glue filled in the receiving chamber from contacting the chip. Outside water and particles cannot enter the chip package mechanism. The chip thus has a prolonged lifespan after packaged in the chip package mechanism.Type: GrantFiled: November 17, 2005Date of Patent: May 5, 2009Assignee: Delta Electronics, Inc.Inventors: Hsueh-Kuo Liao, Hsin-Chang Tsai, Tai-Kang Shing
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Publication number: 20090011343Abstract: A microstructure includes a substrate and a photoresist layer. The substrate has a surface, and the photoresist layer is disposed on the substrate. The photoresist layer has at least one recess, which has a sidewall, a depth and a width. An oblique angle of the sidewall is not less than 5 degrees, and the aspect ratio is not less than 2. Also, a manufacturing method of the microstructure is also disclosed.Type: ApplicationFiled: September 16, 2008Publication date: January 8, 2009Inventors: Hsin-Chang TSAI, Yu-Ru Chang, Tai-Kang Shing
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Patent number: D584428Type: GrantFiled: June 5, 2008Date of Patent: January 6, 2009Assignee: Everlight Electronics Co., Ltd.Inventors: Tai-Ling Li, Chi-Hao Liang, Hsin-Chang Tsai, Mong-Ting Tsai
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Patent number: D646015Type: GrantFiled: May 20, 2010Date of Patent: September 27, 2011Assignee: Everlight Electronics Co., Ltd.Inventors: Jen-Ta Chiang, Chia-Hao Liang, Hsin-Chang Tsai