Patents by Inventor Hsin-Chih Chen

Hsin-Chih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200043741
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Publication number: 20200014150
    Abstract: A high-speed connector assembly, a socket connector and a socket terminal are disclosed in the present invention. The socket terminal includes a first branch and a second branch, which are independent, noncoplanar, unequal-height and unequal-length. The first branch forms an arcuate part perpendicular to one wide surface of one corresponding plug terminal for being used to electrically contact with the wide surface. The second branch forms a protrusion part perpendicular to one narrow surface of the plug terminal for being used to electrically contact with the narrow surface. By this double-contact design, the high-speed connector assembly has a greater signal throughput for high-speed signals, and can construct a reliable mechanical connection between the socket terminal and the plug terminal, and has an excellent electrical contact performance.
    Type: Application
    Filed: May 14, 2019
    Publication date: January 9, 2020
    Inventor: Hsin Chih CHEN
  • Publication number: 20200013630
    Abstract: Methods are disclosed herein for patterning integrated circuit devices, such as fin-like field effect transistor devices. An exemplary method includes forming a material layer that includes an array of fin features, and performing a fin cut process to remove a subset of the fin features. The fin cut process includes exposing the subset of fin features using a cut pattern and removing the exposed subset of the fin features. The cut pattern partially exposes at least one fin feature of the subset of fin features. In implementations where the fin cut process is a fin cut first process, the material layer is a mandrel layer and the fin features are mandrels. In implementations where the fin cut process is a fin cut last process, the material layer is a substrate (or material layer thereof), and the fin features are fins defined in the substrate (or material layer thereof).
    Type: Application
    Filed: September 16, 2019
    Publication date: January 9, 2020
    Inventors: Chin-Yuan Tseng, Wei-Liang Lin, Hsin-Chih Chen, Shi Ning Ju, Ken-Hsien Hsieh, Yung-Sung Yen, Ru-Gun Liu
  • Publication number: 20200014149
    Abstract: A high-speed connector assembly, a socket connector and a socket terminal are disclosed in the present invention. The socket terminal includes a first branch, a second branch and a clamping port. The first branch and the second branch are independent, coplanar, unequal-height and unequal-length. The first branch has a first protrusion formed by stamping and protruding toward the clamping port; and the second branch has a second protrusion formed by stamping and protruding toward the clamping port. The first protrusion and the second protrusion can clamp two opposite surfaces of a plug terminal to form double contacts between the socket terminal and the plug terminal, thereby improving a signal throughput of the high-speed connector assembly, constructing a reliable mechanical connection between the socket terminal and the plug terminal, and ensuring an excellent electrical contact performance between the both.
    Type: Application
    Filed: May 14, 2019
    Publication date: January 9, 2020
    Inventor: HSIN CHIH CHEN
  • Patent number: 10446964
    Abstract: A high density connector and a wafer group are disclosed in this invention. The high density connector includes an insulating housing, which forms a guide bracket to provide a guiding and locking function for a plug connector. The wafer group includes two signal wafers and a grounding wafer, which are adjacent to be arranged. The two adjacent signal wafers make up a group. Signal terminals of the two adjacent signal wafers can form multiple differential pairs in an edge-coupled manner, thereby reducing the loss of signal transmission and improving the quality of differential signal transmission.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: October 15, 2019
    Assignee: OUPIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen
  • Patent number: 10446406
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: October 15, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Patent number: 10418252
    Abstract: Methods are disclosed herein for patterning integrated circuit devices, such as fin-like field effect transistor devices. An exemplary method includes forming a material layer that includes an array of fin features, and performing a fin cut process to remove a subset of the fin features. The fin cut process includes exposing the subset of fin features using a cut pattern and removing the exposed subset of the fin features. The cut pattern partially exposes at least one fin feature of the subset of fin features. In implementations where the fin cut process is a fin cut first process, the material layer is a mandrel layer and the fin features are mandrels. In implementations where the fin cut process is a fin cut last process, the material layer is a substrate (or material layer thereof), and the fin features are fins defined in the substrate (or material layer thereof).
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: September 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO, LTD.
    Inventors: Chin-Yuan Tseng, Wei-Liang Lin, Hsin-Chih Chen, Shi Ning Ju, Ken-Hsien Hsieh, Yung-Sung Yen, Ru-Gun Liu
  • Publication number: 20190207337
    Abstract: A wafer group and a signal terminal assembly are disclosed in this invention. The wafer group includes a first wafer and a second wafer, which are arranged side by side. The first wafer is a signal wafer and includes a first frame and multiple first signal terminals supported by the first frame. The second wafer is a signal wafer and includes a second frame and multiple second signal terminals supported by the second frame. A first middle portion of each first signal terminal and a second middle portion of the corresponding second signal terminal are configured to be coupled together in an edge-coupled manner, thereby reducing the loss of signal transmission and improving the quality of differential signal transmission.
    Type: Application
    Filed: November 6, 2018
    Publication date: July 4, 2019
    Inventor: Hsin Chih CHEN
  • Publication number: 20190207336
    Abstract: A high density connector and a wafer group are disclosed in this invention. The high density connector includes an insulating housing, which forms a guide bracket to provide a guiding and locking function for a plug connector. The wafer group includes two signal wafers and a grounding wafer, which are adjacent to be arranged. The two adjacent signal wafers make up a group. Signal terminals of the two adjacent signal wafers can form multiple differential pairs in an edge-coupled manner, thereby reducing the loss of signal transmission and improving the quality of differential signal transmission.
    Type: Application
    Filed: November 6, 2018
    Publication date: July 4, 2019
    Inventor: Hsin Chih CHEN
  • Patent number: 10160239
    Abstract: A printer may include a printhead assembly, a clutch assembly, and/or a printer ribbon transport assembly. An example clutch assembly includes a first spool engagement member defining a first friction torque; a first friction member configured to frictionally engage the first spool engagement member; a second spool engagement member defining a second friction torque that is larger than the first fiction torque; and a second friction member configured to frictionally engage the second spool engagement member.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: December 25, 2018
    Assignee: ZIH Corp.
    Inventors: Hsin-Chih Chen, Petricia Dorinel Balcan, Randal Wong
  • Publication number: 20180174854
    Abstract: Methods are disclosed herein for patterning integrated circuit devices, such as fin-like field effect transistor devices. An exemplary method includes forming a material layer that includes an array of fin features, and performing a fin cut process to remove a subset of the fin features. The fin cut process includes exposing the subset of fin features using a cut pattern and removing the exposed subset of the fin features. The cut pattern partially exposes at least one fin feature of the subset of fin features. In implementations where the fin cut process is a fin cut first process, the material layer is a mandrel layer and the fin features are mandrels. In implementations where the fin cut process is a fin cut last process, the material layer is a substrate (or material layer thereof), and the fin features are fins defined in the substrate (or material layer thereof).
    Type: Application
    Filed: December 16, 2016
    Publication date: June 21, 2018
    Inventors: Chin-Yuan Tseng, Wei-Liang Lin, Hsin-Chih Chen, Shi Ning Ju, Ken-Hsien Hsieh, Yung-Sung Yen, Ru-Gun Lin
  • Publication number: 20180151381
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Application
    Filed: May 3, 2017
    Publication date: May 31, 2018
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Publication number: 20180123274
    Abstract: A double-sided pluggable combination structure is disclosed in this invention, which includes a double-sided pluggable power plug and a double-sided pluggable power socket. When the power plug and the power socket are engaged with each other, an insertion part of the power socket can enter into a receiving cavity from a plug port of the power plug by an obverse insertion mode or a reverse insertion mode, and each plug terminal of the power plug can be inserted into an insertion hole from a corresponding socket port of the power socket. An engaged portion of the plug terminal can be clamped by elastic arms of a socket terminal, thereby forming a stable electric contact between the plug terminal and the socket terminal.
    Type: Application
    Filed: March 19, 2017
    Publication date: May 3, 2018
    Applicant: Oupiin Electronic (Kunshan) Co., Ltd.
    Inventor: Hsin-chih Chen
  • Patent number: 9960514
    Abstract: A double-sided pluggable combination structure is disclosed in this invention, which includes a double-sided pluggable power plug and a double-sided pluggable power socket. When the power plug and the power socket are engaged with each other, an insertion part of the power socket can enter into a receiving cavity from a plug port of the power plug by an obverse insertion mode or a reverse insertion mode, and each plug terminal of the power plug can be inserted into an insertion hole from a corresponding socket port of the power socket. An engaged portion of the plug terminal can be clamped by elastic arms of a socket terminal, thereby forming a stable electric contact between the plug terminal and the socket terminal.
    Type: Grant
    Filed: March 19, 2017
    Date of Patent: May 1, 2018
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin-chih Chen
  • Patent number: 9917192
    Abstract: A method includes forming an isolation feature in a semiconductor substrate; forming a first fin-like active region and a second fin-like active region in the semiconductor substrate and interposed by the isolation feature; forming a dummy gate stack on the isolation feature, wherein the dummy gate extends to the first fin-like active region from one side and to the second fin-like active region from another side.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: March 13, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
  • Patent number: 9893471
    Abstract: A high speed connector assembly is disclosed in this invention, including a receptacle connector and a plug connector. Two first L-shaped contact pieces of each pair of differential signal receptacle terminals are configured to be splayed apart, and two second L-shaped contact pieces of each pair of differential signal plug terminals are configured to be splayed apart too. When the receptacle connector and the plug connector are engaged with each other, a second extending section of the differential signal plug terminal is pressed onto a first side edge of the differential signal receptacle terminal, and a first extending section of the differential signal receptacle terminal is pressed onto a second side edge of the differential signal plug terminal, thereby forming a stable electrical contact therebetween.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: February 13, 2018
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD
    Inventor: Hsin Chih Chen
  • Patent number: 9893472
    Abstract: A pluggable connector with anti-electromagnetic interference capability is disclosed in this invention, which includes a socket housing, multiple terminal assemblies and a shielding case. The socket housing includes an insulating base and an anti-EMI block. The insulating base and the anti-EMI block can be combined together to form an upper circuit board slot and a lower circuit board slot. These terminal assemblies are mounted in the socket housing and include multiple signal terminal assemblies and multiple ground terminal assemblies, which are arranged side by side in the order of ground-signal-signal. The shielding case has an upper port and a lower port, which are respectively aligned with the upper circuit board slot and the lower circuit board slot. The pluggable connector of the present invention has a good anti-electromagnetic interference capability by an anti-EMI block.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: February 13, 2018
    Assignee: Oupiin Electronic (Kunshan) Co., Ltd.
    Inventor: Hsin Chih Chen
  • Publication number: 20180040989
    Abstract: A high speed connector assembly is disclosed in this invention, including a receptacle connector and a plug connector. Two first L-shaped contact pieces of each pair of differential signal receptacle terminals are configured to be splayed apart, and two second L-shaped contact pieces of each pair of differential signal plug terminals are configured to be splayed apart too. When the receptacle connector and the plug connector are engaged with each other, a second extending section of the differential signal plug terminal is pressed onto a first side edge of the differential signal receptacle terminal, and a first extending section of the differential signal receptacle terminal is pressed onto a second side edge of the differential signal plug terminal, thereby forming a stable electrical contact therebetween.
    Type: Application
    Filed: March 9, 2017
    Publication date: February 8, 2018
    Inventor: Hsin Chih CHEN
  • Patent number: D840939
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: February 19, 2019
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen
  • Patent number: D872699
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: January 14, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen