Patents by Inventor Hsin-Chih Lin

Hsin-Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10217831
    Abstract: A HEMT device is provided. The HEMT device includes a substrate, a first epitaxial layer, a second epitaxial layer, an insulating layer, a gate, a source, and a drain. The first epitaxial layer is formed on the substrate. The second epitaxial layer is formed on the first epitaxial layer. The insulating layer is formed on the second epitaxial layer. The gate is formed in the insulating layer and extends into the second epitaxial layer. The source and the drain are formed in the insulating layer and extend into the second epitaxial layer, wherein the source and the drain are located on both sides of the gate.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 26, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Chih Lin, Shin-Cheng Lin, Yung-Hao Lin
  • Patent number: 10163707
    Abstract: Methods for forming a group III-V device structure are provided. A method includes forming a first through via structure penetrating through group III-V compound layers over a front surface of a semiconductor substrate. The method also includes thinning the semiconductor substrate from a back surface of the semiconductor substrate. The method further includes etching the semiconductor substrate from the back surface to form a via hole substantially aligned with the first through via structure. In addition, the method includes etching the semiconductor substrate from the back surface to form a recess extending from a bottom surface of the recess towards the first through via structure. The first through via structure is exposed by the via hole and the recess. The method also includes forming a conductive layer in the via hole and the recess to form a second through via structure connected to the first through via structure.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hong Chang, Hsin-Chih Lin, Shen-Ping Wang, Chung-Cheng Chen, Chien-Li Kuo, Po-Tao Chu
  • Publication number: 20180337093
    Abstract: Methods for forming a group III-V device structure are provided. A method includes forming a first through via structure penetrating through group III-V compound layers over a front surface of a semiconductor substrate. The method also includes thinning the semiconductor substrate from a back surface of the semiconductor substrate. The method further includes etching the semiconductor substrate from the back surface to form a via hole substantially aligned with the first through via structure. In addition, the method includes etching the semiconductor substrate from the back surface to form a recess extending from a bottom surface of the recess towards the first through via structure. The first through via structure is exposed by the via hole and the recess. The method also includes forming a conductive layer in the via hole and the recess to form a second through via structure connected to the first through via structure.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hong CHANG, Hsin-Chih LIN, Shen-Ping WANG, Chung-Cheng CHEN, Chien-Li KUO, Po-Tao CHU
  • Patent number: 10134867
    Abstract: A method for manufacturing semiconductor device includes depositing a contact metal layer over a III-V compound layer. An anti-reflective coating (ARC) layer is deposited over the contact metal layer, and an etch stop layer is deposited over the ARC layer. The etch stop layer, the ARC layer, and the contact metal layer are etched to form a contact stack over the III-V compound layer. A conductive layer is deposited over the III-V compound layer, and the conductive layer is etched to form a gate field plate. The etch stop layer has an etch selectivity different from that of the conductive layer.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: November 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jheng-Sheng You, Hsin-Chih Lin, Kun-Ming Huang, Lieh-Chuan Chen, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Patent number: 10103239
    Abstract: A high electron mobility transistor (HEMT) structure including a substrate, a barrier layer, a buffer layer, a source, a drain, a multi-gate structure, and a multi-field plate structure is provided. The barrier layer is disposed over the substrate. The buffer layer is disposed between the substrate and the barrier layer, and includes a channel region adjacent to an interface between the barrier layer and the buffer layer. The source and the drain are disposed on the barrier layer. The multi-gate structure is disposed between the source and the drain, and includes first conductive finger portions spaced apart from each other. The multi-field plate structure is disposed between the multi-gate structure and the drain, and includes second conductive finger portions spaced apart from each other. The first conductive finger portions and the second conductive finger portions are in an alternate and parallel arrangement.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: October 16, 2018
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yu-Chieh Chou, Hsin-Chih Lin
  • Patent number: 10056855
    Abstract: A variable-frequency motor device that runs on alternating current includes a first converting circuit, a second converting circuit, and a DC variable-frequency motor. An operation module is coupled to the variable-frequency motor device, and provides the alternating current to the first or second converting circuit. The first converting circuit receives the alternating current, and generates a first rotation-speed signal. The second converting circuit receives the alternating current, and generates a second rotation-speed signal. The DC variable-frequency motor is driven at a rotation speed according to the first or second rotation-speed signal.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: August 21, 2018
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hsin-Chih Lin, Lee-Long Chen, Kun-Chou Lee
  • Publication number: 20180233577
    Abstract: A method for manufacturing semiconductor device includes depositing a contact metal layer over a III-V compound layer. An anti-reflective coating (ARC) layer is deposited over the contact metal layer, and an etch stop layer is deposited over the ARC layer. The etch stop layer, the ARC layer, and the contact metal layer are etched to form a contact stack over the III-V compound layer. A conductive layer is deposited over the III-V compound layer, and the conductive layer is etched to form a gate field plate. The etch stop layer has an etch selectivity different from that of the conductive layer.
    Type: Application
    Filed: April 6, 2018
    Publication date: August 16, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jheng-Sheng YOU, Hsin-Chih LIN, Kun-Ming HUANG, Lieh-Chuan CHEN, Po-Tao CHU, Shen-Ping WANG, Chien-Li KUO
  • Patent number: 10002956
    Abstract: A high electron mobility transistor includes a buffer layer disposed on a substrate. A barrier layer is disposed on the buffer layer. A channel layer is disposed in the buffer layer and is adjacent to the interface between the buffer layer and the barrier layer. A gate electrode is disposed on the barrier layer. A drain electrode is disposed on the barrier layer on a first side of the gate electrode. A source electrode is disposed on the barrier layer on a second side of the gate electrode. A first enhancement layer is disposed on the barrier layer and the channel layer between the gate electrode and the drain electrode and is not in direct contact with the gate electrode, the source electrode, or the drain electrode. The first enhancement layer is an N-type doped III-V semiconductor.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: June 19, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shin-Cheng Lin, Hsin-Chih Lin, Yung-Hao Lin, Chia-Ching Huang
  • Patent number: 9978978
    Abstract: The disclosure relates to the field of OLED display technology, more particularly, to an OLED display panel and a manufacturing method thereof, during the manufacturing process of the OLED display panel, by forming a low gray color shift adjustment layer between the anode and the OLED device layer, and/or between the OLED device layer and the cathode, so as to solve the color shift problem under low gray-scale by adjusting thickness or doping concentration of the low gray color shift adjustment layer, and improve the accuracy of emitting color of the OLED panel.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: May 22, 2018
    Assignee: EVERDISPLAY OPTRONICS (SHANGHAI) LIMITED
    Inventors: Xin Mou, Chung Che Tsou, Hsin Chih Lin, Bin Zhang
  • Patent number: 9941384
    Abstract: A semiconductor device includes a first III-V compound layer on a substrate, a second III-V compound layer on the first III-V compound layer, in which a material of the first III-V compound layer is different from that of the second III-V compound layer, a gate metal stack disposed on the second III-V compound layer, a source contact and a drain contact disposed at opposite sides of the gate metal stack, a gate field plate disposed between the gate metal stack and the drain contact, an anti-reflective coating (ARC) layer formed on the source contact and the drain contact, and an etch stop layer formed on the ARC layer.
    Type: Grant
    Filed: August 29, 2015
    Date of Patent: April 10, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jheng-Sheng You, Hsin-Chih Lin, Kun-Ming Huang, Lieh-Chuan Chen, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Publication number: 20170236878
    Abstract: A display panel, a pixel array and a pixel structure are provided in the present disclosure. The pixel array includes: a substrate; and a plurality of pixel units, each of the pixel units being disposed on the substrate and including: a first surface facing the substrate; a second surface opposite to the substrate; and a side wall connecting the first surface and the second surface, wherein the first surface has an area greater than that of the second surface, and light from each pixel unit exits from the second surface and the side wall.
    Type: Application
    Filed: May 3, 2016
    Publication date: August 17, 2017
    Applicant: EVERDISPLAY OPTRONICS (SHANGHAI) LIMITED
    Inventors: Mingyue ZHANG, Hsin Chih LIN, Jr-Hong CHEN
  • Publication number: 20170205771
    Abstract: The present disclosure relates to a watch and a method for manufacturing the same. The watch includes: a movement component; a display panel including: a first substrate disposed over the watch movement; a through hole passing through the display panel; a display element disposed on the first substrate and surrounding the through hole; and a package unit for packaging the display element and including at least a first package portion disposed on the first substrate, surrounding the through hole and located between the through hole and the display element so as to prevent external water or oxygen contacting the display element; a spindle disposed in the through hole and connected with the watch movement; and a pointer portion disposed over the display panel and connected with the spindle.
    Type: Application
    Filed: August 24, 2016
    Publication date: July 20, 2017
    Applicant: EVERDISPLAY OPTRONICS (SHANGHAI) LIMITED
    Inventors: Hsin Chih LIN, Chungche TSOU, PingI SHIH
  • Publication number: 20170159169
    Abstract: The invention provides a process for manufacturing nickel oxide films with high conductivity, comprising steps of: operating a high power impulse magnetron sputtering system, HIPIMS system, in an argon and oxygen mixture, at peak power density higher than 1000 W/cm2 under a low duty cycle; and sputtering a Ni target to form the p-type NiO film with high conductivity on a substrate, the duty cycle=ton/(ton+toff), wherein ton is time of pulse on and toff is time of pulse off.
    Type: Application
    Filed: December 2, 2015
    Publication date: June 8, 2017
    Inventors: Sheng-Chi CHEN, Tsung-Yen KUO, Hsin-Chih LIN
  • Publication number: 20170077200
    Abstract: The disclosure relates to the field of OLED display technology, more particularly, to an OLED display panel and a manufacturing method thereof, during the manufacturing process of the OLED display panel, by forming a low gray color shift adjustment layer between the anode and the OLED device layer, and/or between the OLED device layer and the cathode, so as to solve the color shift problem under low gray-scale by adjusting thickness or doping concentration of the low gray color shift adjustment layer, and improve the accuracy of emitting color of the OLED panel.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 16, 2017
    Inventors: Xin Mou, Chung Che Tsou, Hsin Chih Lin, Bin Zhang
  • Publication number: 20170062581
    Abstract: A semiconductor device includes a first III-V compound layer on a substrate, a second III-V compound layer on the first III-V compound layer, in which a material of the first III-V compound layer is different from that of the second III-V compound layer, a gate metal stack disposed on the second III-V compound layer, a source contact and a drain contact disposed at opposite sides of the gate metal stack, a gate field plate disposed between the gate metal stack and the drain contact, an anti-reflective coating (ARC) layer formed on the source contact and the drain contact, and an etch stop layer formed on the ARC layer.
    Type: Application
    Filed: August 29, 2015
    Publication date: March 2, 2017
    Inventors: Jheng-Sheng YOU, Hsin-Chih LIN, Kun-Ming HUANG, Lieh-Chuan CHEN, Po-Tao CHU, Shen-Ping WANG, Chien-Li KUO
  • Patent number: 9472600
    Abstract: One embodiment of the present invention discloses an AMOLED display device and a method for producing the sub-pixels thereof. To change the metal masks used for forming the resonator adjustment layer in sub-pixels to form the sub-pixels with resonator adjustment layers in different thicknesses. On other hands, a light blue sub-pixel and an orange sub-pixel are added into a pixel unit to form the pixel unit consisting of a blue sub-pixel, a red sub-pixel, a green sub-pixel, a light blue sub-pixel and an orange sub-pixel. The AMOLED with the above features can reduce the power consumption in the display screen greatly, and can maintain the high color saturation.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: October 18, 2016
    Assignee: EVERDISPLAY OPTRONICS (SHANGHAI) LIMITED
    Inventors: Hsin Chih Lin, Chung Che Tsou, Bin Zhang
  • Patent number: 9444067
    Abstract: An organic light-emitting diode fluorescent device includes an anode layer, a hole injection layer, an emissive layer, an electron injection layer, and a cathode layer. A confinement layer is disposed on at least one of an upper face and a lower face of the emissive layer. The confinement layer has a triplet energy level higher than a triplet energy level of the emissive layer. A method for producing the organic light-emitting diode fluorescent device includes providing an anode substrate as an anode layer and disposing a hole injection layer, an emissive layer, an electron injection layer, and a cathode layer on the anode layer in sequence. A confinement layer is disposed on at least one of an upper face and a lower face of the emissive layer while producing the emissive layer. The confinement layer has a triplet energy level higher than a triplet energy level of the emissive layer.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: September 13, 2016
    Assignee: EverDisplay Optronics (Shanghai) Ltd.
    Inventors: Yanhu Li, Hsin Chih Lin
  • Patent number: 9348389
    Abstract: A power measurement system for multiple power sources includes a plurality of measurement apparatuses, a multiplexer, and a processing module. Each of the measurement apparatuses has a sense resistor and a sense amplifier. The sense resistor is electrically connected to a power source at one terminal thereof and electrically connected to a load at the other terminal thereof. The sense amplifier receives a voltage difference across the sense resistor, amplifies the voltage difference by a gain value, and outputs an amplified sense voltage. The multiplexer receives the amplified sense voltages and outputs one of the amplified sense voltages. The processing module receives the one amplified sense voltage outputted from the multiplexer and calculates an output power of the power source according to the one amplified sense voltage. Furthermore, a method of operating the power measurement system is provided.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: May 24, 2016
    Assignee: Getac Technology Corporation
    Inventor: Hsin-Chih Lin
  • Publication number: 20160133866
    Abstract: An organic light-emitting diode fluorescent device includes an anode layer, a hole injection layer, an emissive layer, an electron injection layer, and a cathode layer. A confinement layer is disposed on at least one of an upper face and a lower face of the emissive layer. The confinement layer has a triplet energy level higher than a triplet energy level of the emissive layer. A method for producing the organic light-emitting diode fluorescent device includes providing an anode substrate as an anode layer and disposing a hole injection layer, an emissive layer, an electron injection layer, and a cathode layer on the anode layer in sequence. A confinement layer is disposed on at least one of an upper face and a lower face of the emissive layer while producing the emissive layer. The confinement layer has a triplet energy level higher than a triplet energy level of the emissive layer.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 12, 2016
    Inventors: Yanhu Li, Hsin Chih Lin
  • Publication number: 20150364525
    Abstract: One embodiment of the present invention discloses an AMOLED display device and a method for producing the sub-pixels thereof. To change the metal masks used for forming the resonator adjustment layer in sub-pixels to form the sub-pixels with resonator adjustment layers in different thicknesses. On other hands, a light blue sub-pixel and an orange sub-pixel are added into a pixel unit to form the pixel unit consisting of a blue sub-pixel, a red sub-pixel, a green sub-pixel, a light blue sub-pixel and an orange sub-pixel. The AMOLED with the above features can reduce the power consumption in the display screen greatly, and can maintain the high color saturation.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 17, 2015
    Applicant: EverDisplay Optronics (Shanghai) Limited
    Inventors: Hsin Chih LIN, Chung Che TSOU, Bin ZHANG