Patents by Inventor Hsin-Hui Lee

Hsin-Hui Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10523257
    Abstract: Aspects of the technology relate to a cover (e.g., for a handheld electronic device). The cover may include a cover body configured for securement to a handheld electronic device and comprising an accessory attachment area, wherein the accessory attachment area includes a plurality of receivers, and wherein the accessory attachment area is configured for coupling with an accessory in at least one of a plurality of orientations. In some aspects, each receiver further includes a space recessed into the cover body that is bounded, at least partially, by a recess wall, wherein each receiver includes an engagement surface configured for abutting engagement with a projection associated with an accessory when the projection is disposed in a secured configuration within a respective space. An electrical device cover and various attachment devices are also provided.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: December 31, 2019
    Assignee: HTC Corporation
    Inventors: Hsin-Hao Lee, Cheng-Lin Wang, Ernest Euan Tien, Yin-Chou Chen, Tsung-Peng Lin, Cheng-Yen Lee, Yu-Hui Lin, Chang-Hua Wei, Jen-Yang Chang, Shih-Hsiu Lee, Jui Hsiang Lin, Hung Chuan Wen, Yen-Cheng Lin, Yen-Yi Lee, Ting-An Chien, Hsin-Hui Huang, Sheng Cherng Lin, Yung-Lung Chang
  • Patent number: 10523256
    Abstract: Aspects of the technology relate to a cover (e.g., for a handheld electronic device). The cover may include a cover body configured for securement to a handheld electronic device and comprising an accessory attachment area, wherein the accessory attachment area includes a plurality of receivers, and wherein the accessory attachment area is configured for coupling with an accessory in at least one of a plurality of orientations. In some aspects, each receiver further includes a space recessed into the cover body that is bounded, at least partially, by a recess wall, wherein each receiver includes an engagement surface configured for abutting engagement with a projection associated with an accessory when the projection is disposed in a secured configuration within a respective space. An electrical device cover and various attachment devices are also provided.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: December 31, 2019
    Assignee: HTC Corporation
    Inventors: Hsin-Hao Lee, Cheng-Lin Wang, Ernest Euan Tien, Yin-Chou Chen, Tsung-Peng Lin, Cheng-Yen Lee, Yu-Hui Lin, Chang-Hua Wei, Jen-Yang Chang, Shih-Hsiu Lee, Jui Hsiang Lin, Hung Chuan Wen, Yen-Cheng Lin, Yen-Yi Lee, Ting-An Chien, Hsin-Hui Huang, Sheng Cherng Lin, Yung-Lung Chang
  • Publication number: 20190391701
    Abstract: An optical device is provided. The optical device includes a substrate including a plurality of pixel units, a dielectric layer disposed on the substrate, a patterned light-transmitting layer disposed on the dielectric layer and corresponding to the plurality of pixel units, and a plurality of continuous light-shielding layers disposed on the dielectric layer and located on both sides of the patterned light-transmitting layer. A method for fabricating an optical device is also provided.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 26, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Cherng LIAO, Shih-Hao LIU, Wu-Hsi LU, Ming-Cheng LO, Chung-Ren LAO, Yun-Chou WEI, Yin CHEN, Hsin-Hui LEE, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20190386048
    Abstract: A method for forming a semiconductor device is provided. The method includes providing a substrate, forming a first light-shielding layer on the substrate, and performing a first lithography process to pattern the first light-shielding layer to form a plurality of first openings in the first light-shielding layer. The first openings expose pixels of the substrate. The method also includes placing a first stencil on the first light-shielding layer. The first stencil has a first openwork pattern which exposes the pixels of the substrate. The method also includes providing a first material. The first material includes a transparent material. The method also includes applying the first material onto the substrate through the first stencil to cover the pixels and fill the first openings, such that a plurality of first transparent pillars made of the first material are formed on the pixels.
    Type: Application
    Filed: June 13, 2018
    Publication date: December 19, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Hsueh-Jung LIN
  • Publication number: 20190355920
    Abstract: An electroluminescent device includes a substrate, a first electrode, a patterned pixel define layer, a first color layer, a first connection layer, a second color layer, and a second electrode. The patterned pixel define layer has a first opening. A projected area of the first opening on the substrate is A. The first color layer is located in the first opening and electrically connected to the first electrode. A projected area of the first connection layer on the substrate is B. The second color layer is located between the first connection layer and the second electrode. When a ratio of B to A is r1, light emitted by the electroluminescent device has a first color temperature. When the ratio of B to A is r2, the light emitted by the electroluminescent device has a second color temperature.
    Type: Application
    Filed: May 9, 2019
    Publication date: November 21, 2019
    Applicant: Au Optronics Corporation
    Inventors: Hsin-Hui Wu, Kuan-Heng Lin, Meng-Ting Lee
  • Publication number: 20190347462
    Abstract: An optical sensor is provided, wherein the optical sensor includes an image sensing array, a collimator layer, and a light-shielding layer. The image sensor array includes a plurality of pixels. The collimator layer is disposed on the image sensor array and includes a plurality of openings corresponding to the pixels. The collimator layer includes a first surface facing the image sensor array and a second surface opposite to the first surface. The light-shielding layer is disposed on sidewalls of the openings.
    Type: Application
    Filed: May 8, 2018
    Publication date: November 14, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Han-Liang TSENG, Hsin-Hui LEE
  • Publication number: 20190304837
    Abstract: A method for forming a semiconductor device is provided. The method includes providing a substrate, placing a first stencil having a first openwork pattern on the substrate, applying a first material onto the substrate through the first stencil, and removing the first stencil from the substrate. The first material includes a transparent material. The method also includes placing a second stencil having a second openwork pattern on the substrate, applying a second material onto the substrate through the second stencil, and removing the second stencil from the substrate. The second material includes a light-shielding material, and the second openwork pattern is different from the first openwork pattern.
    Type: Application
    Filed: September 20, 2018
    Publication date: October 3, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Han-Liang TSENG, Hsin-Hui LEE, Hsueh-Jung LIN
  • Publication number: 20190196322
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 27, 2019
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Publication number: 20190148110
    Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.
    Type: Application
    Filed: April 30, 2018
    Publication date: May 16, 2019
    Inventors: Chien-Cheng CHEN, Chia-Jen CHEN, Hsin-Chang LEE, Shih-Ming CHANG, Tran-Hui SHEN, Yen-Cheng HO, Chen-Shao HSU
  • Patent number: 9904302
    Abstract: System and method for gas pressure stabilization. The system comprises a pressure stabilizer which is divided into a receiving chamber and a pressure chamber by a flexible membrane, a booster device, a gas divider, and a control driver that can sense movement of the flexible membrane and control the gas divider accordingly. A pressure pilot is used to set the desired pressure in the pressure chamber. The pressure of the receiving chamber will stabilize to be the same with that of the pressure chamber regardless of the gas flow change or gas pressure change at the gas source, or the pressure fluctuation in the downstream system. The gas passing the system can eventually be recycled to a recycling system in the downstream without harming the environment.
    Type: Grant
    Filed: January 3, 2015
    Date of Patent: February 27, 2018
    Inventors: Chunyu Wu, Hsin-Hui Lee
  • Patent number: 9812409
    Abstract: A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: November 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Hsin-Hui Lee, Wen-De Wang, Shu-Ting Tsai
  • Publication number: 20160313746
    Abstract: System and method for gas pressure stabilization. The system comprises a pressure stabilizer which is divided into a receiving chamber and a pressure chamber by a flexible membrane, a booster device, a gas divider, and a control driver that can sense movement of the flexible membrane and control the gas divider accordingly. A pressure pilot is used to set the desired pressure in the pressure chamber. The pressure of the receiving chamber will stabilize to be the same with that of the pressure chamber regardless of the gas flow change or gas pressure change at the gas source, or the pressure fluctuation in the downstream system. The gas passing the system can eventually be recycled to a recycling system in the downstream without harming the environment.
    Type: Application
    Filed: July 16, 2015
    Publication date: October 27, 2016
    Inventors: Chunyu WU, Hsin-Hui LEE
  • Publication number: 20150249057
    Abstract: A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided.
    Type: Application
    Filed: May 18, 2015
    Publication date: September 3, 2015
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Hsin-Hui Lee, Wen-De Wang, Shu-Ting Tsai
  • Patent number: 9064817
    Abstract: An integrated circuit structure includes a semiconductor chip having a die side and a non-die side, the die side having one or more trenches formed therein. The integrated circuit structure further includes at least one die bonded onto the die side of the semiconductor chip. The integrated circuit structure further includes a protecting material encapsulating the at least one die and substantially filling the one or more trenches.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: June 23, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Hui Lee, William Cheng
  • Patent number: 9035445
    Abstract: A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided.
    Type: Grant
    Filed: September 23, 2012
    Date of Patent: May 19, 2015
    Assignee: Taiwan Semicondutor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Hsin-Hui Lee, Wen-De Wang, Shu-Ting Tsai
  • Publication number: 20150051860
    Abstract: A method of inspecting a structure of a device and a system for doing the same is described. The method includes generating a sample image of a device having a structure to be inspected; identifying a plurality of features of the sample image; comparing the plurality of features to a corresponding plurality of features of a reference image; and locating features in the sample image that deviate from corresponding features of the reference image. The generating step includes moving the device, a detector array or both, relative to one another, wherein the detector array is configured to generate a line of data representing light reflected from the device, and assembling lines of data from the detector array to generate a sample image.
    Type: Application
    Filed: August 19, 2013
    Publication date: February 19, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kewei ZUO, Wen-Yao CHANG, Ming-Shin SU, Chien Rhone WANG, Hsin-Hui LEE, Chih-Hao LIN
  • Publication number: 20140117568
    Abstract: An integrated circuit structure includes a semiconductor chip having a die side and a non-die side, the die side having one or more trenches formed therein. The integrated circuit structure further includes at least one die bonded onto the die side of the semiconductor chip. The integrated circuit structure further includes a protecting material encapsulating the at least one die and substantially filling the one or more trenches.
    Type: Application
    Filed: January 8, 2014
    Publication date: May 1, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Hui LEE, William CHENG
  • Patent number: 8647963
    Abstract: A wafer is provided having a chip side and a non-chip side, the chip side comprising a plurality of semiconductor chips. A plurality of dies are provided, each of the dies is bonded to one of the plurality of semiconductor chips. One or more trenches are formed on the chip side of the wafer. The chip side of the wafer and the plurality of dies are encapsulated with a protecting material, the protecting material substantially filling the one or more trenches. The wafer is diced to separate it into individual semiconductor packages.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: February 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Hui Lee, William Cheng
  • Patent number: 8524595
    Abstract: A semiconductor structure includes a plurality of solder structures between a first substrate and a second substrate. A first encapsulation material is substantially around a first one of the solder structures and a second encapsulation material is substantially around a second one of the solder structures. The first one and the second one of the solder structures are near to each other and a gap is between the first encapsulation material and the second encapsulation material.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 3, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mirng-Ji Lii, Hsin-Hui Lee
  • Patent number: 8497584
    Abstract: A new method is provided for the creation of a solder bump. Conventional methods are initially followed, creating a patterned layer of Under Bump Metal over the surface of a contact pad. A layer of photoresist is next deposited, this layer of photoresist is patterned and developed creating a resist mask having a T-shape opening aligned with the contact pad. This T-shaped opening is filled with a solder compound, creating a T-shaped layer of solder compound on the surface of the layer of UBM. The layer of photoresist is removed, exposing the created T-shaped layer of solder compound, further exposing the layer of UBM. The layer of UBM is etched using the T-shaped layer of solder compound as a mask. Reflow of the solder compound results in creating a solder ball.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: July 30, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yen-Ming Chen, Chia-Fu Lin, Shun-Liang Hsu, Kai-Ming Ching, Hsin-Hui Lee, Chao-Yuan Su, Li-Chih Chen