Patents by Inventor Hsin Lu

Hsin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230410536
    Abstract: A method of retrieving a map includes receiving a grid data of the map comprising lane segments, wherein the grid data includes an array of grids each associated with a list including none or at least one of the lane segments intersecting the respective grid; receiving coordinates of a location; identifying a first grid including the location based on the grid data; identifying a target grid that has an associated list including at least one of the lane segments as first lane segment; and outputting the first lane segment.
    Type: Application
    Filed: July 27, 2023
    Publication date: December 21, 2023
    Inventors: Minhao JIANG, Hsin LU, Genmao SHI, Ziqi LIU
  • Publication number: 20230387230
    Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Ru-Shang Hsiao, Ching-Hwanq Su, Pohan Kung, Ying Hsin Lu, I-Shan Huang
  • Patent number: 11782310
    Abstract: A display system includes a light source configured to emit light from a light exit surface, the emitted light having an emitted wavelength. An optical filter is disposed on the light exit surface of the light source. One or more light converting films are disposed between the optical filter and the light exit surface of the light source. The one or more light converting films are configured to receive the emitted light from the light source and convert at least portions of the received emitted light to blue, green, and red lights having respective blue, green and red wavelengths. For a substantially normally incident light and for at least an in-plane first polarization state, the optical filter reflects more than about 80% of the incident light having the emitted wavelength, and transmits greater than about 60% of the incident light for each of the blue, green and red wavelengths.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: October 10, 2023
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Yu Hsin Lu, Gary T. Boyd, Matthew B. Johnson, Ryan T. Fabick, Carl A. Stover, Adam D. Haag
  • Publication number: 20230288745
    Abstract: An article (100) for a display device includes a diffraction grating film (102), a first optically clear adhesive layer (120), and a second optically clear adhesive layer (130). The diffraction grating film includes a base layer (104) and a plurality of microstructures (106) projecting from the base layer. The base layer defines a non-structured surface of the diffraction grating film and the plurality of microstructures define a structured surface of the diffraction grating film opposite to the non-structured surface. The first optically clear adhesive layer is disposed on the structured surface of the diffraction grating film. The second optically clear adhesive layer is disposed on the non-structured surface of the diffraction grating film.
    Type: Application
    Filed: August 11, 2021
    Publication date: September 14, 2023
    Inventors: Chun-Yi Ting, Chiu-Hsing Lin, Juo-Han Chou, Chun-Lung Chen, Kazuhiko Toyooka, Yu Hsin Lu
  • Patent number: 11721112
    Abstract: A method of retrieving a map is disclosed. The method includes receiving a grid data of the map comprising lane segments, wherein the grid data includes an array of grids each associated with a list including none or at least one of the lane segments intersecting the respective grid; receiving coordinates of a location; identifying a first grid including the location based on the grid data; identifying a target grid that has an associated list including at least one of the lane segments as first lane segment; and outputting the first lane segment.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: August 8, 2023
    Assignee: TUSIMPLE, INC.
    Inventors: Minhao Jiang, Hsin Lu, Genmao Shi, Ziqi Liu
  • Publication number: 20230244107
    Abstract: A backlight to a display panel including a plurality of discrete spaced apart light sources configured to emit light and arranged two-dimensionally on a first substrate substantially reflective at least in regions between the light sources, a reflective polarizer disposed on the plurality of discrete spaced apart light sources, a first optical diffuser disposed between the reflective polarizer and the plurality of light sources and having a plurality of positive microlenses arranged in a regular two-dimensional array, and a second optical diffuser disposed between the reflective polarizer and the plurality of light sources and having a plurality of retroreflective elements arranged in a regular two-dimensional array. The second optical diffuser is configured to receive the emitted light and retroreflect the received light for incident angles less than a predetermined threshold value and transmit at least 60% of the received light for incident angles greater than the predetermined threshold value.
    Type: Application
    Filed: January 30, 2023
    Publication date: August 3, 2023
    Inventors: Yu Hsin Lu, Gary T. Boyd
  • Publication number: 20230236603
    Abstract: Systems and methods for projecting a three-dimensional (3D) surface to a two-dimensional (2D) surface for use in autonomous driving are disclosed. In one aspect, a control system for an autonomous vehicle includes a processor and a computer-readable memory in communication with the processor and having stored thereon computer-executable instructions to cause the processor to: receive a 3D map including a plurality of objects, determine a base point in the 3D map, shift the objects in the 3D map based on the base point, project the objects in the shifted 3D map to a 2D map, and output the 2D map.
    Type: Application
    Filed: March 24, 2023
    Publication date: July 27, 2023
    Inventors: Minhao Jiang, Genmao Shi, Hsin Lu, Ziqi Liu
  • Publication number: 20230207650
    Abstract: The present disclosure provides a semiconductor structure in accordance with some embodiment. The semiconductor structure includes a semiconductor substrate having a first circuit region and a second circuit region; active regions extended from the semiconductor substrate and surrounded by isolation features; first transistors that include first gate stacks formed on the active regions and disposed in the first circuit region, the first gate stacks having a first gate pitch less than a reference pitch; and second transistors that include second gate stacks formed on the active regions and disposed in the second circuit region, the second gate stacks having a second pitch greater than the reference pitch. The second transistors are high-frequency transistors and the first transistors are logic transistors.
    Type: Application
    Filed: February 17, 2023
    Publication date: June 29, 2023
    Inventors: Ru-Shang Hsiao, Ying Hsin Lu, Ching-Hwanq Su, Pin Chia Su, Ling-Sung Wang
  • Publication number: 20230176419
    Abstract: A display system includes a light source configured to emit light from a light exit surface, the emitted light having an emitted wavelength. An optical filter is disposed on the light exit surface of the light source. One or more light converting films are disposed between the optical filter and the light exit surface of the light source. The one or more light converting films are configured to receive the emitted light from the light source and convert at least portions of the received emitted light to blue, green, and red lights having respective blue, green and red wavelengths. For a substantially normally incident light and for at least an in-plane first polarization state, the optical filter reflects more than about 80% of the incident light having the emitted wavelength, and transmits greater than about 60% of the incident light for each of the blue, green and red wavelengths.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 8, 2023
    Inventors: Yu Hsin Lu, Gary T. Boyd, Matthew B. Johnson, Ryan T. Fabick, Carl A. Stover, Adam D. Haag
  • Patent number: 11655405
    Abstract: A method of manufacturing a cerium dioxide powder is provided. The method includes mixing a cerium salt, an amine and solvent to form a mixed solution, in which the amine includes a secondary amine, a tertiary amine or a combination thereof, and the tertiary amine is selected from the group consisting of hexamethylenetetramine, triethylenediamine and a combination thereof. A solvothermal reaction of the mixed solution is performed to form the cerium dioxide powder. The cerium dioxide powder manufactured by the method is also provided herein.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: May 23, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chung-Hsin Lu, Yong-Jian Liu, Shu-Hao Huang, Chi-Ming Yang
  • Publication number: 20230145694
    Abstract: Analog and logic devices may coexist on a common integrated circuit chip, accommodating features with different pitches, linewidths, and pattern densities. Such differences in design and layout at various layers during manufacturing can cause process loading by contributing different amounts of reactants to surface chemical reactions. Such variation in the balance of chemical reactants can result in disparities in film thicknesses within the chip that can affect device performance. Embodiments of the present disclosure disclose a masking sequence that can alleviate process loading disparities during an undercut etch process adjacent to polysilicon structures.
    Type: Application
    Filed: June 10, 2022
    Publication date: May 11, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ling Wu, Ru-Shang Hsiao, I-Shan Huang, Ying Hsin Lu, C.J. Wu
  • Patent number: 11619950
    Abstract: Systems and methods for projecting a three-dimensional (3D) surface to a two-dimensional (2D) surface for use in autonomous driving are disclosed. In one aspect, a control system for an autonomous vehicle includes a processor and a computer-readable memory in communication with the processor and having stored thereon computer-executable instructions to cause the processor to: receive a 3D map including a plurality of objects, determine a base point in the 3D map, shift the objects in the 3D map based on the base point, project the objects in the shifted 3D map to a 2D map, and output the 2D map.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 4, 2023
    Assignee: TUSIMPLE, INC.
    Inventors: Minhao Jiang, Genmao Shi, Hsin Lu, Ziqi Liu
  • Patent number: 11588038
    Abstract: The present disclosure provides a semiconductor structure in accordance with some embodiment. The semiconductor structure includes a semiconductor substrate having a first circuit region and a second circuit region; active regions extended from the semiconductor substrate and surrounded by isolation features; first transistors that include first gate stacks formed on the active regions and disposed in the first circuit region, the first gate stacks having a first gate pitch less than a reference pitch; and second transistors that include second gate stacks formed on the active regions and disposed in the second circuit region, the second gate stacks having a second pitch greater than the reference pitch. The second transistors are high-frequency transistors and the first transistors are logic transistors.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ru-Shang Hsiao, Ying Hsin Lu, Ching-Hwanq Su, Pin Chia Su, Ling-Sung Wang
  • Publication number: 20230002929
    Abstract: A silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.
    Type: Application
    Filed: September 14, 2022
    Publication date: January 5, 2023
    Inventors: CHING-SHAN LIN, JIAN-HSIN LU, CHIEN-CHENG LIOU, MAN-HSUAN LIN
  • Patent number: 11538920
    Abstract: A method for increasing an oxide thickness at trench corner of an UMOSFET is provided, comprising providing an N-type substrate, and forming an N-type drift region, N-type and P-type heavily doped regions and P-type body therein. A trench is defined through lithography, and a pad oxide is formed along the trench through oxidation or deposition process. An oxidation barrier is formed upon the pad oxide. A thermal oxidation process is employed, so a corner oxide is effectively formed at the trench corner. After removing the pad oxide and oxidation barrier, various back-end processes are carried out to complete the transistor structure. The invention is aimed to increase oxide thickness near the trench bottom, and can be applied to high voltage devices, such as SiC. The conventional electric field crowding effect occurring at the trench corner is greatly solved, thus increasing breakdown voltages thereof.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 27, 2022
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Bing-Yue Tsui, Fang-Hsin Lu, Yi-Ting Shih
  • Publication number: 20220367688
    Abstract: A method includes forming a dummy gate stack over a fin protruding from a semiconductor substrate, forming gate spacers on sidewalls of the dummy gate stack, forming source/features over portions of the fin, forming a gate trench between the gate spacers, which includes trimming top portions of the gate spacers to form a funnel-like opening in the gate trench, and forming a metal gate structure in the gate trench. A semiconductor structure includes a fin protruding from a substrate, a metal gate structure disposed over the fin, gate spacers disposed on sidewalls of the metal gate structure, where a top surface of each gate spacer is angled toward the semiconductor fin, a dielectric layer disposed over the top surface of each gate spacer, and a conductive feature disposed between the gate spacers to contact the metal gate structure, where sidewalls of the conductive feature contact the dielectric layer.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Ru-Shang Hsiao, Ching-Hwanq Su, Pin Chia Su, Ying Hsin Lu, I-Shan Huang
  • Publication number: 20220367671
    Abstract: A semiconductor device and a method of forming the same are provided. A method includes forming a fin extending from a substrate. A sacrificial gate electrode layer is formed along a sidewall and a top surface of the fin. A patterning process is performed on the sacrificial gate electrode layer to form a sacrificial gate electrode. A reshaping process is performed on the sacrificial gate electrode to form a reshaped sacrificial gate electrode. The reshaped sacrificial gate electrode includes a first portion along the top surface of the fin and a second portion along the sidewall of the fin. A width of the first portion decreases as the first portion extends from a top surface of the first portion toward the top surface of the fin. A width of the second portion decreases as the second portion extends from the top surface of the fin toward the substrate.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Inventors: Ru-Shang Hsiao, Ying Ming Wang, Ying Hsin Lu
  • Patent number: 11502185
    Abstract: A method includes forming a dummy gate stack over a semiconductor region, removing the dummy gate stack to form a trench between gate spacers, forming a replacement gate dielectric extending into the trench, and forming a replacement gate electrode on the replacement gate dielectric. The forming the replacement gate electrode includes depositing a metal-containing layer. The depositing the metal-containing layer includes depositing a lower layer having a first average grain size, and depositing an upper layer over the lower layer. The lower layer and the upper layer are formed of a same material, and the upper layer has a second average grain size greater than the first average grain size. Source and drain regions are formed on opposing sides of the replacement gate electrode.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ru-Shang Hsiao, Ching-Hwanq Su, Pin Chia Su, Ying Hsin Lu, Ling-Sung Wang
  • Publication number: 20220359728
    Abstract: A method includes forming a dummy gate stack over a semiconductor region, removing the dummy gate stack to form a trench between gate spacers, forming a replacement gate dielectric extending into the trench, and forming a replacement gate electrode on the replacement gate dielectric. The forming the replacement gate electrode includes depositing a metal-containing layer. The depositing the metal-containing layer includes depositing a lower layer having a first average grain size, and depositing an upper layer over the lower layer. The lower layer and the upper layer are formed of a same material, and the upper layer has a second average grain size greater than the first average grain size. Source and drain regions are formed on opposing sides of the replacement gate electrode.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Ru-Shang Hsiao, Ching-Hwanq Su, Pin Chia Su, Ying Hsin Lu, Ling-Sung Wang
  • Patent number: D1009049
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 26, 2023
    Assignee: Kingston Digital, Inc.
    Inventor: Hui-Hsin Lu