Patents by Inventor Hsiu-Jen Lin

Hsiu-Jen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170033065
    Abstract: Methods of forming connector pad structures, interconnect structures, and structures thereof are disclosed. In some embodiments, a method of forming a connector pad structure includes forming an underball metallization (UBM) pad, and increasing a surface roughness of the UBM pad by exposing the UBM pad to a plasma treatment. A polymer material is formed over a first portion of the UBM pad, leaving a second portion of the UBM pad exposed.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 2, 2017
    Inventors: Chia-Lun Chang, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen, Ming-Da Cheng, Wei-Yu Chen
  • Publication number: 20170025382
    Abstract: An embodiment method includes analyzing warpage characteristics of a first package component and a second package component and forming a plurality of solder paste elements on the first package component. A volume of each of the plurality of solder paste elements is based on the warpage characteristics of the first package component and the second package component. The method further includes aligning a plurality of connectors disposed on the second package component to the plurality of solder paste elements on the first package component and bonding the second package component to the first package component by reflowing the plurality of connectors and the plurality of solder paste elements.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 26, 2017
    Inventors: Hsuan-Ting Kuo, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen, Ming-Da Cheng, Wei-Yu Chen, Chih-Chiang Tsao
  • Patent number: 9536865
    Abstract: An embodiment method includes analyzing warpage characteristics of a first package component and a second package component and forming a plurality of solder paste elements on the first package component. A volume of each of the plurality of solder paste elements is based on the warpage characteristics of the first package component and the second package component. The method further includes aligning a plurality of connectors disposed on the second package component to the plurality of solder paste elements on the first package component and bonding the second package component to the first package component by reflowing the plurality of connectors and the plurality of solder paste elements.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen, Ming-Da Cheng, Wei-Yu Chen, Chih-Chiang Tsao
  • Patent number: 9538582
    Abstract: A method includes placing a first package component over a vacuum boat, wherein the vacuum boat comprises a hole, and wherein the first package component covers the hole. A second package component is placed over the first package component, wherein solder regions are disposed between the first and the second package components. The hole is vacuumed, wherein the first package component is pressed by a pressure against the vacuum boat, and wherein the pressure is generated by a vacuum in the hole. When the vacuum in the hole is maintained, the solder regions are reflowed to bond the second package component to the first package component.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Da Cheng, Hsiu-Jen Lin, Cheng-Ting Chen, Wei-Yu Chen, Chien-Wei Lee, Chung-Shi Liu
  • Patent number: 9524956
    Abstract: A semiconductor package comprises a top package and a bottom package with fan-out interconnect structures. A plurality of inter-package connectors electrically connect the top package and the bottom package, and are located near a perimeter of the semiconductor package. A first material is located in a space delimited by a lower surface of the top package, an upper surface of the bottom package, and the inner-most inter-package connectors of the semiconductor package, wherein the first material partially fills the space. A second material different from the first material encapsulates the inter-package connectors.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: December 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Hui-Min Huang, Hsiu-Jen Lin, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20160358878
    Abstract: According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.
    Type: Application
    Filed: August 22, 2016
    Publication date: December 8, 2016
    Inventors: WEI-HUNG LIN, HSIU-JEN LIN, MING-DA CHENG, YU-MIN LIANG, CHEN-SHIEN CHEN, CHUNG-SHI LIU
  • Publication number: 20160358797
    Abstract: Presented herein is a device processing boat comprising a base and at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit. The at least one recess is aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base. The sensel is configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Application
    Filed: August 16, 2016
    Publication date: December 8, 2016
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20160351554
    Abstract: A package includes a package component, which further includes a top surface and a metal pad at the top surface of the package component. The package further includes a non-reflowable electrical connector over and bonded to the metal pad, and a molding material over the package component. The non-reflowable electrical connector is molded in the molding material and in contact with the molding material. The non-reflowable electrical connector has a top surface lower than a top surface of the molding compound.
    Type: Application
    Filed: August 9, 2016
    Publication date: December 1, 2016
    Inventors: Kuei-Wei Huang, Chih-Wei Lin, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9508703
    Abstract: Semiconductor dies are bonded to each other and electrically connected to each other. An encapsulant is utilized to protect the semiconductor dies and external connections are formed to connect the semiconductor dies within the encapsulant. In an embodiment the external connections may comprise conductive pillars, conductive reflowable material, or combinations of such.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: November 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Ming-Fa Chen, Sung-Feng Yeh, Meng-Tse Chen, Hui-Min Huang, Hsiu-Jen Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9484227
    Abstract: A method includes placing a first device die and a second device die over a carrier, with a scribe line between the first device die and the second device die. The first device die and the second device die are encapsulated with an encapsulating material, which has a portion in the scribe line. The method further includes forming a dielectric layer over the encapsulating material, performing a first die-saw to form a first trench in the scribe line, performing a second die-saw to form a second trench in the scribe line, and performing a third die-saw on the scribe line to separate the first device die from the second device die.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: November 1, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Shen Cheng, An-Jhih Su, Chung-Shi Liu, Hsiu-Jen Lin, Hsien-Wei Chen, Ming-Da Cheng, Wei-Yu Chen
  • Patent number: 9427818
    Abstract: Presented herein is a device comprising a device processing boat comprising a base at least one unit retainer disposed in the base. The device further comprises a cover having at least one recess configured to accept and retain at least one unit, the at least one recess aligned over, and configured to hold the at least one unit over, at least a portion of the at least one unit retainer. The cover is retained to the device processing boat by the at least one unit retainer. At least one pressure sensor having at least one sensel is disposed in the base and having the sensel configured to sense a clamping force applied by the cover to the at least one unit.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: August 30, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9425157
    Abstract: According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-Hung Lin, Hsiu-Jen Lin, Ming-Da Cheng, Yu-Min Liang, Chen-Shien Chen, Chung-Shi Liu
  • Patent number: 9412723
    Abstract: A package includes a package component, which further includes a top surface and a metal pad at the top surface of the package component. The package further includes a non-reflowable electrical connector over and bonded to the metal pad, and a molding material over the package component. The non-reflowable electrical connector is molded in the molding material and in contact with the molding material. The non-reflowable electrical connector has a top surface lower than a top surface of the molding compound.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Wei Huang, Chih-Wei Lin, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9412717
    Abstract: Methods and apparatus for a forming molded underfills. A method is disclosed including loading a flip chip substrate into a selected one of the upper mold chase and lower mold chase of a mold press at a first temperature; positioning a molded underfill material in the at least one of the upper and lower mold chases while maintaining the first temperature which is lower than a melting temperature of the molded underfill material; forming a sealed mold cavity and creating a vacuum in the mold cavity; raising the temperature of the molded underfill material to a second temperature greater than the melting point to cause the molded underfill material to flow over the flip chip substrate forming an underfill layer and forming an overmolded layer; and cooling the flip chip substrate to a third temperature substantially lower than the melting temperature of the molded underfill material. An apparatus is disclosed.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Hsiu-Jen Lin, Chun-Cheng Lin, Wen-Hsiung Lu, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20160218055
    Abstract: The present disclosure provides a semiconductor package includes a contact pad, a device external to the contact pad and a solder bump on the contact pad. The device has a conductive contact pad corresponding to the contact pad. The solder bump connects the contact pad with the conductive contact pad. The solder bump comprises a height from a top of the solder bump to the contact pad; and a width which is a widest dimension of the solder bump in a direction perpendicular to the height. A junction portion of the solder bump in proximity to the contact pad comprises an hourglass shape.
    Type: Application
    Filed: April 6, 2016
    Publication date: July 28, 2016
    Inventors: HSIU-JEN LIN, WEN-HSIUNG LU, CHENG-TING CHEN, HSUAN-TING KUO, WEI-YU CHEN, MING-DA CHENG, CHUNG-SHI LIU
  • Publication number: 20160211234
    Abstract: A conductive interconnect structure includes a contact pad; a conductive body connected to the contact pad at a first end; and a conductive layer positioned on a second end of the conductive body. The conductive body has a longitudinal direction perpendicular to a surface of the contact pad. The conductive body has an average grain size (a) on a cross sectional plane (Plane A) whose normal is perpendicular to the longitudinal direction of the conductive body. The conductive layer has an average grain size (b) on Plane A. The conductive body and the conductive layer are composed of same material, and the average grain size (a) is greater than the average grain size (b).
    Type: Application
    Filed: March 28, 2016
    Publication date: July 21, 2016
    Inventors: MENG-TSE CHEN, HSIU-JEN LIN, CHIH-WEI LIN, MING-DA CHENG, CHIH-HANG TUNG, CHUNG-SHI LIU
  • Patent number: 9373603
    Abstract: Reflow processes and apparatuses are disclosed. A process includes enclosing a package workpiece in an enclosed environment of a chamber of a reflow tool; causing an oxygen content of the enclosed environment of the chamber to be less than 40 ppm; and performing a reflow process in the enclosed environment of the chamber while the oxygen content is less than 40 ppm. An apparatus includes a reflow chamber, a door to the reflow chamber, an energy source in the reflow chamber, and gas supply equipment coupled to the chamber. The door is operable to enclose an environment in the reflow chamber. The energy source is operable to increase a temperature in the environment in the reflow chamber. The gas supply equipment is operable to provide a gas to the reflow chamber.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: June 21, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ai-Tee Ang, Hsiu-Jen Lin, Cheng-Ting Chen, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9355927
    Abstract: The present disclosure provides a semiconductor package includes a contact pad, a device external to the contact pad and a solder bump on the contact pad. The device has a conductive contact pad corresponding to the contact pad. The solder bump connects the contact pad with the conductive contact pad. The solder bump comprises a height from a top of the solder bump to the contact pad; and a width which is a widest dimension of the solder bump in a direction perpendicular to the height. A junction portion of the solder bump in proximity to the contact pad comprises an hourglass shape.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: May 31, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsiu-Jen Lin, Wen-Hsiung Lu, Cheng-Ting Chen, Hsuan-Ting Kuo, Wei-Yu Chen, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20160126226
    Abstract: A semiconductor package comprises a top package and a bottom package with fan-out interconnect structures. A plurality of inter-package connectors electrically connect the top package and the bottom package, and are located near a perimeter of the semiconductor package. A first material is located in a space delimited by a lower surface of the top package, an upper surface of the bottom package, and the inner-most inter-package connectors of the semiconductor package, wherein the first material partially fills the space. A second material different from the first material encapsulates the inter-package connectors.
    Type: Application
    Filed: October 31, 2014
    Publication date: May 5, 2016
    Inventors: Hao-Jan Pei, Hui-Min Huang, Hsiu-Jen Lin, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 9331038
    Abstract: A conductive interconnect structure includes a contact pad; a conductive body connected to the contact pad at a first end; and a conductive layer positioned on a second end of the conductive body. The conductive body has a longitudinal direction perpendicular to a surface of the contact pad. The conductive body has an average grain size (a) on a cross sectional plane (Plane A) whose normal is perpendicular to the longitudinal direction of the conductive body. The conductive layer has an average grain size (b) on Plane A. The conductive body and the conductive layer are composed of same material, and the average grain size (a) is greater than the average grain size (b).
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: May 3, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Meng-Tse Chen, Hsiu-Jen Lin, Chih-Wei Lin, Ming-Da Cheng, Chih-Hang Tung, Chung-Shi Liu