Abstract: The invention provides a semiconductor structure, which comprises a GaN gallium nitride (GaN) layer, an aluminum gallium nitride (AlGaN) layer on the gallium nitride layer, a polarization boost layer on and in direct contact with the aluminum gallium nitride layer, and a gate liner layer on the polarization boost layer.

Abstract: A stripper composition and a cleaning method are provided. The stripper composition includes an amine-based compound (A), a fatty acid (B) and a solvent (C). Based on a total usage amount of 100 wt % of the stripper composition, a usage amount of water is 1 wt % or less.

Abstract: A stacked integrated circuit structure includes first and second semiconductor structures. The first semiconductor structure includes a first bit line, at least one first SRAM cell electrically connected with the first bit line, a first bonding metal layer, and at least one first vertical conductive structure connecting the first bit line to a first metal line of the first bonding metal layer. The second semiconductor structure is over and bonded with the first semiconductor structure. The second semiconductor structure includes a second bit line, at least one second SRAM cell electrically connected with the second bit line, a second bonding metal layer, and at least one second vertical conductive structure connecting the second bit line to a second metal line of the second bonding metal layer. The first metal line of the first bonding metal layer is bonded with the second metal line of the second bonding metal layer.

Abstract: A safety regulation verification method comprises: measuring a first transmitting power of the antenna module at a trigger distance of a proximity sensor of the mobile device; obtaining a power density design target contour based on the first transmitting power at a predetermined distance from the mobile device on a chosen surface; obtaining a distance sensing plane coverage of the proximity sensor at the predetermined distance from the mobile device on the chosen surface; comparing whether the distance sensing plane coverage surrounds the power density design target contour; and when the distance sensing plane coverage of the proximity sensor fails to surround the power density design target contour, adjusting the first transmitting power as a second transmitting power until the distance sensing plane coverage surrounds the power density design target contour.

Abstract: A fully-isolated metal oxide semiconductor (MOS) device includes a substrate, an isolation well, a gate structure, a source region, a gradient region, a drain region, a first well, and an electro static discharge (ESD) protection region. The isolation well is formed in the substrate, and the gate structure is formed on the isolation well. The source region and the gradient region are formed in the isolation wells on both sides of the gate structure respectively, and the drain region is formed in the gradient region. The first well is formed below the drain region in the gradient region, and the ESD protection region is formed in the first well. The isolation well and the ESD protection region have a first conductivity type, and the gradient region and the first well have a second conductivity type.

Abstract: A fabricating method of a middle voltage transistor includes providing a substrate. A gate predetermined region is defined on the substrate. Next, a mask layer is formed to cover only part of the gate predetermined region. Then, a first ion implantation process is performed to implant dopants into the substrate at two sides of the mask layer to form two first lightly doping regions. After removing the mask layer, a gate is formed to overlap the entirety gate predetermined region. Subsequently, two second lightly doping regions respectively formed within one of the first lightly doping regions. Next, two source/drain doping regions are respectively formed within one of the second lightly doping regions. Finally, two silicide layers are formed to respectively cover one of the source/drain doping regions.

Abstract: An electronic device includes a processor and a microphone. The microphone is configured to send audio, from an ambient environment of the electronic device, to the processor. The processor is configured to process, based on a current step size of an audio stream segmenter, the audio received from the microphone into an audio segment. The processor is further configured to determine whether the audio segment includes a snoring sound, and set a next step size of the audio stream segmenter based on the determination whether the audio segment includes the snoring sound.

Abstract: The present disclosure relates to methods, kits, and compositions for improving the efficiency of homologous recombination. In particular, the disclosure relates to methods for introducing a nucleic acid cutting entity for DNA editing into cells that are difficult to transfect. Generally, the nucleic acid cutting entity is introduced into the cell without the use of viral vectors. The disclosure also relates to cloning DNA molecules directly into a genome with the combined use of promoter trapping and short homology arms, nuclear localization signal, and/or binding one or more DNA binding agents (TAL effector domain or truncated guide RNA bound by Cas9) to specific sites thereby displacing or restructuring chromatin at the target locus, and/or it increasing the accessibility of the target locus to further enzymatic modifications. The methods and compositions provided herein are, inter alia, useful for genome editing and enhancing enzymatic processes involved therein.

Abstract: The present disclosure relates to an antibody or antigen-binding fragment thereof that specifically binds to a spike protein of SARS-CoV-2. The present disclosure also relates to a pharmaceutical composition, a method for treating and/or preventing diseases and/or disorders caused by a coronavirus in a subject in need thereof, and a method for detecting a coronavirus in a sample.

Abstract: A power circuit, adapted to supply power to a computer system, includes a power connector, a charge unit, a short current protection circuit, and a first switch circuit. The power connector is configured to connect to the adapter to receive an input voltage. The charge unit includes an input end configured to receive the input voltage and an output end. The charge unit converts the input voltage into a system voltage. The short current protection circuit includes a detection circuit and a first logic control circuit. The detection circuit detects an impedance of at least one of the input end and the output end to generate a detection signal. The first logic control circuit generates a power control signal according to the detection signal. The first switch circuit is connected between the power connector and the input end and is controlled by the power control signal.

Abstract: A semiconductor testing apparatus is provided, and includes a base, a conductive socket, a pusher, and a thermal interface material structure. The conductive socket is disposed in the base for containing a semiconductor structure. The pusher is over the conductive socket and movable in a vertical direction. The thermal interface material structure is connected to the pusher, and includes a resilient material and a metal film around the resilient material. The metal film and the resilient material are in contact with the pusher.

Abstract: A computing device includes: a storage circuit, for storing an arbitration interframe space (AIFS) time, at least one expected value of at least one backoff time, a preamble time, a short interframe space (SIFS) time and an acknowledgement (ACK) time; a first computing circuit, for computing a payload time according to a packet length and a packet rate; a second computing circuit, coupled to the storage circuit and the first computing circuit, for computing at least one packet transmission time according to the AIFS time, the at least one expected value of the at least one backoff time, the preamble time, the SIFS time, the ACK time and the payload time; and a third computing circuit, coupled to the second computing circuit, for computing a total packet transmission time according to the at least one packet transmission time and an estimated packet error rate.

Abstract: The present invention relates to PIKFYVE antisense oligonucleotides (ASOs), pharmaceutical compositions containing them, and methods for treating, inhibiting, suppressing, and preventing neurological diseases with them.

Abstract: An upper dustproof member of a linear guideway includes a connection segment and two floating dustproof segments that are respectively connected to two opposite sides of the connection segment. Each of the two floating dustproofing segments has a carrying bar and at least one rib that is connected to the carrying bar. In each of the two floating dustproofing segments, the carrying bar has two end portions each having a bevel arranged away from the at least one rib. When the bevels of the end portions of the upper dustproof member are respectively inserted into four tolerance slots of two end caps, each of the end portions and the corresponding end cap have a tolerance gap therebetween, so that a slanting surface of each of the bevels abuts against the corresponding tolerance slot, and each of the end portions is deformable toward the corresponding tolerance gap.

Abstract: A beam management method of an electronic device includes transmitting a detecting signal, receiving a reflecting signal of the detecting signal, determining blocked antennas of an antenna array of the electronic device according to the reflecting signal, and exciting only unblocked antennas of the antenna array. This will improve the radiation efficiency of the antenna array.

Abstract: The present invention relates, in part, to methods, compounds, and compositions of an autophagy pathway inhibitor in combination with a dual RAF/MEK inhibitor, for treating abnormal cell growth (e.g., cancer).

Abstract: A method for fabricating a package structure is provided. The method includes premixing cellulose nanofibrils (CNFs) and a graphene material in a solvent to form a solution; removing the solvent from the solution to form a composite filler; mixing a prepolymeric material with the composite filler to form a composite material; and performing a molding process using the composite material.

Abstract: A method of fabricating a semiconductor device is provided. Recesses are formed in a substrate. A first gate dielectric material is formed on the substrate and filled in the recesses. The first gate dielectric material on the substrate between the recesses is at least partially removed to form a trench. A second gate dielectric material is formed in the trench. A gate conductive layer is formed on the second gate dielectric material. Spacers are formed on sidewalls of the gate conductive layer. A portion of the first gate dielectric material is removed. The remaining first gate dielectric material and the second gate dielectric layer form a gate dielectric layer. The gate dielectric layer includes a body part and a first hump part at a first edge of the body part. The first hump part is thicker than the body part. Doped regions are formed in the substrate beside the spacers.

Abstract: The invention provides an antenna subsystem with improved radiation performances. The antenna subsystem may comprise an antenna-in-module (AiM), an auxiliary structure being conductive, and a support structure being nonconductive and disposed between the AiM and the auxiliary structure. The AiM may comprise a base, and one or more radiators being conductive. The antenna subsystem may provide a spherical coverage by a combination of a first component of gain and a second component of gain. The auxiliary structure may be insulated from the one or more radiators, and may be configured for orienting a radiation pattern of the first component of gain and a radiation pattern of the second component of gain to two different directions respectively; and/or, causing the spherical coverage provided by the antenna subsystem to be broader than a spherical coverage provided by the AiM alone.

Abstract: A method for customizing an appearance of a merchandise which is suitable for being performed by a computing device in order to customize a customized choice result selected by a user includes a designed image and a merchandise information. The method includes receiving the designed image, receiving the merchandise information, overlappingly displaying the designed image on a virtual merchandise image corresponding to the merchandise information, receiving at least one edit operation for at least one designed element in the designed image, and editing for the designed element in the designed image according to the edit operation and then generating a customizing virtual image. Thereby, the method can be used for customizing an appearance of a merchandise and directly customize the designed image that has been arranged. In addition, a computing device and a non-transitory computer-readable recording medium for customizing the appearance of the merchandise are also provided.