Patents by Inventor Hsuan Wang

Hsuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190273525
    Abstract: An antenna power adjustment method is provided and applied to an electronic device. The antenna power adjustment method includes: performing position detection by a first acceleration detector and a second acceleration detector, where the first acceleration detector and the second acceleration detector are respectively disposed on a first plate and a second plate of the electronic device, and the first plate and the second plate are connected to each other by using a pivot of the electronic device for relative rotation; calculating an angle between the first plate and the second plate according to results of the position detection of the first acceleration detector and the second acceleration detector; and adjusting a power of an antenna of the electronic device according to the angle.
    Type: Application
    Filed: December 6, 2018
    Publication date: September 5, 2019
    Inventors: Chien-Yi WU, Chang-Hsun WU, Tse-Hsuan WANG, Chao-Hsu WU, Ming-Huang CHEN
  • Publication number: 20190229202
    Abstract: A FinFET device includes a substrate, first and second fins, first and second gates and first and second epitaxial layers. The substrate has a first region and a second region. The first and second fins are on the substrate respectively in the first and second regions. In an embodiment, the number of the first fins is different from the number of the second fins. The first and second gates are on the substrate and respectively across the first and second fins. The first epitaxial layers are disposed in first recesses of the first fins adjacent to the first gate. The second epitaxial layers are disposed in second recesses of the second fins adjacent to the second gate. In an embodiment, the maximum width of the first epitaxial layers is L1, the maximum width of the second epitaxial layers is L2, and (L2?L1)/L1 is equal to or less than about 1%.
    Type: Application
    Filed: January 22, 2019
    Publication date: July 25, 2019
    Applicant: United Microelectronics Corp.
    Inventors: Chun-Liang Kuo, Tsang-Hsuan Wang, Yu-Ming Hsu, Tsung-Mu Yang, Ching-I Li
  • Publication number: 20190197235
    Abstract: A setting method for a server adapted for setting the server to run a virtual machine is provided. The setting method includes: obtaining a first memory address when a first service function of the virtual machine is called in a startup procedure of the virtual machine; correcting a memory block corresponding to the first memory address, to have an operation of the virtual being interrupted when the memory block is called by the virtual machine; determining, by a management module of the virtual machine, whether a script called by the first service function is executable or not, when the operation of the virtual machine is interrupted; if the script is not executable, interrupting, by the management module, the script called by the first service function; and if the script is executable, allowing, by the management module, the first service function to execute the script.
    Type: Application
    Filed: October 2, 2018
    Publication date: June 27, 2019
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tzi-Cker CHIUEH, Li-Han CHEN, Yu-Hsuan WANG, Chuan-Yu CHO, Yi-Ting CHAO
  • Publication number: 20190160867
    Abstract: A hollow caster structure includes a base, a caster body pivotally connected with the base, a first wheel unit mounted on the caster body, and a second wheel unit mounted on the caster body. Each of the first wheel unit and the second wheel unit forms a viewing space. Thus, the viewing space of each of the first wheel unit and the second wheel unit provides a visible effect. In addition, the hollow caster structure has a lighter weight by provision of the viewing space. Further, the parts of the hollow caster structure have different colors which are visible from the viewing space.
    Type: Application
    Filed: November 24, 2017
    Publication date: May 30, 2019
    Inventor: Shuen Hsuan Wang
  • Publication number: 20190138521
    Abstract: In various example embodiments, a system and method for structuring search results for attribute comparison are presented. A product selection from a user device is received. The product selection has a plurality of attributes associated with it. A plurality of adjustable sliders configured to allow the user to refine a search is generated and caused to be displayed in a user interface of the user device. One or more adjustment of the plurality of adjustable sliders is received. In response to the user to an adjustment made to a first adjustable slider of the plurality of adjustable sliders, an analysis of a networked database for search results that match values indicated by the plurality of adjustable sliders including the adjustment made to the first adjustable slider is performed. The search results are caused to be presented on the user interface displayed on the user device. The search results can be in example form of a multi-dimensional graph or list.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 9, 2019
    Applicant: eBay Inc.
    Inventors: Andrew Philip Moore, Yu-Hsuan Wang, Raymond Jeczen Pittman, Michael George Lenahan, Ben Lucas Mitchell, David Louis Lippman
  • Patent number: 10263096
    Abstract: A FinFET device includes a substrate, first and second fins, first and second gates and first and second epitaxial layers. The substrate has a first region and a second region. The first and second fins are on the substrate respectively in the first and second regions. In an embodiment, the number of the first fins is different from the number of the second fins. The first and second gates are on the substrate and respectively across the first and second fins. The first epitaxial layers are disposed in first recesses of the first fins adjacent to the first gate. The second epitaxial layers are disposed in second recesses of the second fins adjacent to the second gate. In an embodiment, the maximum width of the first epitaxial layers is L1, the maximum width of the second epitaxial layers is L2, and (L2?L1)/L1 is equal to or less than about 1%.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: April 16, 2019
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Liang Kuo, Tsang-Hsuan Wang, Yu-Ming Hsu, Tsung-Mu Yang, Ching-I Li
  • Patent number: 10236179
    Abstract: A method for forming an epitaxial layer on a substrate is disclosed. The method includes the steps of: providing a substrate into a chamber; injecting a precursor and a carrier gas to form the epitaxial layer on the substrate at a starting pressure; and pumping down the starting pressure to a second pressure according to a gradient during a cool down process in the chamber.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: March 19, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Cheng Yen, Tsung-Mu Yang, Sheng-Hsu Liu, Tsang-Hsuan Wang, Chun-Liang Kuo, Yu-Ming Hsu, Chung-Min Tsai, Yi-Wei Chen
  • Patent number: 10204136
    Abstract: A system and method for structuring search results for attribute comparison are presented. A product selection from a user device is received. The product selection has a plurality of attributes associated with it. Adjustable sliders configured to allow the user device. One or more adjustments of the adjustable sliders is received. In response to an adjustment made to a first adjustable slider of the plurality of adjustable sliders, an analysis of a networked database for search results that match values indicated by the adjustable sliders including the adjustment made to the first adjustable slider is performed. The search results are caused to be presented on the user interface displayed on the user device. The search results can be in example form of a multi-dimensional graph or list.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: February 12, 2019
    Assignee: eBay Inc.
    Inventors: Andrew Philip Moore, Yu-Hsuan Wang, Raymond Jeczen Pittman, Michael George Lenahan, Ben Lucas Mitchell, David Louis Lippman
  • Publication number: 20190035900
    Abstract: The present disclosure relates to a semiconductor device. The semiconductor device includes a gate structure disposed on a semiconductor substrate, a sidewall spacer disposed on sidewalls of the gate structure, a lightly-doped source/drain region formed in the semiconductor substrate on opposite sides of the gate structure, a source/drain region formed in the semiconductor substrate on opposite sides of the sidewall spacer, a halo implant region formed in the semiconductor substrate below the gate structure and adjacent to the lightly-doped source/drain region, and a counter-doping region formed in the semiconductor substrate below the gate structure and between the lightly-doped source/drain region and the halo implant region. The dopant concentration of the counter-doping region is lower than the dopant concentration of the halo implant region.
    Type: Application
    Filed: July 25, 2017
    Publication date: January 31, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chung-Hsuan WANG, Kan-Sen CHEN, Sing-Lin WU, Yung-Lung CHOU, Yun-Chou WEI, Chia-Hao LEE, Chih-Cherng LIAO
  • Publication number: 20190020015
    Abstract: A lithium manganese iron phosphate-based particulate for a cathode of a lithium battery. The lithium manganese iron phosphate-based particulate includes a core portion and a shell portion. The core portion includes a plurality of first lithium manganese iron phosphate-based nanoparticles which are bound together and which have a first mean particle size. The shell portion encloses the core portion and includes a plurality of second lithium manganese iron phosphate-based nanoparticles which are bound together and which have a second mean particle size larger than the first mean particle size of the first lithium manganese iron phosphate-based nanoparticles of the core portion.
    Type: Application
    Filed: August 24, 2017
    Publication date: January 17, 2019
    Inventors: Hsin-Ta Huang, Tai-Hung LIN, Yi-Hsuan WANG, Chih-Tsung Hsu
  • Publication number: 20190003037
    Abstract: A sputtering target structure includes a body having a first side and an opposing second side. A first sputtering target is coupled to the first side of the body. The first sputtering target includes a first material. A second sputtering target is coupled to the second side of the body. The second sputtering target includes a second material. A rotation mechanism is coupled to the body and is configured to allow rotation of the body from a first orientation to a second orientation.
    Type: Application
    Filed: January 29, 2018
    Publication date: January 3, 2019
    Inventors: Ping-Yuan CHEN, HUNG-CHENG CHEN, CHIH-HSUA HSIEH, YU-HSUAN WANG
  • Publication number: 20180360134
    Abstract: A functional hidden bra includes a bra body being a single sheet which is formed integrally and has an oblong shape; an outer surface thereof being non-adhesive and an inner surface being adhesive; two memory supporting sheets each of which is a thin sheet and is combined to a respect side of two sides of the bra body. Since the two memory supporting sheets are combined to the two sides of the bra body, when the bra body is extended to be adhered to the breast of a user, the two memory supporting sheets have the effect of supporting and retaining.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Inventors: HSUAN WANG, LO TING CHEN
  • Publication number: 20180363889
    Abstract: A clamp lamp includes a light source, a first clamping part, and a second clamping part. The first clamping part has a first holding portion and a lamp connecting portion connected to the first holding portion. The light source is connected to the lamp connecting portion. The second clamping part has a second holding portion and a counterweight disposed on the second holding portion. The first holding portion and the second holding portion are movably connected with each other. The clamp lamp is fixedly disposed on a structural edge by the first holding portion and the second holding portion clamping the structural edge; therein, the counterweight and the light source are located at two opposite sides of the structural edge, which is conducive to the balance of the clamp lamp on the structural edge.
    Type: Application
    Filed: March 27, 2018
    Publication date: December 20, 2018
    Inventors: Yung-Ming Yen, Yu-Hsuan Wang
  • Publication number: 20180366416
    Abstract: A semiconductor wiring substrate includes a first wiring layer, a second wiring layer stacked on the first wiring layer, and a dielectric layer sandwiched between the first wiring layer and the second wiring layer. The first wiring layer includes first signal lines and first grounding lines which are interleaved and spaced apart in the first wiring layer. The second wiring layer includes second signal lines and second grounding lines which are interleaved and spaced apart in the second wiring layer. An orthographic projection of one of the second signal lines to the first wiring layer is located between each two adjacent ones of the first signal lines.
    Type: Application
    Filed: October 31, 2017
    Publication date: December 20, 2018
    Inventors: Ming-Hsuan WANG, Ting-Hao WANG, Yen-Chih CHIU
  • Patent number: 10090581
    Abstract: A multiple antenna apparatus is provided. A first feed antenna unit is shared for receiving and transmitting radio frequency (RF) signals corresponding to a bandwidth of a first resonance mode, so as to increase antenna configurable space of the multiple antenna apparatus, and thus a closed slot antenna formed by a wire, a ground plane and a radiation element is able to be configured in the multiple antenna apparatus to receive and transmit the RF signals corresponding to a second resonance mode.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: October 2, 2018
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Yu-Yi Chu, Tse-Hsuan Wang, Shih-Keng Huang, Chia-Chi Chang
  • Publication number: 20180224919
    Abstract: A method for performing system power control within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and triggering a power limiter protection operation for the electronic device according to the power consumption index. For example, the power consumption index corresponding to the specific subsystem may represent a power consumption value of the specific subsystem, and the method may further include: comparing the power consumption value of the specific subsystem with a peak power threshold to determine whether the power consumed by the specific subsystem reaches the peak power threshold to generate a determining result, for triggering the power limiter protection operation.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Inventors: Chia-Lin Lu, Hui-Hsuan Wang, I-Pu Niu, Yu-Chung Chang, Jia-Horng Shieh
  • Publication number: 20180184822
    Abstract: A health pillow includes a supine portion and two side-lying portions symmetrically arranged on both sides of the supine portion. Each of the side-lying portions has a front surface. The supine portion has a supporting projection protruding beyond the two front surfaces, and the supporting projection has a flat surface extending outwardly away from the two front surfaces. Whereby, the health pillow can help people to get better sleep quality.
    Type: Application
    Filed: January 25, 2017
    Publication date: July 5, 2018
    Inventors: WEI-HSUAN WANG, WEI-CHIEN WANG, WEI-CHUN WANG, PO-SHIH WANG
  • Publication number: 20180191060
    Abstract: A multiple antenna apparatus is provided. A first feed antenna unit is shared for receiving and transmitting radio frequency (RF) signals corresponding to a bandwidth of a first resonance mode, so as to increase antenna configurable space of the multiple antenna apparatus, and thus a closed slot antenna formed by a wire, a ground plane and a radiation element is able to be configured in the multiple antenna apparatus to receive and transmit the RF signals corresponding to a second resonance mode.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 5, 2018
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Yu-Yi Chu, Tse-Hsuan Wang, Shih-Keng Huang, Chia-Chi Chang
  • Patent number: 9997615
    Abstract: Methods for forming semiconductor structures are provided. The method for manufacturing a semiconductor structure includes forming a hard mask structure over a substrate and etching the substrate through an opening of the hard mask structure to form a trench. The method for manufacturing a semiconductor structure further includes removing a portion of the hard mask structure to enlarge the opening and forming an epitaxial-growth structure in the trench and the opening.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Che-Yu Yeh, Chung-Cheng Wu, Cheng-Long Chen, Gwan-Sin Chang, Pang-Yen Tsai, Yen-Ming Chen, Yasutoshi Okuno, Ying-Hsuan Wang
  • Patent number: 9978864
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a first conductive type well region; a gate structure; a lightly-doped drain region and a lightly-doped source region disposed at two opposite sides of the gate structure; a second conductive type first doped region disposed in the lightly-doped drain region, wherein the doping concentration of the second conductive type first doped region is less than the doping concentration of the lightly-doped drain region; a heavily-doped source region disposed in the lightly-doped source region; and a heavily-doped drain region disposed in the second conductive type first doped region. The present disclosure also provides a method for manufacturing the semiconductor device.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: May 22, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Tse-Hsiao Liu, Sing-Lin Wu, Chung-Hsuan Wang, Yung-Lung Chou, Chia-Hao Lee, Chih-Cherng Liao