Abstract: Selective conversion from cyclohexene to methylcyclopentene can occur via skeletal isomerization reaction under mild temperature and near atmospheric pressure with the existence of a catalyst structure as described herein. The catalyst structure includes a porous zeolite as the support and one or more loaded metals to further modify its acidity and pore structures. Industrially available cyclohexene feedstock can be effectively converted to a high value-added product methylcyclopentene with over 90 wt % conversion and 95 wt % selectivity, which is highly profitable for potential application in the fine chemical industry.

Abstract: Systems, devices and methods are described herein. An integrated light emitting diode (LED) lighting system includes an electronics board. An alternating current (AC) input is disposed on the electronics board. Multiple strings of LED devices are disposed on the electronics board, each having an individual voltage threshold. A buck converter is disposed on the electronics board and is electrically coupled to provide a direct current (DC) current based on an AC current at the AC input. A switching circuit is disposed on the electronics board and is electrically coupled to the strings of LED devices to apply the DC current to each of the strings in a sequence beginning at a time when an instantaneous voltage level at the AC input reaches the individual threshold voltage of a first one of the strings of LED devices in the sequence.

Abstract: An apparatus is disclosed, comprising: a first light source having a first threshold voltage; a second light source having a second threshold voltage; a rectifier configured to receive an AC voltage as input and generate a DC voltage based on the AC voltage; a single-stage Buck converter section coupled to the rectifier, the first light source, and the second light source, the Buck converter section being configured to output a current generated based on the DC voltage towards the first light source and the second light source; and a switching circuit configured to reduce a load on the Buck converter section by periodically diverting the current away from the second light source when a magnitude of the AC voltage is less than or equal to a sum of the first threshold voltage and the second threshold voltage.

Abstract: Systems and techniques for three-dimension (3D) resist profile aware resolution enhancement techniques are described. 3D resist profile aware resolution enhancement models can be calibrated based on empirical data. Next, the 3D resist profile aware resolution enhancement models can be used in one or more applications, including, but not limited to, lithography verification, etch correction, optical proximity correction, and assist feature placement.

Abstract: A light-emitting apparatus can reduce a number of undriven or underdriven uLEDs in a uLED die. A method can include providing, by a power supply and during a first time, electrical power with a first voltage sufficient to operate a majority of micro light emitting diodes (uLEDs) of a uLED die to respective uLED drivers of the uLED die, driving the majority of uLEDs of the uLED die using the uLED drivers during the first time, providing, by the power supply and during a second time after the first time, electrical power with a second voltage, the second voltage higher than the first voltage and sufficient to operate uLEDs of the uLED die that are not operable by the first voltage, and driving the majority of the uLEDs and the uLEDs of the uLED die that are not operable by the first voltage during the second time.

Abstract: The present disclosure describes methods of reducing nematode infection in plants. A method may include contacting a plant or plant part thereof, and/or a growing media in which the plant is grown, with a composition comprising at least one water-soluble phenolic acid in an amount effective to reduce nematode infection. The at least one water-soluble phenolic acid may be 4-hydroxybenzaldehyde and/or 3,4-hydroxybenzoic acid and/or 2,3-dihydroxybenzoic acid, thereby reducing the number of soybean cyst nematodes.

Abstract: Light-emitting devices are described herein. A device includes a packaging substrate having a top surface and a bottom surface and a hybridized device having a bottom surface on the top surface of the packaging substrate. The hybridized device includes a silicon backplane that includes input/output (I/O) pins and a light-emitting diode (LED) array having a bottom surface on a top surface of the silicon backplane. Passive components are disposed on the top surface of the packaging substrate. Conductive connectors are electrically coupled between the top surface of the hybridized device and the top surface of the packaging substrate.

Abstract: An item such as a fabric-based item may have a layer of fabric such as a layer of woven fabric. The fabric layer may include warp and weft strands. The fabric may cover keys in a keyboard or may be used in forming other structures in the fabric-based item. Each key may have an illuminated key label. Portions of the fabric may be processed by pressing heated protrusions on a textured mold into polymer optical fibers in the fabric. The protrusions form corresponding light-scattering recesses in cladding portions of the optical fibers. Light-emitting diodes or other light sources may be coupled to respective end surfaces of the optical fibers. The light-emitting diodes emit light that is emitted from the thermally imprinted light-emitting regions formed by pressing the heated protrusions into the optical fibers.

Abstract: A control system for an LED array relies on defining a first and a second group of separately addressed LED pixels, with the first group including pixels with an average current no less than the current at a Q point and a second group including pixels with an average current less than the current at a Q point. An amplitude signal provided to the first group of separately addressed LED pixels is selectively modulated, while providing a DC mode 100% duty cycle. An amplitude signal provided to the second group of separately addressed LED pixels is fixed, and a modulated duty cycle is provided.

Abstract: A control system for an LED array includes a pulse width modulator to supply signals having rising edges and a falling edges to the plurality of LEDs. A plurality of parasitic capacitance discharge circuit elements connected in parallel between the pulse width modulator and the respective LEDs.

Abstract: Methods of operating a dimmer switch interface are described. A method includes receiving a dimmer input voltage, providing a dimmer output signal based on the dimmer input voltage, and detecting a voltage level of the dimmer output signal. The voltage level of the dimmer output signal is compared with the threshold. A transformer is intermittently turned off when the voltage level of the dimmer output signal is below the threshold.

Abstract: The present disclosure describes methods of reducing nematode infection in plants. A method may include contacting a plant or plant part thereof, and/or a growing media in which the plant is grown, with a composition comprising at least one water-soluble phenolic acid in an amount effective to reduce nematode infection. The at least one water-soluble phenolic acid may be 4-hydroxybenzaldehyde and/or 3,4-hydroxybenzoic acid, thereby reducing the number of soybean cyst nematodes.

Abstract: Systems, devices and methods are described herein. A device includes a power stage circuit, a switch and a first circuit. The switch is electrically coupled to the power stage circuit. The first circuit is electrically coupled to the power stage circuit and the switch and has a single output. The first circuit is configured to provide a first circuit output voltage at the single output. The first circuit output voltage has a first level on a condition that the power stage circuit is conducting at a peak current level. The first circuit output voltage has a second level on a condition that the power stage circuit is not conducting.

Abstract: Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate; forming a first dielectric layer having a first region and a second regions at each of two sides of the first region on the semiconductor substrate; forming a first opening in the first region of the first dielectric layer and a second opening in each of the second regions of the first dielectric layer; forming a first interconnect member in the first opening; forming a second interconnect member with a top surface lower than a top surface of the first dielectric layer in each of the second openings; forming a second dielectric layer having a third opening with a bottom exposing a top surface of the first interconnect member on surfaces of the first interconnect member, second interconnect members and the first dielectric layer; and forming an interconnect structure in the third opening.

Abstract: Systems, devices and methods are described herein. A device includes a power stage circuit, a switch and a first circuit. The switch is electrically coupled to the power stage circuit. The first circuit is electrically coupled to the power stage circuit and the switch and has a single output. The first circuit is configured to provide a first circuit output voltage at the single output. The first circuit output voltage has a first level on a condition that the power stage circuit is conducting at a peak current level. The first circuit output voltage has a second level on a condition that the power stage circuit is not conducting.

Abstract: A catalyst structure includes a porous support structure, where the support structure includes an aluminosilicate material. Any two or more metals are loaded in the porous support structure, the two or more metals selected from the group consisting of Ga, Ag, Mo, Zn, Co and Ce, where each metal loaded in the porous support structure is present in an amount from about 0.1 wt % to about 20 wt %. In example embodiments, the catalyst structure includes three or more of the metals loaded in the porous support structure. The catalyst structure is used in a hydrocarbon upgrading process that is conducted in the presence of methane, nitrogen or hydrogen.

Abstract: Systems, devices and methods are described herein. A device includes a power stage circuit, a switch and a first circuit. The switch is electrically coupled to the power stage circuit. The first circuit is electrically coupled to the power stage circuit and the switch and has a single output. The first circuit is configured to provide a first circuit output voltage at the single output. The first circuit output voltage has a first level on a condition that the power stage circuit is conducting at a peak current level. The first circuit output voltage has a second level on a condition that the power stage circuit is not conducting.

Abstract: Methods of operating a dimmer switch interface are described. A method includes receiving a dimmer input voltage, providing a dimmer output signal based on the dimmer input voltage, and detecting a voltage level of the dimmer output signal. The voltage level of the dimmer output signal is compared with the threshold. A transformer is intermittently turned off when the voltage level of the dimmer output signal is below the threshold.

Abstract: An illumination system, comprising: a light fixture including a driver coupled to a light source; a dimmer switch; and a dimmer switch interface, including: (i) a transformer having a first winding that is magnetically coupled to a second winding, the first winding being electrically coupled to the dimmer switch, and the second winding being electrically coupled to the driver of the light fixture, and (ii) a current source configured to power the transformer with an intermittent alternating current when the current source is energized.

Abstract: Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate; forming a first dielectric layer having a first region and a second regions at each of two sides of the first region on the semiconductor substrate; forming a first opening in the first region of the first dielectric layer and a second opening in each of the second regions of the first dielectric layer; forming a first interconnect member in the first opening; forming a second interconnect member with a top surface lower than a top surface of the first dielectric layer in each of the second openings; forming a second dielectric layer having a third opening with a bottom exposing a top surface of the first interconnect member on surfaces of the first interconnect member, second interconnect members and the first dielectric layer; and forming an interconnect structure in the third opening.