Patents by Inventor Hua Sun

Hua Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8947862
    Abstract: An expansion card module includes a box, a tray, a circuit board, and an interconnection device. The box is disposed in a drive bay on the front of a case of a computer. The tray is movably installed in the box and has a slide mechanism. The tray slides into or out of the box by the slide mechanism. The circuit board is disposed on the tray and has a first expansion slot. An expansion card electrically inserts into the first expansion slot of the circuit board, and the circuit board is electrically connected to the motherboard of computer through the interconnection device.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: February 3, 2015
    Assignee: Giga-Byte Technology Co., Ltd.
    Inventor: Pei Hua Sun
  • Patent number: 8935276
    Abstract: A method and apparatus for handling data analysis. The apparatus includes an editing device which adds user-specified one of a plurality of operation units to a user-specified layer in a data analysis in response to a user operation, each of the operation units performing a predetermined processing on an associated data source, a connecting device which connects at least one user-specified operation unit in the data analysis to an analysis path in response to a user operation, and a user interface. The user interface receives the user operations and displays the data analysis by representing layers in the data analysis, operation units in the layers and connections on the analysis path in a visual manner.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: January 13, 2015
    Assignee: International Business Machines Corporation
    Inventors: Shao Chun Li, Xiao Hua Sun, Qiang Zhang
  • Patent number: 8878489
    Abstract: An estimation method for residual discharging time of batteries includes the steps of: providing a set of battery-discharge-current intervals and a set of battery-discharge equations, setting the discharge time of each battery-discharge-current intervals at zero; detecting a discharge current, voltage and time of batteries; judging whether the discharge current exceeds all of the battery-discharge-current intervals; selecting one of the battery-discharge-current intervals and the associated battery-discharge equation according to the detected discharge current; calculating an estimation of residual discharging time; accumulating and recording the discharge time; judging whether the discharge voltage is lower than a predetermined value and calculating an estimation error of the residual discharging time; and adjusting parameters of the battery-discharge equation for reducing the estimation error of the residual discharging time if the estimation error is greater than a predetermined error value.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: November 4, 2014
    Assignee: Ablerex Electronics Co., Ltd.
    Inventors: Hung-Liang Chou, Yu-Hua Sun, Chin-Chang Wu, Wen-Jung Chiang
  • Publication number: 20140244646
    Abstract: A method, apparatus and system for processing webpage data. The method includes: in response to a webpage being opened, sending a link contained in the webpage to a network side device; receiving a group identification from the network side device, the group identification being determined by the network side device according to the link and used to specify a group the link belongs to; determining whether there is a browsed link belonging to the group specified by the group identification; and in response to determining there is a browsed link belonging to the group specified by the group identification, prompting that webpage content pointed by the link contained in the webpage has been browsed.
    Type: Application
    Filed: February 24, 2014
    Publication date: August 28, 2014
    Applicant: International Business Machines Corporation
    Inventors: Sheng Hua Bao, Dong Xu Duan, Wei Hong Qian, Chang Hua Sun
  • Publication number: 20140185208
    Abstract: An expansion card module includes a box, a tray, a circuit board, and an interconnection device. The box is disposed in a drive bay on the front of a case of a computer. The tray is movably installed in the box and has a slide mechanism. The tray slides into or out of the box by the slide mechanism. The circuit board is disposed on the tray and has a first expansion slot. An expansion card electrically inserts into the first expansion slot of the circuit board, and the circuit board is electrically connected to the motherboard of computer through the interconnection device.
    Type: Application
    Filed: February 7, 2013
    Publication date: July 3, 2014
    Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventor: Pei Hua Sun
  • Patent number: 8762916
    Abstract: A method of automatically developing a data transfer network includes determining, using a processor, a plurality of data transfers of a function of a circuit design marked for hardware acceleration within a target integrated circuit. The circuit design is specified in a high level programming language, and at least one other function of the circuit design remains executable by a microprocessor of the target integrated circuit. Each of the plurality of data transfers is characterized. Each of the plurality of data transfers is correlated with resources of the target integrated circuit. A programmatic description of a data transfer network is generated for the circuit design. The data transfer network connects the hardware accelerator and the microprocessor according to the characterizing and the correlating.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: June 24, 2014
    Assignee: Xilinx, Inc.
    Inventors: Vinod K. Kathail, L. James Hwang, Sundararajarao Mohan, Hua Sun
  • Publication number: 20140113377
    Abstract: The present invention relates to the application of isolated promoters and synthetic dominant selection constructs and enhancers for gene targeting for efficient production of genetically modified cells in a species selected from the Pucciniomycotina and Ustilaginomycotina subphyla, in particular, species selected from the Rhodosporidium, Sporisorium, Sporobolomyces or Ustilago genera.
    Type: Application
    Filed: May 10, 2012
    Publication date: April 24, 2014
    Applicant: TEMASEK LIFE SCIENCES LABORATORY LIMITED
    Inventors: Liang Hui Ji, Yan Bin Liu, John Chong Mei Koh, Long Hua Sun
  • Patent number: 8695377
    Abstract: A process for producing a gaseous component of air under pressure by cryogenic separation is provided.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: April 15, 2014
    Assignee: L'Air Liquide, Societe Anonyme pour l'Etude et l'Exploitation des Procedes Georges Claude
    Inventors: Frédéric Bachelier, Shao-Hua Sun
  • Patent number: 8606639
    Abstract: A business object model, which reflects data that is used during a given business transaction, is utilized to generate interfaces. This business object model facilitates commercial transactions by providing consistent interfaces that are suitable for use across industries, across businesses, and across different departments within a business during a business transaction. Specifically, example business objects include PurchaseOrder ERP and PurchaseRequest ERP.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 10, 2013
    Assignee: SAP AG
    Inventors: Hua Sun, Astrid Doeppenschmidt, Markus Wolf
  • Publication number: 20130269877
    Abstract: A semiconductor processing apparatus includes a wafer supporting unit for supporting a wafer and a wafer holder positioned outside of the wafer supporting unit. The wafer holder further includes a plurality of horizontal parts extending axially around the wafer supporting unit and a plurality of vertical parts vertically extending from the horizontal parts respectively. Topmost surfaces of the vertical parts and a topmost surface of the wafer supporting unit are non-coplanar.
    Type: Application
    Filed: April 16, 2012
    Publication date: October 17, 2013
    Inventors: Yao Hua SUN, Eeyian TOH
  • Patent number: 8559328
    Abstract: The disclosure discloses a method and device for reporting channel state information aperiodically. Wherein the method comprises: collecting the channel state information reported by the UE through the configured receiving window; determining the change speed degree of the channel state of the UE according to the criterion for determining a change speed of the channel state information; deciding whether the UE needs to perform aperiodic reporting according to the mapping relationship between the change speed degree of the channel state information and a reporting period adjusting value, and determining timing for the aperiodic reporting if needed. By the method of the disclosure, on one hand, the base station sufficiently obtains the channel state information reported by the UE, which benefits for more suitable scheduling and resource allocating for the UE; on the other hand, PUSCH resources can be used more rationally.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: October 15, 2013
    Assignee: ZTE Corporation
    Inventors: Yuanchun Tan, Focai Peng, Liping Liu, Xianxi Li, Wei Lei, Hua Sun
  • Publication number: 20130157894
    Abstract: The present invention is based on the surprising finding that pairs of HCV NS5A-targeting inhibitors can be identified which display similar resistance profiles yet, when combined, exhibit synergistic inhibition of wild type replicons and/or replicons carrying mutations conferring resistance to the HCV NS5A-targeting inhibitor. In addition, combinations of these molecules result in a higher genetic barrier to resistance, demonstrating their potential utility as novel combination therapies for treatment of HCV.
    Type: Application
    Filed: July 13, 2011
    Publication date: June 20, 2013
    Inventors: Jin-Hua Sun, Min Gao, Donald R. O'Boyle, II, Julie A. Lemm, Susan B. Roberts, Makonen Belema, Nicholas A. Meanwell
  • Patent number: 8443213
    Abstract: A motherboard capable of detecting consumed power and a method for detecting consumed power thereof are provided. The motherboard includes a VCC layer, a plurality of resistance elements, and a detecting module. A plurality of power traces are laid at the VCC layer, and each of the power traces conducts an operating voltage, respectively. The resistance elements are laid at sources of each of the power traces, respectively. The detecting module is coupled with each of the resistance elements, respectively, to obtain a current value of a current flowing through each of the resistance elements, and generates consumed power corresponding to each of the operating voltages according to the current value and the operating voltage corresponding to the current value.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: May 14, 2013
    Assignee: Asustek Computer Inc.
    Inventor: Pei-Hua Sun
  • Patent number: 8407262
    Abstract: Methods and systems for generating an entity diagram include, in one exemplary embodiment, a user using a processor that executes the program code to generate the entity diagram. The process for generating the entity diagram includes generating an entity diagram with one or more entities and one or more relationships, grouping the one or more entities by a first dimension, and grouping the one or more entities by a second dimension. The process further includes rearranging the groups based on the grouping according to the first dimension, rearranging the entities based on the grouping according to the second dimension, and adjusting one or more relationship links corresponding to the one or more relationships. After the one or more entities and relationships are rearranged and adjusted, the user may access an updated entity diagram.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: March 26, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Shao-Hsin Hsu, Chih-Ping Sun, Zhi-Hua Sun, Jia-Bin Yian
  • Patent number: 8370653
    Abstract: A motherboard which can play an image or a video in a power-off state is disclosed. The motherboard includes a circuit board, a north bridge chipset, a digital photo frame chipset, and a switch unit. The north bridge chipset, the digital photo frame chipset, and the switch unit are disposed on the circuit board. The digital photo frame chipset is activated according to a stand-by power in the power-off state. The switch unit is electrically connected with the north bridge chipset and the digital photo frame chipset, respectively. The switch unit electrically communicates with the north bridge chipset or the digital photo frame chipset according to a triggering signal. The motherboard may utilize the stand-by power in the power-off state to display an image by a display device via the digital photo frame chipset and the north bridge chipset when a computer system is powered off.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: February 5, 2013
    Assignee: ASUSTeK Computer Inc.
    Inventor: Pei-Hua Sun
  • Publication number: 20120195213
    Abstract: The disclosure discloses a method and device for reporting channel state information aperiodically. Wherein the method comprises: collecting the channel state information reported by the UE through the configured receiving window; determining the change speed degree of the channel state of the UE according to the criterion for determining a change speed of the channel state information; deciding whether the UE needs to perform aperiodic reporting according to the mapping relationship between the change speed degree of the channel state information and a reporting period adjusting value, and determining timing for the aperiodic reporting if needed. By the method of the disclosure, on one hand, the base station sufficiently obtains the channel state information reported by the UE, which benefits for more suitable scheduling and resource allocating for the UE; on the other hand, PUSCH resources can be used more rationally.
    Type: Application
    Filed: November 30, 2009
    Publication date: August 2, 2012
    Applicant: ZTE CORPORATION
    Inventors: Yuanchun Tan, Focai Peng, Liping Liu, Xianxi Li, Wei Lei, Hua Sun
  • Publication number: 20120198481
    Abstract: Business application logic corresponding to a business is generated according to requirements of the business. The business application logic includes Web services and Widgets. The Widgets in the business application logic are mashed up to create a Widget mashup application. An adaptation relationship is established between the Web services and the Widgets in the Widget mashup application. An executable business process is generated for the business based on the business application logic and the adaptation relationship. An executable mashup Widget application is generated based on the Widget mashup application and the adaptation relationship.
    Type: Application
    Filed: January 23, 2012
    Publication date: August 2, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shuang Liang, Xiao Xing Liang, Xin Peng Liu, Chang Hua Sun, Xi Ning Wang, Liang Xue, Yu Chen Zhou
  • Patent number: 8230206
    Abstract: A computer system includes a triggering device; and a motherboard, connected to the triggering device, further comprising: a memory stored with a setting parameter of a basic-input-output-system; and a counter connected between the triggering device and the memory; wherein an erasing signal, for erasing the memory, is outputted to the memory from the counter according to a triggering signal outputted from the triggering device while a boosting procedure cannot be successfully executed by the computer system.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: July 24, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventors: Hsu-Hung Cheng, Pei-Hua Sun, Chung-Ta Chin
  • Patent number: 8138811
    Abstract: A key press detecting circuit for detecting the status of the key is provided. The key press detecting circuit comprises a discharging circuit which discharges when the key (K1) is pressed; and a voltage detecting circuit, which comprises a combination of a PNP transistor (T2) and a NPN transistor (T3), wherein when the discharging circuit discharges for a predefined period, the PNP transistor (T2) will be turn on, which causes the NPN transistor (T3) to be turned on and to output a second signal for a second function.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: March 20, 2012
    Assignee: Thomson Licensing
    Inventors: Zhi Jun Liao, Robert Warren Schmidt, Ai Hua Sun
  • Publication number: 20120005229
    Abstract: A method and apparatus for handling data analysis. The apparatus includes an editing device which adds user-specified one of a plurality of operation units to a user-specified layer in a data analysis in response to a user operation, each of the operation units performing a predetermined processing on an associated data source, a connecting device which connects at least one user-specified operation unit in the data analysis to an analysis path in response to a user operation, and a user interface. The user interface receives the user operations and displays the data analysis by representing layers in the data analysis, operation units in the layers and connections on the analysis path in a visual manner.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shao Chun Li, Xiao Hua Sun, Qiang Zhang