Patents by Inventor Hua Wang

Hua Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106235
    Abstract: A high anti-interference microsystem based on System In Package (SIP) for a power grid is provided. The high anti-interference microsystem comprises a ceramic cavity, a ceramic substrate, a magnetic cover plate, a digital signal processing circuit, an analog signal conditioning circuit and a shield, wherein the ceramic cavity supports the ceramic substrate, the magnetic cover plate is in sealed contact with the ceramic cavity, and the ceramic substrate is arranged in a cavity formed by the ceramic cavity and the magnetic cover plate; a sealed shell of the microsystem based on SIP is composed of the magnetic cover plate and the ceramic cavity; the digital signal processing circuit and the analog signal conditioning circuit are arranged on the ceramic substrate and respectively process received signals to be processed; the shield covers an outer side of the sealed shell and is used for shielding external magnetic field interference.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 28, 2024
    Applicant: Electric Power Research Institute of State Grid Zhejiang Electric Power Co., LTD
    Inventors: Xianjun SHAO, Xiaoxin CHEN, Yiming ZHENG, Chen LI, Jianjun WANG, Ping QIAN, Hua XU, Shaoan WANG, Shaohe WANG, Haibao MU, Huibin TAO, Lin ZHAO, Wenzhe ZHENG, Dun QIAN
  • Publication number: 20240105682
    Abstract: A package includes a memory stack attached to a logic device, the memory stack including first memory structures, a first redistribution layer over and electrically connected to the first memory structures, second memory structures on the first redistribution layer, a second redistribution layer over and electrically connected to the second memory structures, and first metal pillars on the first redistribution layer and adjacent the second memory structures, the first metal pillars electrically connecting the first redistribution layer and the second redistribution layer, wherein each first memory structure of the first memory structures includes a memory die comprising first contact pads and a peripheral circuitry die comprising second contact pads, wherein the first contact pads of the memory die are bonded to the second contact pads of the peripheral circuitry die.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Chen-Hua Yu, Chung-Hao Tsai, Chuei-Tang Wang, Yih Wang
  • Publication number: 20240105744
    Abstract: An image sensor includes a photoelectric conversion layer, a plurality of deep trench isolations, a first color filter, a first deflector, and a covering layer. The photoelectric conversion layer includes a first photodiode and a second photodiode. The deep trench isolations separate the first photodiode and the second photodiode, in which a pixel dimension is determined by a distance between two adjacent deep trench isolations. The first color filter is disposed on the first photodiode and the second photodiode. The first deflector is disposed on the first color filter. The covering layer covers and surrounds the first deflector. A refractive index of the covering layer is greater than a refractive index of the first deflector, and a difference value between the refractive index of the covering layer and the refractive index of the first deflector is in a range from 0.15 to 0.6.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Ching-Hua LI, Chun-Yuan WANG, Zong-Ru TU, Po-Hsiang WANG
  • Patent number: 11941065
    Abstract: Systems and methods are described for generating record clusters. The methods comprise receiving a plurality of records from data sources and providing at least a subset of the records to a scoring model that determines scores for various pairings of the records, a score for a given pair of the records representing a probability that the given pair of records contain data elements about the same entity. The method further comprises generating a graph data structure that includes a plurality of nodes, individual nodes representing a different record from the records. The method also comprises assigning a different unique identifier to individual clusters of the final clusters and responding to a request for data regarding a given entity by providing aggregated data elements from those records of the records associated with a cluster of the final clusters having an identifier that represents the given entity.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: March 26, 2024
    Assignee: Experian Information Solutions, Inc.
    Inventors: Hua Li, Sophie Liu, Yi He, Zhixuan Wang, Chi Zhang, Kevin Chen, Shanji Xiong, Christer Dichiara, Mason Carpenter, Mark Hirn, Julian Yarkony
  • Patent number: 11938974
    Abstract: A series-parallel monorail hoist based on an oil-electric hybrid power and a controlling method thereof. The monorail hoist includes a cabin, a hydraulic driving system, a lifting beam, a gear track driving and energy storage system, and a speed adaptive control system connected in series with each other and travelling on a track. The monorail hoist is capable of implementing an independent drive by an electric motor or a diesel engine in an endurance mode, a hybrid drive of the electric motor and the diesel engine in a transportation mode, and a hybrid drive of the diesel engine and a flywheel energy storage system in a climbing mode, according to different operating conditions that include conditions of an upslope, a downslope and a load. Power requirements for the monorail hoist under various operating conditions are satisfied, and the excess energy is recovered during the process of travelling.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: March 26, 2024
    Assignees: CHINA UNIVERSITY OF MINING AND TECHNOLOGY, XUZHOU LIREN MONORAIL TRANSPORTATION EQUIPMENT CO., LTD.
    Inventors: Zhencai Zhu, Hao Lu, Yuxing Peng, Gongbo Zhou, Yu Tang, Hua Chen, Zaigang Xu, Mingzhong Wang, Mai Du, Fuping Zheng
  • Patent number: 11943555
    Abstract: A pixel processing circuit, a reading method thereof and an image sensor are provided. The pixel processing circuit includes a pixel array comprising a plurality of pixel units arranged in a Bayer array, an Analog-to-Digital Converter (ADC) module comprising a plurality of analog-to-digital converters and a plurality of switch selection modules. The analog-to-digital converters are respectively located on the opposite first side and second side of the pixel array. The switch selection modules are set between the pixel array and the analog-to-digital converters to switch the connectivity between the pixel units and the analog-to-digital converters on the opposite sides of the pixel array so that signals of green pixel units are read by first analog-to-digital converters located at the first side of the pixel array, and signals of remaining color pixel units are read by second analog-to-digital converters that are located at the second side of the pixel array.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: March 26, 2024
    Assignee: CHENGDU IMAGE DESIGN TECHNOLOGY CO., LTD.
    Inventors: Hua Cai, Yong Wang, Tian Xia
  • Publication number: 20240095141
    Abstract: A method and an apparatus for displaying an information flow on a terminal device, an electronic device, a computer-readable storage medium, and a computer program product are provided. An implementation is: in response to detecting an activation operation on an application for displaying the information flow, reproducing, on the terminal device, a first page displayed on the terminal device when the application is last switched to running in the background or closed; and in response to determining that a time interval between the activation operation and the application being last switched to running in the background or closed does not exceed a first threshold, displaying a second page as a continuation of a content entry displayed in the first page, where the second page includes at least one first content entry cached in the terminal device before the activation operation but not displayed in the first page.
    Type: Application
    Filed: March 21, 2022
    Publication date: March 21, 2024
    Inventors: Yifan ZHANG, Yuqi WANG, Linfei CHU, Jing NING, Kunjie SUN, Yuhang ZHENG, Naifei SONG, Shujuan ZHANG, Lin LIU, Xunzhuo JU, Zhengwei CHEN, Wei ZHANG, Hua ZHANG, Congjun ZHOU, Tingkang WU, Tengfei LV, Hanmeng LIU, Lei WANG
  • Publication number: 20240096731
    Abstract: A semiconductor package is provided, which includes a first chip disposed over a first package substrate, a molding compound surrounding the first chip, a first thermal interface material disposed over the first chip and the molding compound, a heat spreader disposed over the thermal interface material, and a second thermal interface material disposed over the heat spreader. The first thermal interface material and the second thermal interface material have an identical width.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Chin-Hua WANG, Po-Yao LIN, Feng-Cheng HSU, Shin-Puu JENG, Wen-Yi LIN, Shu-Shen YEH
  • Publication number: 20240097258
    Abstract: A battery box and a battery pack are provided. The battery box includes a bottom plate and a side wall. The side wall and the bottom plate enclose a space for accommodating a battery and/or an electrical component. The battery box further includes a lifting column integrally formed with the side wall and a fixed sealing block sleeved on the lifting column. The bottom plate is located between the side wall and the fixed sealing block. The side wall is fixedly connected to the bottom plate through the fixed sealing block. A first sealing member for sealing a gap between the fixed sealing block and the bottom plate is arranged between the fixed sealing block and the bottom plate. The fixed sealing block is sealingly connected to the lifting column.
    Type: Application
    Filed: March 7, 2023
    Publication date: March 21, 2024
    Applicant: CALB Group Co., Ltd.
    Inventors: Zhaoyang Jin, Shuaifeng Wang, Xulong Yang, Hua Chen, Xinwei Jiang
  • Publication number: 20240092851
    Abstract: The disclosure provides IL-7 fusion proteins as well as compositions comprising them. The disclosure further provides methods of treating and/or preventing lymphopenia or immunodeficiency in a subject, wherein the method includes administering a fusion protein as described herein.
    Type: Application
    Filed: November 23, 2021
    Publication date: March 21, 2024
    Inventors: Shusheng Wang, Jianwei Zhu, Haiqiu Huang, Ailin Wang, Kaiyong Yang, Yueqing Xie, Hua Jiang
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Publication number: 20240096784
    Abstract: Some embodiments of the present disclosure relate to an integrated chip including an extended via that spans a combined height of a wire and a via and that has a smaller footprint than the wire. The extended via may replace a wire and an adjoining via at locations where the sizing and the spacing of the wire are reaching lower limits. Because the extended via has a smaller footprint than the wire, replacing the wire and the adjoining via with the extended via relaxes spacing and allows the size of the pixel to be further reduced. The extended via finds application for capacitor arrays used for pixel circuits.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 21, 2024
    Inventors: Meng-Hsien Lin, Hsing-Chih Lin, Ming-Tsong Wang, Min-Feng Kao, Kuan-Hua Lin, Jen-Cheng Liu, Dun-Nian Yaung, Ko Chun Liu
  • Publication number: 20240097300
    Abstract: A multi-band filter includes a circuit board, a first resonator, a second resonator, and a coupling element configured to couple the first resonator with the second resonator. The coupling element includes a first coupling capacitor, a second coupling capacitor, a first short-circuited stub and a second short-circuited stub. The first coupling capacitor has two terminals electrically connected to the first portion of the first resonator and the first portion of the second resonator respectively. The second coupling capacitor has two terminals electrically connected to the second portion of the first resonator and the second portion of the second resonator respectively. The first short-circuited stub is electrically connected to the first coupling capacitor and a ground plane. The second short-circuited stub is electrically connected to the second coupling capacitor and a ground plane.
    Type: Application
    Filed: June 20, 2023
    Publication date: March 21, 2024
    Inventors: Kun Yen TU, Meng-Hua TSAI, Weiting LEE, Sin-Siang WANG
  • Publication number: 20240098833
    Abstract: A method for mobility enhancement in wireless communication systems is provided. The method is performed by a User Equipment (UE) configured with a first Small Data Transmission (SDT) configuration by a first cell. The method includes receiving a Radio Resource Control (RRC) release message including a suspend configuration from the first cell; transitioning to an RRC INACTIVE state in response to receiving the RRC release message; receiving, in the RRC INACTIVE state, a System Information Block Type 1 (SIB1) including a second SDT configuration from a second cell; camping on the second cell in response to receiving the SIB1 from the second cell; and while the UE is camping on the second cell, refraining from using the first SDT configuration to initiate an SDT procedure associated with the second cell in a case that the UE does not support performing the SDT procedure associated with the second cell.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: YUNG-LAN TSENG, YEN-HUA LI, HAI-HAN WANG, HUNG-CHEN CHEN
  • Patent number: 11936777
    Abstract: Disclosed is a secret-key provisioning (SKP) method and device based on an optical line terminal (OLT), which can generate an SKP queue according to key requests received; generate at least one secret-key according to the SKP queue; and store the at least one secret-key in key pools (KPs) of corresponding ONUS. A non-transitory computer-readable storage medium is also disclosed.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: March 19, 2024
    Assignee: Beijing University of Posts and Telecommunications
    Inventors: Yongli Zhao, Hua Wang, Xiaosong Yu, Xinyi He, Yajie Li, Jie Zhang
  • Patent number: 11937227
    Abstract: Methods, systems, and devices for wireless communications are described. In some examples, a user equipment (UE) may receive, from a base station, a configuration indicating a set of occasions configured for sidelink communications for the UE. The sidelink communications may include at least one of sidelink traffic, semi-persistent scheduling traffic, or a combination thereof. The UE may receive a control indication associated with a radio network temporary identifier. The control indication may include a downlink control information. In some examples, the UE may skip a first pre-scheduled occasion of the set of occasions configured for sidelink communications based on the control indication, and may perform sidelink communications during a second pre-scheduled occasion of the set of occasions after skipping the first pre-scheduled occasion.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: March 19, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Hua Wang, Junyi Li, Piyush Gupta
  • Publication number: 20240088124
    Abstract: A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Inventors: HSIANG-TAI LU, SHUO-MAO CHEN, MILL-JER WANG, FENG-CHENG HSU, CHAO-HSIANG YANG, SHIN-PUU JENG, CHENG-YI HONG, CHIH-HSIEN LIN, DAI-JANG CHEN, CHEN-HUA LIN
  • Publication number: 20240087974
    Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Lin, Chin-Hua Wang, Shu-Shen Yeh, Chien-Hung Chen, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20240085322
    Abstract: The present invention relates to an optical system for triglyceride inspection partially integrated into a toilet seat and comprising a plurality of optical sensor modules and a controlling and processing module, wherein each said optical sensor module comprises a first light source, a second light source and an optical sensor. The optical sensor receives light signals generated by the first and second light sources respectively on the skin of the person (especially the skin of the thighs) to be tested and thereby generates a sensing signal of an adaptive calibration function. The sensing signal is then converted by the controlling and processing module into an inspection value of triglyceride, which is transmitted to a display unit. With the above optical system for triglyceride inspection, triglycerides can be inspected automatically without invasive blood sampling, making the system a convenient home health monitoring device.
    Type: Application
    Filed: September 8, 2022
    Publication date: March 14, 2024
    Applicant: Taiwan RedEye Biomedical Inc.
    Inventors: Shuo-Ting Yan, I-Hua Wang, Chen-Chung Chang
  • Publication number: 20240088063
    Abstract: A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Hua Wang, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng