Patents by Inventor Huang Lin

Huang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10727154
    Abstract: A component coupled to a heat dissipation unit, allowing a screwing element to be pivotally coupled to a heat dissipation unit, includes a body, a stop portion, a first inner engagement portion, a second inner engagement portion and a first outer engagement portion. The body has a first part and a second part and forms therein a through hole which extends axially. The stop portion is circumferentially disposed at the rim of the first or second part. The first inner engagement portion has checking plates and corresponds in position to the stop portion. The second inner engagement portion has stop blocks disposed at the first or second part. The first outer engagement portion is disposed at the rim of the body and opposite the stop portion. The screwing element is fixed to the heat dissipation unit temporarily but firmly, thereby preventing disintegration and disconnection during transport.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: July 28, 2020
    Assignee: Asia Vital Components Co., Ltd.
    Inventors: Sheng-Huang Lin, Yuan-Yi Lin
  • Patent number: 10725979
    Abstract: To measure usage of computing resources on a computer, a logging service running on the computer generates event data. The computer transmits the event data to an event processing system. With a large number of computers, each computer transmits its event data to the event processing system. The event processing system stores the event data in a storage system as a file system object, such as a stream or file, in which different data fields of the received event data are stored in a structured or semi-structured manner. The event data can be processed in parallel on different pivots using map-reduce operations. Such processing can include, but is not limited to, de-duplicating event data, aggregating event data related to a resource into measurements of usage of that resource, and grouping original data or aggregated data by user or group of user for further analysis and reporting.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: July 28, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yao Huang Lin, Matthew Westphal, Yu Tan, Ullattil Shaji, Moinak Bandyopadhyay
  • Publication number: 20200235035
    Abstract: A locating unit with a base seat locating structure. The base seat locating structure includes a base seat and a locating unit. The base seat has a pair of locating holes each having a first locating hole section and a second locating hole section and a connection section connected therebetween. The second locating hole section has a locating recess. The locating unit has a main body having a first side and a second side and a through hole passing through the main body between the first and second sides. A first protruding key and a second protruding key protrude from the second side beside the through hole. The first and second protruding keys are displaceably assembled and connected with the locating holes. Free ends of the first and second protruding keys respectively have a first end section and a second end section connected and assembled with the locating recesses.
    Type: Application
    Filed: April 16, 2019
    Publication date: July 23, 2020
    Inventor: Sheng-Huang Lin
  • Publication number: 20200236805
    Abstract: A securing unit and a base seat securing structure. The base seat securing structure includes a base seat and multiple securing units. The base seat has a top side, a bottom side, multiple perforations and multiple securing holes formed through the base seat between the top side and the bottom side. The securing holes are positioned around the perforations. Each securing unit has a seat section disposed on the top side of the base seat and multiple connection sections. The seat section has a bore in communication with and corresponding to the perforation. The connection sections are disposed under a lower side of the seat section. One end of each connection section has one or multiple stopper end sections. The stopper end sections are passed through the corresponding securing holes to abut against the bottom side of the base seat.
    Type: Application
    Filed: April 16, 2019
    Publication date: July 23, 2020
    Inventor: Sheng-Huang Lin
  • Publication number: 20200232492
    Abstract: The present invention relates to a base fastener which is disposed corresponding to a pair of arc holes on a base. The base fastener comprises a body. The body has a first side, a second side, and a throughhole. The throughhole penetrates through the first side and the second side. A first post and a second post protrude from the second side beside the throughhole. The first post, the second post, and the pair of arc holes are disposed correspondingly and rotatably connected to each other to be assembled with the base firmly.
    Type: Application
    Filed: April 16, 2019
    Publication date: July 23, 2020
    Inventor: Sheng-Huang Lin
  • Publication number: 20200235036
    Abstract: A fixing structure for heat dissipation assembly includes a base and multiple female fastener holders. The base has at least one through bore axially extending through an upper and a lower surface thereof, as well as coupling holes located outside the through bore and respectively having an engaging element disposed therein. The female fastener holder has a lower side formed with coupling protrusions corresponding to the coupling holes. The coupling protrusion has a guiding groove radially provided thereon and having a lower and an upper end recess for engaging with the engaging element in the corresponding coupling hole. The engaging elements in the coupling holes are guided by the guiding grooves to move from the lower to the upper recesses when the female fastener holder is turned relative to the through bore and the coupling holes on the base, bringing the coupling protrusions to axially insert into the coupling holes.
    Type: Application
    Filed: April 16, 2019
    Publication date: July 23, 2020
    Inventor: Sheng-Huang Lin
  • Patent number: 10717487
    Abstract: A vehicle includes a fender, a storage compartment, and a first retaining wall. The fender has an inner surface, an outer surface, and a through hole connecting the inner surface and the outer surface. The storage compartment has a bottom plate. The bottom plate of the storage compartment is located at a side of the outer surface of the fender and at least covers the through hole. The fender is located below the storage compartment in a top-bottom direction of the vehicle. The first retaining wall is disposed on the outer surface of the fender and surrounds at least a portion of the through. A portion of the first retaining wall is closer to a front of the vehicle than the through hole in a front-rear direction of the vehicle.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: July 21, 2020
    Assignee: Gogoro Inc.
    Inventors: Hsiu-Huang Lin, Chia-Hao Chang
  • Patent number: 10714395
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate, an isolation feature between and adjacent to the first fin and the second fin, and a fin isolation structure between the first fin and the second fin. The fin isolation structure includes a first insulating layer partially embedded in the isolation feature, a second insulating layer having sidewall surfaces and a bottom surface that are covered by the first insulating layer, a first capping layer covering the second insulating layer and having sidewall surfaces that are covered by the first insulating layer, and a second capping layer having sidewall surfaces and a bottom surface that are covered by the first capping layer.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chu-An Lee, Chen-Hao Wu, Peng-Chung Jangjian, Chun-Wen Hsiao, Teng-Chun Tsai, Huang-Lin Chao
  • Patent number: 10685230
    Abstract: A fusion method is provided to obtain a spatiotemporal image. The present invention is based on a conventional model—a spatial and temporal adaptive reflectance fusion model (STARFM). In the present invention, top-of-atmosphere (TOA) reflectance is kept in image fusion. Furthermore, Himawari-8, a geostationary satellite having a very high temporal resolution (10 minutes), is used. The present invention uses similar spectral bands as whose used for high-spatial-resolution image in satellites like Landsat-8 and SPOT-6. The present invention combines a high spatial-resolution image with a high temporal-resolution image obtained from Himawari-8. Thus, a TOA-reflectance-based spatial-temporal image fusion method (TOA-STFM) is proposed for generating an image having high spatiotemporal resolution. The present invention can be applied for air quality monitoring.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: June 16, 2020
    Assignee: NATIONAL CENTRAL UNIVERSITY
    Inventors: Chih-Yuan Huang, Hsuan-Chi Ho, Tang-Huang Lin
  • Publication number: 20200176264
    Abstract: A wafer is polished by performing a chemical reaction to change a property of a first portion of a material layer on the wafer using a first chemical substance. A first rinse is performed to remove the first chemical substance and retard the chemical reaction. A mechanical polishing process is then performed to remove the first portion of the material layer.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 4, 2020
    Inventors: Shen-Nan LEE, Teng-Chun TSAI, Chu-An LEE, Chen-Hao WU, Chun-Hung LIAO, Huang-Lin CHAO
  • Publication number: 20200168507
    Abstract: A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.
    Type: Application
    Filed: April 2, 2019
    Publication date: May 28, 2020
    Inventors: I-MING CHANG, CHUNG-LIANG CHENG, HSIANG-PI CHANG, HUNG-CHANG SUN, YAO-SHENG HUANG, YU-WEI LU, FANG-WEI LEE, ZIWEI FANG, HUANG-LIN CHAO
  • Publication number: 20200152746
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate and an insulating layer over the substrate. The insulating layer has a trench partially exposing the substrate. The method includes forming a gate dielectric layer in the trench. The method includes forming a first metal-containing layer over the gate dielectric layer. The method includes forming a silicon-containing layer over the first metal-containing layer. The method includes forming a second metal-containing layer over the silicon-containing layer. The method includes forming a gate electrode layer in the trench and over the second metal-containing layer.
    Type: Application
    Filed: February 15, 2019
    Publication date: May 14, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsueh-Wen TSAU, Chun-I WU, Ziwei FANG, Huang-Lin CHAO, I-Ming CHANG, Chung-Liang CHENG, Chih-Cheng LIN
  • Publication number: 20200135475
    Abstract: Examples of a method of forming an integrated circuit device with an interfacial layer disposed between a channel region and a gate dielectric are provided herein. In some examples, the method includes receiving a workpiece having a substrate and a fin having a channel region disposed on the substrate. An interfacial layer is formed on the channel region of the fin, and a gate dielectric layer is formed on the interfacial layer. A first capping layer is formed on the gate dielectric layer, and a second capping layer is formed on the first capping layer. An annealing process is performed on the workpiece configured to cause a first material to diffuse from the first capping layer into the gate dielectric layer. The forming of the first and second capping layers and the annealing process may be performed in the same chamber of a fabrication tool.
    Type: Application
    Filed: November 29, 2018
    Publication date: April 30, 2020
    Inventors: Chung-Liang Cheng, Chun-I Wu, Ziwei Fang, Huang-Lin Chao
  • Publication number: 20200135486
    Abstract: The present disclosure provides a method for planarizing a metal-dielectric surface. The method includes: providing a slurry to a first metal-dielectric surface, wherein the first metal-dielectric surface comprises a silicon oxide portion and a metal portion, and wherein the slurry comprises a ceria compound; and performing a chemical mechanical polish (CMP) operation using the slurry to simultaneously remove the silicon oxide portion and the metal portion. The present disclosure also provides a method for planarizing a metal-dielectric surface and a method for manufacturing a semiconductor.
    Type: Application
    Filed: October 25, 2018
    Publication date: April 30, 2020
    Inventors: CHUN-HUNG LIAO, CHUNG-WEI HSU, TSUNG-LING TSAI, CHEN-HAO WU, CHU-AN LEE, SHEN-NAN LEE, TENG-CHUN TSAI, HUANG-LIN CHAO
  • Publication number: 20200119164
    Abstract: A method includes removing a dummy gate structure to form a gate trench over a semiconductor layer, forming a high-k gate dielectric layer over an interfacial layer exposed in the gate trench, depositing a metal-containing precursor over the high-k gate dielectric layer to form a metal-containing layer, and subsequently depositing an aluminum-containing precursor over the metal-containing layer, where depositing the aluminum-containing precursor forms an aluminum oxide layer at an interface between the high-k gate dielectric layer and the interfacial layer and where the metal-containing precursor includes a metal different from aluminum. The method further includes, subsequent to depositing the aluminum-containing precursor, removing a portion of the metal-containing layer, depositing a work-function metal layer over a remaining portion of the metal-containing layer, and forming a bulk conductive layer over the work-function metal layer, resulting in a metal gate structure.
    Type: Application
    Filed: September 17, 2019
    Publication date: April 16, 2020
    Inventors: Hsueh Wen Tsau, Ziwei Fang, Huang-Lin Chao, Kuo-Liang Sung
  • Patent number: 10617719
    Abstract: The present invention provides a deep sea water extract and a method for inhibiting the proliferation of Helicobacter pylori strains using the deep sea water extract, wherein the deep sea water extract has an organic component with a molecular weight of 685 to 690, 733 to 738 and 1,070 to 1,075. The deep sea water extract of the present invention can be applied in the prevention and treatment of H. pylori infection.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: April 14, 2020
    Assignee: Taiwan Tian Shing Biotech Co., Ltd.
    Inventors: Chiang-Ting Chien, Jyh-Chin Yang, Ping-Yi Huang, Cheng-Huang Lin, Kwun-min Chen
  • Publication number: 20200091007
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate, an isolation feature between and adjacent to the first fin and the second fin, and a fin isolation structure between the first fin and the second fin. The fin isolation structure includes a first insulating layer partially embedded in the isolation feature, a second insulating layer having sidewall surfaces and a bottom surface that are covered by the first insulating layer, a first capping layer covering the second insulating layer and having sidewall surfaces that are covered by the first insulating layer, and a second capping layer having sidewall surfaces and a bottom surface that are covered by the first capping layer.
    Type: Application
    Filed: February 15, 2019
    Publication date: March 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chu-An LEE, Chen-Hao WU, Peng-Chung JANGJIAN, Chun-Wen HSIAO, Teng-Chun TSAI, Huang-Lin CHAO
  • Publication number: 20200082151
    Abstract: A fusion method is provided to obtain a spatiotemporal image. The present invention is based on a conventional model—a spatial and temporal adaptive reflectance fusion model (STARFM). In the present invention, top-of-atmosphere (TOA) reflectance is kept in image fusion. Furthermore, Himawari-8, a geostationary satellite having a very high temporal resolution (10 minutes), is used. The present invention uses similar spectral bands as whose used for high-spatial-resolution image in satellites like Landsat-8 and SPOT-6. The present invention combines a high spatial-resolution image with a high temporal-resolution image obtained from Himawari-8. Thus, a TOA-reflectance-based spatial-temporal image fusion method (TOA-STFM) is proposed for generating an image having high spatiotemporal resolution. The present invention can be applied for air quality monitoring.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 12, 2020
    Inventors: Chih-Yuan Huang, Hsuan-Chi Ho, Tang-Huang Lin
  • Publication number: 20200068745
    Abstract: A heat dissipation structure of electronic device includes a main body having a first heat pipe set and a second heat pipe set. The first heat pipe set includes at least one first heat pipe normal to the main body. A first thermal module and a first fan are disposed on the first heat pipe. The second heat pipe set includes at least one second heat pipe having a first section normal to the main body and a second section extending from the first section in parallel to the main body. A second thermal module and a second fan are disposed on the second section. The first fan creates a first airflow flowing through the first and second thermal modules in a first direction. The second fan creates a second airflow flowing through the second thermal module in a second direction.
    Type: Application
    Filed: August 22, 2018
    Publication date: February 27, 2020
    Inventors: Sheng-Huang Lin, Yen-Lin Chu
  • Publication number: 20200032105
    Abstract: A chemical mechanical polishing (CMP) slurry composition includes an oxidant including one or more oxygen molecules, and an abrasive particle having a core structure encapsulated by a shell structure. The core structure includes a first compound and the shell structure includes a second compound different from the first compound, where a diameter of the core structure is greater than a thickness of the shell structure, and where the first compound is configured to react with the oxidant to form a reactive oxygen species.
    Type: Application
    Filed: June 28, 2019
    Publication date: January 30, 2020
    Inventors: An-Hsuan Lee, Shen-Nan Lee, Chen-Hao Wu, Chun-Hung Liao, Teng-Chun Tsai, Huang-Lin Chao