Patents by Inventor Hubert Harrer

Hubert Harrer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8053675
    Abstract: Printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. Multiple collinear slots in the form of a dashed line are introduced in the metal layer implementing the power plane that alter the current distribution in the power plane and improve the strength of the PWB. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots are dashed and may be made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Hubert Harrer, Andreas Huber, Thomas-Michael Winkel
  • Patent number: 7873933
    Abstract: A computer program for balancing power plane pin currents in a printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. One or more slots is introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be dashed or made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: Hubert Harrer, Andreas Huber, Thomas-Michael Winkel
  • Patent number: 7481469
    Abstract: A door lock for an oven includes a lock housing, a geared motor, an actuating shaft to be driven by the geared motor, a retaining plate and a locking element formed as a lever to be operated by the actuating shaft. The lever is mounted on the retaining plate and has a lever axle for reversibly changing location relative to the lock housing. A spring exerts a force being overcome in an emergency-unlocking function permitting adjustment of the retaining plate to allow opening of the lever having been previously brought into a locking position by the actuating shaft, without further operation of the actuating shaft. The actuating shaft is adjustable along its axis by the lever having been unlocked in an emergency.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: January 27, 2009
    Assignee: Ellenberger & Poensgen GmbH
    Inventor: Hubert Harrer
  • Patent number: 7473102
    Abstract: An electronic apparatus includes first and second level package structures and an LGA (land grid array) interposer. The first level package structure includes a package substrate, one or more integrated circuit chips mounted on a first surface of the package substrate, and a first pattern of I/O contacts with pitch P1 formed on a second surface of the package substrate opposite the first surface. The second level package structure includes a second pattern of I/O contacts with pitch P2, wherein P2 is not equal to P1. The LGA interposer is disposed between the first and second level package structures and provides space transform electrical interconnections between the first second patterns of I/O contacts, and further includes a dummy contact formed on at least a first or second surface of the LGA interposer and aligned to an LGA contact on an opposing surface of the LGA interposer.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Evan George Colgan, Paul W. Coteus, Hubert Harrer, Gareth Geoffrey Hougham, John Harold Magerlein, John Torok
  • Publication number: 20080257592
    Abstract: An apparatus for balancing power plane pin currents in a printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. One or more slots are introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be dashed or made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
    Type: Application
    Filed: June 25, 2008
    Publication date: October 23, 2008
    Inventors: Hubert Harrer, Andreas Huber, Thomas-Michael Winkel
  • Patent number: 7418779
    Abstract: A method and apparatus for balancing power plane pin currents in a printed wiring board (PWB) uses a set of collinear slots in the form of a dashed line to reduce pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. The slots are introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: September 2, 2008
    Assignee: International Business Machines Corporation
    Inventors: Hubert Harrer, Andreas Huber, Thomas-Michael Winkel
  • Publication number: 20080059919
    Abstract: A computer program for balancing power plane pin currents in a printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. One or more slots is introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be dashed or made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
    Type: Application
    Filed: November 7, 2007
    Publication date: March 6, 2008
    Inventors: Hubert Harrer, Andreas Huber, Thomas-Michael Winkel
  • Publication number: 20070241568
    Abstract: A door lock for an oven includes a lock housing, a geared motor, an actuating shaft to be driven by the geared motor, a retaining plate and a locking element formed as a lever to be operated by the actuating shaft. The lever is mounted on the retaining plate and has a lever axle for reversibly changing location relative to the lock housing. A spring exerts a force being overcome in an emergency-unlocking function permitting adjustment of the retaining plate to allow opening of the lever having been previously brought into a locking position by the actuating shaft, without further operation of the actuating shaft. The actuating shaft is adjustable along its axis by the lever having been unlocked in an emergency.
    Type: Application
    Filed: June 1, 2007
    Publication date: October 18, 2007
    Inventor: Hubert Harrer
  • Publication number: 20070232090
    Abstract: LGA (land grid array) interposers having variable pitch connectors and distribution wiring to support space transforming I/O interconnections between first level chip modules and second level packaging. Apparatus and methods for constructing high-performance electronic modules (such as processor modules for computer systems) using LGA interposers that provide space transform I/O interconnections between fine pitch I/O contacts on a chip module and coarse pitch contacts on a circuit board.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 4, 2007
    Inventors: Evan Colgan, Paul Coteus, Hubert Harrer, Gareth Hougham, John Magerlein, John Torok
  • Patent number: 7219046
    Abstract: A method, apparatus, system, and signal-bearing medium that in an embodiment select a simulator input fragment, characterize an I/O model using a set of simulator input fragments, create a set of behavioral models based on the characterization and compare the set of behavioral models to the I/O model. In an embodiment, the set of behavioral models is compared to the I/O model by creating simulator input decks that include net topology for the I/O model and the set of behavioral models, simulating the decks, and comparing the output from the simulating.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: May 15, 2007
    Assignee: International Business Machines Corporation
    Inventors: Zhaoqing Chen, Jan Elizabeth Garrett-Hoffman, Hubert Harrer, Stephen Bruce White
  • Patent number: 7131080
    Abstract: A method, apparatus and program product oversee and coordinate the automatic generation, monitoring and submission of package files and other modeling processes to enable focused, flexible and efficient modeling of design performance characteristics.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: Thaddeus Chen, Zhaoqing Chen, Hubert Harrer, Jan Elizabeth Hoffman, Susan Marie Karwoski, Joonsuk Park, Edwin Scott Reichmann, Stephen Bruce White, John W. Zack
  • Patent number: 7111275
    Abstract: A method, apparatus and program product generate package files that are separately stored and selectively combined to generate a net file suited for system simulation and analysis. Selective combination of the package files using respective reference connections of each package enables focused and efficient modeling of design performance characteristics.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: September 19, 2006
    Assignee: International Business Machines Corporation
    Inventors: Thaddeus Chen, Zhaoqing Chen, Hubert Harrer, Jan Elizabeth Hoffman, Susan Marie Karwoski, Joonsuk Park, Stephen Bruce White, John W. Zack
  • Publication number: 20060169487
    Abstract: A method and apparatus for balancing power plane pin currents in a printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. One or more slots is introduced in the metal layer implementing the power plane that alter the current distribution in the power plane. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots may be dashed or made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.
    Type: Application
    Filed: February 3, 2005
    Publication date: August 3, 2006
    Inventors: Hubert Harrer, Andreas Huber, Thomas-Michael Winkel
  • Publication number: 20050131664
    Abstract: A method, apparatus, system, and signal-bearing medium that in an embodiment select a simulator input fragment, characterize an I/O model using a set of simulator input fragments, create a set of behavioral models based on the characterization and compare the set of behavioral models to the I/O model. In an embodiment, the set of behavioral models is compared to the I/O model by creating simulator input decks that include net topology for the I/O model and the set of behavioral models, simulating the decks, and comparing the output from the simulating.
    Type: Application
    Filed: December 11, 2003
    Publication date: June 16, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Zhaoqing Chen, Jan Garrett-Hoffman, Hubert Harrer, Stephen White
  • Patent number: 6886868
    Abstract: A door latch is particularly suited for a washing machine door. The device has a pivotally mounted rotary catch for latching onto a locking element and a pivotally mounted blocking or arresting element. The latter is pivotally mounted between a latching position that latches the rotary catch and an unlatching position that releases the rotary catch. The arresting element can be actuated by a bimetallic adjusting element, which can be heated by a heating element, and by an actuator system that, at the same time, is actively connected to the turning catch in a direct manner. A torque component effected on the arresting member by the actuator system is greater in value that a torque component introduced by the bimetallic adjusting element.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: May 3, 2005
    Assignee: Ellenberger & Poensgen GmbH
    Inventors: Günter Hengelein, Hubert Harrer
  • Publication number: 20050049841
    Abstract: A method, apparatus and program product oversee and coordinate the automatic generation, monitoring and submission of package files and other modeling processes to enable focused, flexible and efficient modeling of design performance characteristics.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thaddeus Chen, Zhaoqing Chen, Hubert Harrer, Jan Hoffman, Susan Karwoski, Joonsuk Park, Edwin Reichmann, Stephen White, John Zack
  • Publication number: 20050050489
    Abstract: A method, apparatus and program product generate package files that are separately stored and selectively combined to generate a net file suited for system simulation and analysis. Selective combination of the package files using respective reference connections of each package enables focused and efficient modeling of design performance characteristics.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 3, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thaddeus Chen, Zhaoqing Chen, Hubert Harrer, Jan Hoffman, Susan Karwoski, Joonsuk Park, Stephen White, John Zack
  • Patent number: 6774836
    Abstract: A method, digital circuit system and program product for reducing delta-I noise in a plurality of activity units connected to a common DC-supply voltage. In order to smooth the fluctuations (delta-I) of a total current demand I, and a respective resulting fluctuation of the supply voltage, a signalling scheme between said activity units and a supervisor unit which holds a system-specific “database” containing at least the current demand of each activity unit device when operating regularly. Dependent of the quantity of calculated, imminent delta-I a subset of said activity units with a respective current I demand is selected and controlled, for either temporarily delaying their beginning of activity in case of an imminent supply voltage drop, or temporarily continuing their activity with a predetermined, activity-specific NO-OP phase in case of an imminent supply voltage rise.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Roland Frech, Bernd Garben, Hubert Harrer, Andreas Huber, Dierk Kaller, Erich Klink, Thomas-Michael Winkel, Wiren Dale Becker
  • Publication number: 20040140677
    Abstract: A door latch is particularly suited for a washing machine door. The device has a pivotally mounted rotary catch for latching onto a locking element and a pivotally mounted blocking or arresting element. The latter is pivotally mounted between a latching position that latches the rotary catch and an unlatching position that releases the rotary catch. The arresting element can be actuated by a bimetallic adjusting element, which can be heated by a heating element, and by an actuator system that, at the same time, is actively connected to the turning catch in a direct manner. A torque component effected on the arresting member by the actuator system is greater in value that a torque component introduced by the bimetallic adjusting element.
    Type: Application
    Filed: January 5, 2004
    Publication date: July 22, 2004
    Inventors: Gunter Hengelein, Hubert Harrer
  • Publication number: 20040051511
    Abstract: A method, digital circuit system and program product for reducing delta-I noise in a plurality of activity units connected to a common DC-supply voltage. In order to smooth the fluctuations (delta-I) of a total current demand I, and a respective resulting fluctuation of the supply voltage, a signalling scheme between said activity units and a supervisor unit which holds a system-specific “database” containing at least the current demand of each activity unit device when operating regularly. Dependent of the quantity of calculated, imminent delta-I a subset of said activity units with a respective current I demand is selected and controlled, for either temporarily delaying their beginning of activity in case of an imminent supply voltage drop, or temporarily continuing their activity with a predetermined, activity-specific NO-OP phase in case of an imminent supply voltage rise.
    Type: Application
    Filed: June 16, 2003
    Publication date: March 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Roland Frech, Bernd Garben, Hubert Harrer, Andreas Huber, Dierk Kaller, Erich Klink, Thomas-Michael Winkel, Wiren Dale Becker