Patents by Inventor Hui Cheng

Hui Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • JIG FOR MANUFACTURING SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
    Publication number: 20220230985
    Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • METHOD OF FORMING PACKAGE STRUCTURE
    Publication number: 20220231005
    Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.
    Type: Application
    Filed: April 10, 2022
    Publication date: July 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
  • Dummy structure of stacked and bonded semiconductor device
    Patent number: 11393783
    Abstract: A semiconductor device and method utilizing a dummy structure in association with a redistribution layer is provided. By providing the dummy structure adjacent to the redistribution layer, damage to the redistribution layer may be reduced from a patterning of an overlying passivation layer, such as by laser drilling. By reducing or eliminating the damage caused by the patterning, a more effective bond to an overlying structure, such as a package, may be achieved.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: July 19, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Hui Cheng, Po-Hao Tsai, Jing-Cheng Lin
  • SEMICONDUCTOR PACKAGES
    Publication number: 20220223567
    Abstract: A semiconductor package includes a first semiconductor die, an adhesive layer, a second semiconductor die, a plurality of conductive pillars and an encapsulant. The adhesive layer is adhered to the first semiconductor die. The second semiconductor die is stacked over the first semiconductor die. The conductive pillars surround the first semiconductor die.
    Type: Application
    Filed: March 31, 2022
    Publication date: July 14, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Fu Kao, Chih-Yuan Chien, Li-Hui Cheng, Szu-Wei Lu
  • DEVICE AND METHOD FOR REDUCING TURN-OFF TIME OF TRANSIENT ELECTROMAGNETIC TRANSMITTING SIGNAL
    Publication number: 20220221612
    Abstract: A device for reducing turn-off time of a transient electromagnetic transmitting signal includes a transmitting coil, a first electronic switch to control connection mode of the transmitting coil and a second electronic switch configured to form a bridge arm. The transmitting coil is a twisted pair including a first wire and a second wire. The first wire is connected to one end of the second electronic switch. The other end of the second electronic switch is connected to one end of the first electronic switch. The other end of the first electronic switch is connected to the second wire. The connection mode of the transmitting coil includes head-to-head connection, head-to-tail connection and tail-to-tail connection between the first wire and the second wire. The first wire and the second wire are connected to form a transmitting loop.
    Type: Application
    Filed: March 4, 2022
    Publication date: July 14, 2022
    Inventors: Guohong FU, Songyuan FU, Hui CHENG, Tianchun YANG
  • Headphone control system
    Patent number: 11381899
    Abstract: A headphone control system for use within a headphone includes a temperature sensor for detecting whether the circumference temperature of the headphone is relatively far from the human temperature implying the headphone is no longer worn by the user, and a gravity sensor for detecting whether the headphone is stationary implying that the headphone is not used for enabling a power saving mode, or is moving implying that the headphone is not yet unused for maintaining operation. The detection constantly is applied to the headphone disregarding whether the headphone is in an operation mode or a power saving mode so as to efficiently have the headphone operated in response to currently using or power-saved in response to non-using.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: July 5, 2022
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Wen-Kuei Chou, Hui-Cheng Chen, Hsu-Kuo Liang
  • ELECTRICAL PROSPECTING SIGNAL TRANSMISSION DEVICE CAPABLE OF SUPPRESSING ELECTROMAGNETIC COUPLING INTERFERENCE AND ELECTRICAL PROSPECTING SIGNAL TRANSMISSION METHOD USING SAME
    Publication number: 20220187488
    Abstract: An electrical prospecting signal transmission device capable of suppressing electromagnetic coupling interference, including a rectangular wave signal source, an output circuit for supplying power to the ground and a plurality of transmission channels. Each of the plurality of transmission channels includes an isolated driving circuit, a low-pass filter circuit and a power amplification circuit connected sequentially in series. The rectangular wave signal source is configured to generate a rectangular wave or a composite rectangular wave. A signal output terminal of the rectangular wave signal source is connected to an input terminal of the isolated driving circuit, and an output terminal of the power amplification circuit is connected to the output circuit to supply power to the ground.
    Type: Application
    Filed: March 4, 2022
    Publication date: June 16, 2022
    Inventors: Guohong FU, Hui CHENG, Songyuan FU, Xiangqin ZHONG
  • Epitaxy-free nanowire cell process for the manufacture of photovoltaics
    Patent number: 11362229
    Abstract: Photovoltaics configured to be manufactured without epitaxial processes and methods for such manufacture are provided. Methods utilize bulk semiconducting crystal substrates, such as, for example, GaAs and InP such that epitaxy processes are not required. Nanowire etch and exfoliation processes are used allowing the manufacture of large numbers of photovoltaic cells per substrate wafer (e.g., greater than 100). Photovoltaic cells incorporate electron and hole selective contacts such that epitaxial heterojunctions are avoided during manufacture.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: June 14, 2022
    Assignee: California Institute of Technology
    Inventors: Phillip R. Jahelka, Harry A. Atwater, Wen-Hui Cheng, Rebecca D. Glaudell
  • Device and method for operating the same
    Patent number: 11355927
    Abstract: A device is disclosed herein. The device includes an electrostatic discharge (ESD) detector, a bias generator, and an ESD driver including at least two transistors coupled to each other in series. The ESD detector is configured to detect an input signal and generate a detection signal in response to an ESD event being detected. The bias generator is configured to generate a bias signal according to the detection signal. The at least two transistors are controlled according to the bias signal and a logic control signal, and the input signal is applied across the at least two transistors.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: June 7, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin Peng, Yu-Ti Su, Chia-Wei Hsu, Ming-Fu Tsai, Shu-Yu Su, Li-Wei Chu, Jam-Wem Lee, Chia-Jung Chang, Hsiang-Hui Cheng
  • Touch-sensing cover and manufacturing method thereof
    Patent number: 11353996
    Abstract: Covers for touch-sensing devices include a shielding layer; and a substrate, in which the substrate covers the shielding layer, and the substrate and the shielding layer are integrated and form a coplanar surface. The coplanar surface is a smooth surface, which has a surface roughness Ra in a range from about 0.05 ?m to about 0.5 ?m.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: June 7, 2022
    Assignee: TPK Universal Solutions Limited
    Inventors: Shun-Jie Yang, Shih-Ching Chen, Chen-Hui Cheng
  • SEMICONDUCTOR DEVICE
    Publication number: 20220173104
    Abstract: A semiconductor device includes first and second fins, first and second hafnium oxide layers, first and second cap layers, and first and second metal gate electrodes. The first and second fins protrude above a substrate and respectively have an n-channel region and a p-channel region. The first and second hafnium oxide layers wrap around the n-channel region and the p-channel region, respectively. The first and second cap layers wrap around the first and second annular hafnium oxide layers, respectively. The first and second cap layers are made of a same material that is lanthanum oxide, yttrium oxide, or strontium oxide. The first and second metal gate electrodes wrap around the first and second cap layers, respectively. The first and second metal gate electrodes have a same metal composition. The first and second gate dielectrics have a same dielectric composition.
    Type: Application
    Filed: February 18, 2022
    Publication date: June 2, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yuan CHANG, Xiong-Fei YU, Hui-Cheng CHANG
  • Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices
    Publication number: 20220157695
    Abstract: Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes coupling through-vias to an insulating material, each of the through-vias having a first width. Dies are also coupled to the insulating material. A portion of the insulating material is removed proximate each of the through-vias. The portion of the insulating material proximate each of the through-vias removed has a second width, the second width being less than the first width.
    Type: Application
    Filed: January 31, 2022
    Publication date: May 19, 2022
    Inventors: Li-Hui Cheng, Po-Hao Tsai, Jing-Cheng Lin
  • NANOFILTRATION COMPOSITE MEMBRANES
    Publication number: 20220152564
    Abstract: Provided is a nanofiltration composite membrane, comprising: a supporting layer comprising a polyethylene terephthalate, a polymeric porous layer formed on the supporting layer, the polymeric porous layer comprising a polysulfone and an amphiphilic polymer represented by the formula below: and an interfacial polymerization layer formed on the polymeric porous layer and the interfacial polymerization layer comprising polyamide which is synthesized by polymerizing piperazine with 1,3,5-benzenetricarbonyl trichloride; wherein, n1, n2, n3, x, and y are integers greater than 0, the molecular weight of the amphiphilic polymer ranges from 90,000 to 200,000, and a weight ratio of the polysulfone to the amphiphilic polymer ranges from 2 to 20. The nanofiltration composite membrane can increase the removal rate of divalent ions and separate substances of specific molecular weights in solutions.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 19, 2022
    Inventors: Shu-Hui CHENG, Kai-Wei CHIOU
  • METHODS AND DEVICES FOR OPERATING AN INTELLIGENT MOBILE ROBOT
    Publication number: 20220147050
    Abstract: A method for operating a mobile robot is described. The method includes determining that an object is in a first path of the mobile robot, searching a database for the object in or adjacent to the first path of the mobile robot, selecting an identified object in the database corresponding to the object, determining whether the identified object is valued, responsive to selecting the identified object in the database, and storing information associated with the object in the database, responsive to determining that the identified object is valued. Related systems, devices and computer program products are also described.
    Type: Application
    Filed: November 10, 2020
    Publication date: May 12, 2022
    Inventor: Hui CHENG
  • METHOD OF FABRICATING PACKAGE STRUCTURE
    Publication number: 20220148940
    Abstract: A structure includes a circuit substrate, a device, a metal layer, a lid and a thermal interface material layer. The device is disposed on and electrically connected to the circuit substrate. The device includes at least one semiconductor die laterally encapsulated by an insulating encapsulation. The metal layer is covering a back surface of the at least one semiconductor die and the insulating encapsulation. The lid is disposed on the circuit substrate, and the lid is adhered to the metal layer through the thermal interface material layer.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 12, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
  • ADHESIVE AND THERMAL INTERFACE MATERIAL ON A PLURALITY OF DIES COVERED BY A LID
    Publication number: 20220139802
    Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 5, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Chih-Chien Pan
  • INTELLIGENT VACUUM DEVICE WITH EXTENDABLE AND DEFORMABLE SUCTION ARM
    Publication number: 20220125265
    Abstract: An intelligent vacuum device is provided. A main body of the vacuum device has a dust bin and a main vacuum port formed on a bottom side thereof and communicated with the dust bin. An extendable suction arm is switchable relative to the main body between a first position and at least one second position. The extendable suction arm has at least one actuator and at least one arm vacuum port thereon, and the arm vacuum port is communicated with the dust bin. At least one detection sensor is disposed on the main body to detect a surrounding environment of the vacuum device and generate corresponding sensing signals. A controller is used to control movement of the vacuum device based on the sensing signals, and control the at least one actuator to switch the extendable suction arm between the first position and the at least one second position.
    Type: Application
    Filed: October 26, 2020
    Publication date: April 28, 2022
    Inventors: Yudong LUO, Hui CHENG, Liang ZHANG
  • System and method for fast object detection in robot picking
    Patent number: 11312020
    Abstract: A method and system for monitoring an e-commerce platform. The system includes a computing device and a visual sensor. The computing device includes a processor and a storage device storing computer executable code. The computer executable code, when executed at the processor, is configured to: extract image keypoints from an image of the object captured by the visual sensor; retrieve a template of the object, where the template includes template keypoints of at least one template side surface of the object; pick two template keypoints from the template side surface and determine two image keypoints respectively matching the two picked template keypoints; build a bounding box of the object based on the two determined image keypoints; and refine the bounding box.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: April 26, 2022
    Assignees: BEIJING JINGDONG SHANGKE INFORMATION TECHNOLOGY CO, JD.COM AMERICAN TECHNOLOGIES CORPORATION
    Inventors: Xiang Li, Peng Chang, Hui Cheng, Zhengmao Liu
  • Semiconductor Devices and Methods of Manufacture
    Publication number: 20220122922
    Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.
    Type: Application
    Filed: January 15, 2021
    Publication date: April 21, 2022
    Inventors: Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20220122896
    Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.
    Type: Application
    Filed: October 21, 2020
    Publication date: April 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Tsung-Fu Tsai