Patents by Inventor Hui Cheng

Hui Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230082058
    Abstract: A separation device with two-stage gas-liquid mixture and conical spiral fields is provided. A first-stage uniform mixer performs first-stage gas-liquid crushing and uniform mixing process by an outer micropore ceramic pipe, a middle micropore ceramic pipe and an inner micropore ceramic pipe and crushes large bubbles in the gas-liquid two-phase flow into small bubbles. A second-stage uniform mixer performs second-stage gas-liquid crushing and uniform mixing process. A whirlpool-making gas collector adjusts the gas-liquid uniform mixing flow obtained after two-stage gas-liquid uniform mixing into hollow-core type high-speed two-phase spiral flow. A conical degasser performs gas-liquid efficient separation operation in a high-speed conical spiral field.
    Type: Application
    Filed: December 4, 2021
    Publication date: March 16, 2023
    Applicant: China University of Petroleum (East China)
    Inventors: Chunhua Liu, Ji Chen, Zhongxian Hao, Xinfu Liu, Feng Liu, Yongjun Shi, Wenhao Sha, Hui Cheng, Junling Tao
  • Patent number: 11605579
    Abstract: A semiconductor device includes a substrate, an electrical conductor and a passivation layer. The substrate includes a first surface. The electric conductor is over the first surface of the substrate. The passivation layer is over the first surface of the substrate. The passivation layer includes a first part and a second part. In some embodiments, the first part is in contact with an edge of the electrical conductor, the second part is connected to the first part and apart from the edge of the electrical conductor, and the first part of the passivation layer has curved surface.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jing-Cheng Lin, Li-Hui Cheng, Po-Hao Tsai
  • Publication number: 20230075735
    Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Tsung-Fu Tsai
  • Publication number: 20230068951
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming at least one epitaxial layer over a substrate; forming a mask over the epitaxial layer; patterning the epitaxial layer into a semiconductor fin; depositing a semiconductor capping layer over the semiconductor fin and the mask, wherein the semiconductor capping layer has a first portion that is amorphous on a sidewall of the mask; performing a thermal treatment such that the first portion of the semiconductor capping layer is converted from amorphous into crystalline; forming an isolation structure around the semiconductor fin; and forming a gate structure over the semiconductor fin.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Kai HSIAO, Tsai-Yu HUANG, Hui-Cheng CHANG, Yee-Chia YEO
  • Publication number: 20230065884
    Abstract: A package structure includes a first semiconductor die, a first insulating encapsulation, a thermal coupling structure, and a heat dissipating component thermally coupled to the first semiconductor die through the thermal coupling structure. The first semiconductor die includes an active side, a rear side, and a sidewall connected to the active side and the rear side. The first insulating encapsulation extends along the sidewall of the first semiconductor die and includes a first side substantially leveled with the active side, a second side opposite to the first side, and topographic features at the second side. The thermal coupling structure includes a metallic layer overlying and the rear side of the first semiconductor die and the topographic features of the first insulating encapsulation. A manufacturing method of a package structure is also provided.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20230055714
    Abstract: A charging port protection apparatus and a terminal related to the field of terminal technologies are provided, including a first detection circuit, a first discharge circuit, a second detection voltage, and a switch circuit. The first detection circuit generates a first detection voltage based on a peak voltage of an input voltage. The first discharge circuit discharges the peak voltage based on the first detection voltage. The second detection circuit generates a second detection voltage when the input voltage is greater than a first threshold. The switch circuit disconnects the input voltage based on the second detection voltage. This implements not only protection against an ESD and EOS peak voltage, but also protection against a high-voltage direct current. The protection against the peak voltage and the protection against the high-voltage direct current are not mutually limited, which implements protection against impact of electrical over-stress in various forms.
    Type: Application
    Filed: January 20, 2021
    Publication date: February 23, 2023
    Inventors: Xiaoyun LI, Hui CHENG, Zhi XIAO
  • Publication number: 20230048302
    Abstract: A package structure includes first/second/third package components, a thermal interface material (TIM) structure overlying the first package component opposite to the second package component, and a heat dissipating component disposed on the third package component and thermally coupled to the first package component through the TIM structure. The first package component includes semiconductor dies and an insulating encapsulation encapsulating the semiconductor dies, the second package component is interposed between the first and third package components, and the semiconductor dies are electrically coupled to the third package component via the second package component. The TIM structure includes a dielectric dam and thermally conductive members including a conductive material, disposed within areas confined by the dielectric dam, and overlying the semiconductor dies. A manufacturing method of a package structure is also provided.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Hsieh, Li-Hui Cheng, Pu Wang, Szu-Wei Lu
  • Publication number: 20230052821
    Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.
    Type: Application
    Filed: November 4, 2022
    Publication date: February 16, 2023
    Inventors: Chih-Chien Pan, Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu
  • Patent number: 11565419
    Abstract: A method and device for controlling a robot, and a robot. The device detects whether there is an article being put into or taken out from a storage container of a robot, and if it is detected that an article is put into or taken out from the storage container, an information list is updated according to the article being put into or taken out, the information list recording relevant information about articles in the storage container.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: January 31, 2023
    Assignees: BEIJING JINGDONG SHANGKE INFORMATION TECHNOLOGY CO., LTD., BEIJING JINGDONG CENTURY TRADING CO., LTD.
    Inventor: Hui Cheng
  • Publication number: 20230026141
    Abstract: A semiconductor package includes a redistribution structure, a plurality of semiconductor devices, and a plurality of heat dissipation films. The plurality of semiconductor devices mounted on the redistribution structure. The plurality of heat dissipation films are respectively disposed on and jointly covering upper surfaces of the plurality of semiconductor devices. A plurality of trenches are respectively extended between each two of the plurality of heat dissipations and extended between each two of the plurality of semiconductor devices.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Publication number: 20230027269
    Abstract: A device is provided. The device includes a first Pancharatnam-Berry phase (“PBP”) lens, and a second PBP lens stacked with the first PBP lens. Each of the first PBP lens and the second PBP lens includes a liquid crystal (“LC”) layer. Each side of the LC layer is provided with a continuous electrode and a plurality of patterned electrodes. The patterned electrodes in the first PBP lens are arranged non-parallel to the patterned electrodes in the second PBP lens.
    Type: Application
    Filed: May 16, 2022
    Publication date: January 26, 2023
    Inventors: Lu LU, Xiayu FENG, Hsien-Hui CHENG
  • Publication number: 20230021005
    Abstract: A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) structure, and a lid structure. The package structure is disposed on the substrate. The TIM structure is disposed on the package structure. The TIM structure includes a metallic TIM layer and a non-metallic TIM layer in contact with the metallic TIM layer, and the non-metallic TIM layer surrounds the metallic TIM layer. The lid structure is disposed on the substrate and the TIM structure.
    Type: Application
    Filed: May 6, 2022
    Publication date: January 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chih Chiou, Ping-Yin Hsieh, Ying-Ching Shih, Pu Wang, Li-Hui Cheng, Yi-Huan Liao, Chih-Hao Chen
  • Publication number: 20230014913
    Abstract: In an embodiment, a device includes: a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component, the integrated circuit die exposed at a back-side of the package component; a heat dissipation layer on the back-side of the package component and on sidewalls of the package component; an adhesive layer on a back-side of the heat dissipation layer, a portion of a sidewall of the heat dissipation layer being free from the adhesive layer; and a package substrate connected to the conductive connectors.
    Type: Application
    Filed: March 4, 2022
    Publication date: January 19, 2023
    Applicants: Taiwan Semiconductor Manufacturing Co., Ltd., Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Publication number: 20230011493
    Abstract: A package assembly includes an interposer module on a package substrate, a thermal interface material (TIM) film on the interposer module, and a package lid that includes a plate portion on the TIM film and a step region projecting away from the plate portion and located over the TIM film and over an edge region of the interposer module.
    Type: Application
    Filed: March 29, 2022
    Publication date: January 12, 2023
    Inventors: Ping-Yin HSIEH, Yu-Hsun WANG, Li-Hui CHENG, Szu-Wei LU
  • Publication number: 20220406676
    Abstract: A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) layer, and a lid structure. The package structure is disposed on the substrate. The TIM layer is disposed on the package structure. The TIM layer includes a liquid state metal material. The lid structure is disposed on the substrate and the TIM layer. The lid structure includes a trench facing the package structure. At least a portion of the TIM layer is located in the trench.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Hsieh, Pu Wang, Tsung-Fu Tsai, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11527418
    Abstract: An integrated circuit package and a method of forming the same are provided. A method includes forming a conductive column over a carrier. An integrated circuit die is attached to the carrier, the integrated circuit die being disposed adjacent the conductive column. An encapsulant is formed around the conductive column and the integrated circuit die. The carrier is removed to expose a first surface of the conductive column and a second surface of the encapsulant. A polymer material is formed over the first surface and the second surface. The polymer material is cured to form an annular-shaped structure. An inner edge of the annular-shaped structure overlaps the first surface in a plan view. An outer edge of the annular-shaped structure overlaps the second surface in the plan view.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: December 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jing-Cheng Lin, Li-Hui Cheng, Po-Hao Tsai
  • Publication number: 20220392823
    Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
    Type: Application
    Filed: July 14, 2021
    Publication date: December 8, 2022
    Inventors: Chih-Hao Chen, Hung-Yu Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11521905
    Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: December 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Tsung-Fu Tsai
  • Publication number: 20220382080
    Abstract: A polarization modulator includes a first liquid crystal cell and a second liquid crystal cell. The first liquid crystal cell has a first type of liquid crystals configured to rotate an optical axis of light parallel to a first plane of the first liquid crystal cell. The second liquid crystal cell is configured to receive the light from the first liquid crystal cell. The second liquid crystal cell has a second type of liquid crystals configured to rotate the optical axis of the light perpendicular to a second plane of the second liquid crystal cell.
    Type: Application
    Filed: May 26, 2021
    Publication date: December 1, 2022
    Inventors: Hsien-Hui Cheng, Yang Zhao, Hannah Noble, Fenglin Peng, Lu Lu
  • Publication number: 20220384355
    Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu