Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: A photonic assembly includes: an electronic integrated circuits (EIC) die including a semiconductor substrate, semiconductor devices located on a horizontal surface of the semiconductor substrate, first dielectric material layers embedding first metal interconnect structures, a dielectric pillar structure vertically extending through each layer selected from the first dielectric material layers, a first bonding-level dielectric layer embedding first metal bonding pads, wherein a first subset of the first metal bonding pads has an areal overlap with the dielectric pillar structure in a plan view; and a photonic integrated circuits (PIC) die including waveguides, photonic devices, second dielectric material layers embedding second metal interconnect structures, a second bonding-level dielectric layer embedding second metal bonding pads, wherein the second metal bonding pads are bonded to the first metal bonding pads.

Abstract: A method and an apparatus for receiving control information of downlink data and a method and an apparatus for sending control information of downlink data are provided, to flexibly and accurately send and receive control information of downlink data, so as to improve transmission efficiency of the downlink data. A first device receives a synchronization signal from a second device, where at least one parameter of control information of downlink data is related to the synchronization signal. Then, the first device may receive the control information of the downlink data from the second device based on the at least one parameter of the control information of the downlink data. Further, the first device receives the downlink data from the second device based on the control information of the downlink data.

Abstract: A light-emitting diode chip includes a substrate. The substrate has a side surface configured as a serrated surface, which includes a plurality of laser inscribed features disposed along a thickness direction of the substrate and spaced apart from each other. A method for manufacturing the light-emitting diode chip is also disclosed herein.

Abstract: A method is provided for measuring and quantifying optical distortion of a transparent object using a single image. Embodiments provided herein include a method including: receiving an image of an object and a transparent object, where the object is visible through the transparent object, where a portion of the image of the object is visible through the transparent object is an inside region of interest (iROI), where a portion of the image of the object not viewed through the transparent object is an outside region of interest (oROI); determining measured pixel locations for a plurality of identified pixels in the image, the plurality of identified pixels corresponding to the distinct points in the image; calculating virtual locations in the image representing the distinct points within the iROI; determining, for respective distinct points within the iROI, differences between the virtual location and the measured pixel location.

Abstract: An optical biomedical measurement device is provided. The optical biomedical measurement device includes a substrate, a light source disposed on the substrate, a photodiode sensor disposed on the substrate, laterally spaced from the light source, a plurality of light-blocking walls disposed vertically on the substrate, laterally located on both sides of the light source and on both sides of the photodiode sensor, a sealing layer covering the light source, the photodiode sensor, and the light-blocking walls, a cover plate bonded to the sealing layer, a plurality of light-absorption films vertically aligned with the light-blocking walls, disposed in a plurality of etching regions on a top surface of the cover plate, an optical filter film disposed on the cover plate and the light-absorption films, a plurality of nano-metal particles arranged on the optical filter film with a distance therebetween, and an antibacterial optical film covering the nano-metal particles and the optical filter film.

Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region; a first MTJ on the MTJ region; a first metal interconnection on the logic region; and a cap layer extending from a sidewall of the first MTJ to a sidewall of the first metal interconnection. Preferably, the cap layer on the MTJ region and the cap layer on the logic region comprise different thicknesses.

Abstract: A magnetic memory device includes a bottom electrode layer, a magnetic tunneling junction (MTJ) stack disposed on the bottom electrode layer, a dielectric cap layer disposed on the MTJ stack, and a metal cap layer disposed on the dielectric cap layer, wherein the metal cap layer comprises a plurality of first metal layers and second metal layers alternately stacked on the dielectric cap layer.

Abstract: A light source is used to project a structured light pattern onto a transparent piece under test. A first image sensing unit is used to obtain first image information of the structured light pattern on the transparent piece under test. A second image sensing unit is used to obtain second image information of the structured light pattern on the transparent piece under test. A processing unit includes a memory unit and a computing unit. The memory unit is used to store a correction parameter set, and the computing unit is used to receive the first image information and the second image information and obtain three-dimensional information of a surface of the transparent piece under test through the correction parameter set.

Abstract: A computer system and a server are provided, to improve heat dissipation of the computer system and improve deployment space utilization of processors. The computer system includes a heat dissipation layer, a computing layer, and a high-speed layer. The computing layer includes a processor configured to generate an electrical signal. The heat dissipation layer includes a heat dissipation structure, the heat dissipation structure is coupled to the processor, and the heat dissipation structure is configured to dissipate heat for the processor. The high-speed layer includes a cable module configured to transmit the electrical signal, and the cable module is coupled to the processor.

Abstract: Methods for determining suitability of Czochralski growth conditions to produce silicon substrates for epitaxy. The methods involve evaluating substrates sliced from ingots grown under different growth conditions (e.g., impurity profiles) by imaging the wafer by infrared depolarization. An infrared depolarization parameter is generated for each epitaxial wafer. The parameters may be compared to determine which growth conditions are well-suited to produce substrates for epitaxial and/or post-epi heat treatments.

Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.

Abstract: A bridge device includes a first controller and a second controller. The first controller includes a first transmission interface. The second controller includes a second transmission interface. The first transmission interface and the second transmission interface are flash memory interfaces. In a program mode, the first transmission interface receives a first command from the second transmission interface and obtains first transfer data from a bus in response to the first command. A value of the first command is optionally set to a first value or a second value. The first value indicates a memory command transfer operation in a first direction and the second value indicates a memory data transfer operation in the first direction. The first transmission interface processes the first transfer data according to the value of the first command to obtain a memory command or written data.

Abstract: An electronic device is provided and includes a substrate, a first bump, a second bump, and an electronic element. The substrate includes a first through hole and a second through hole disposed adjacent to the first through hole along a direction. The first bump and the second bump are overlapped with the substrate, wherein the first bump is adjacent to the second bump along the direction. The electronic element is overlapped with the substrate and electrically connected to the first bump, wherein the substrate is disposed between the first bump and the electronic element. A distance between the first through hole and the second through hole of the substrate along the direction is different from a distance between the first bump and the second bump along the direction.

Abstract: A light-emitting device includes a semiconductor epitaxial structure including a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked in such order in a stacking direction, and including a plurality of through holes. The through holes extend downwardly in a direction from the second semiconductor layer to the first semiconductor layer. The through holes expose a portion of a surface of the first semiconductor layer. The light-emitting device has an ampacity. Each of the through holes has a first radius. A ratio of the first radius to the ampacity ranges from 0.1 to 0.4. A light-emitting apparatus including the light-emitting device is also provided.

Abstract: A semiconductor structure includes a metal gate structure and an isolation structure adjacent to the metal gate structure. The isolation structure includes a first dielectric layer, a second dielectric layer over the first dielectric layer and a third dielectric layer over the second dielectric layer. The first dielectric layer includes carbon of a first concentration, the second dielectric layer includes carbon of a second concentration, and the third dielectric layer includes carbon of a third concentration. The third concentration is greater than the second concentration, and the second concentration is greater than the first concentration.

Abstract: A pixel sensor array may include a plurality of pixel sensors configured to generate color information associated with incident light, and a time of flight (ToF) sensor circuit configured to generate distance information associated with the incident light. The color information and the distance information may be used to generate a three-dimensional (3D) ToF color image. The ToF sensor circuit may be included under a DTI structure surrounding the plurality of pixel sensors in a top view of the pixel sensor array.

Abstract: A semiconductor package includes a photonic integrated circuit (PIC) die having a photonic layer, and an electronic integrated circuit (EIC) die bonded to the PIC die. The EIC die includes an optical region that allows the transmission of optical signals through the optical region towards the photonic layer, and a peripheral region outside of the optical region. The optical region includes optical concave/convex structures, a protection film and optically transparent material layers. The optical concave/convex structures are formed in the semiconductor structure. The protection film is conformally disposed over the optical concave/convex structures. The optically transparent material layers are disposed over the protection film and filling up the optical region. The peripheral region includes first bonding pads bonded to the photonic integrated circuit die, and via structures connected to the first bonding pads, wherein the protection film is laterally surrounding sidewalls of the via structures.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.