Abstract: The present disclosure provides a positioning method, including: obtaining a current local topology map established based on objects in an environment currently observed by a robot, obtaining a full topology map pre-established based on objects in a full environment in a preset area, the current local topology map and the full topology map including nodes representing the objects; matching a node pair to be associated constructed by two nodes in the current local topology map and two nodes in the full topology map; if a degree of association of the node pair to be associated is greater than a threshold, determining that the node pair to be associated is an associated node pair; and determining a pose of the robot according to one of a plurality of search ranches, with a largest number of associated node pairs.

Abstract: Systems and methods for smart sensors are provided. A smart sensor includes: a computer processor; a microphone; and a memory storing a voice control module. The voice control module may be configured to: resolve a first voice command received by the microphone and determine a first identity of a first registered user of a plurality of registered users based on the first voice command. In embodiments, resolving the first voice command includes determining a first instruction. In additional embodiments, the smart sensor may be configured to carry out the first instruction based on first user data associated with the first user.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: A hybrid random access memory for a system-on-chip (SOC), including a semiconductor substrate with a MRAM region and a ReRAM region, a first dielectric layer on the semiconductor substrate, multiple ReRAM cells in the first dielectric layer on the ReRAM region, a second dielectric layer above the first dielectric layer, and multiple MRAM cells in the second dielectric layer on the MRAM region.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: A laser processing system includes a laser source, an optical splitting unit, a frequency conversion unit and at least one optical mixer. The optical splitting unit is provided to divide light emitted by the laser source into a first light and a second light, and the first light and the second light have the same wavelength range. The frequency conversion unit is provided to convert the second light into a working light. The working light includes a frequency converted light, and the frequency converted light and the second light have different wavelength ranges. The optical mixer is provided to mix the first light with the frequency converted light.

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Abstract: A fluidized solidified soil based on gold tailings includes the following raw materials in parts by mass: 75 parts to 80 parts of gold tailings, 5.2 parts to 13 parts of a dispersant solution, and 9 parts to 16 parts of a solidifying material. A preparation method includes the following steps: mixing the gold tailings with the dispersant solution, and then stirring to obtain a suspension slurry of the gold tailings; and adding the solidifying material, and stirring to obtain the fluidized solidified soil. In the present disclosure, the gold tailings are used as a main material, combined with a special dispersant solution and a special solidifying material, and a fluidized solidified soil is prepared with fluidity suitable for pumping and a certain strength after hardening. The fluidized solidified soil prevents the pollution caused by gold tailings landfilling, and can be used as a filling material for various construction projects.

Abstract: Provided is an application of trehalase in fermentative production. The trehalase has amino acid sequences shown in SEQ ID NO.6, SEQ ID NO.7, and SEQ ID NO.8. Provided are methods for producing and applying trehalase, particularly being applied in the production and fermentation of alcohol and an amino acid.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: The high-density MRAM device of the present invention has a second interlayer dielectric (ILD) layer covering the capping layer in the MRAM cell array area and the logic area. The thickness of the second ILD layer in the MRAM cell array area is greater than that in the logic area. The composition of the second ILD layer in the logic area is different from the composition of the second ILD layer in the MRAM cell array area.

Abstract: A light emitting diode includes a semiconductor structure, a first electrode, and a second electrode. The semiconductor structure has a first surface and a second surface. The semiconductor structure includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer that includes a P-type contact layer, and a P-type base layer located between the P-type contact layer and the active layer. The active layer is located between the N-type semiconductor layer and the P-type semiconductor layer. The first electrode is located on the second surface of the semiconductor structure, and is electrically connected to the N-type semiconductor layer. The second electrode is located on the second surface of the semiconductor structure, and is electrically connected to the P-type semiconductor layer. A P-type dopant concentration in the P-type contact layer gradually decreases along a direction from the first surface towards the second surface.

Abstract: An evaluation method of locations, an analysis method of driving behavior, and a driver management system are provided. In the method, sensing data is obtained. A parking state is determined according to the sensing data. A parking location category corresponding to the sensing data under the parking state is obtained. A location suggestion model is trained according to the parking location category and the sensing data. The location suggestion model is used for suggesting a parking location. The location suggestion model is trained through a machine learning algorithm. An energy-saving score of the sensing data is determined according to one or more energy-saving factors. The driving behavior report is generated according to the energy-saving scores. The energy-saving factor is a factor that affects energy consumption of the vehicle. The driving behavior report describes whether the energy-saving score is good or bad. Accordingly, the training and work efficiency could be improved.

Abstract: A magnetic memory device includes a bottom electrode layer, a magnetic tunneling junction (MTJ) stack disposed on the bottom electrode layer, a capping layer disposed on the MTJ stack, and a top electrode layer disposed on the capping layer. The top electrode layer comprises RuO2.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.

Abstract: A circuit with a pseudo class-AB structure is shown. The circuit has an output stage, a first capacitor, and a first impedance component. The output stage has a first PMOS (p-type Metal-Oxide-Semiconductor Field-Effect Transistor) and a first NMOS (n-type MOSFET). The first connection node between the drain terminal of the first PMOS and the drain terminal of the first NMOS is coupled to the first output terminal of the circuit. The first capacitor is coupled between the gate terminal of the first PMOS and the gate terminal of the first NMOS. The first impedance component is coupled in parallel with the first capacitor between the gate terminal of the first PMOS and the gate terminal of the first NMOS.

Abstract: A flip-chip light emitting diode (LED) includes: a sapphire substrate having an edge; an epitaxial layer over the substrate, wherein the epitaxial layer comprises: a first semiconductor layer, a second semiconductor layer, and a light emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the epitaxial layer is divided into an epitaxial bulk layer and a barrier structure; and an insulating layer over the epitaxial bulk layer, wherein a portion of the insulating layer that covers a sidewall of the epitaxial bulk layer is separated from the edge of the substrate by the barrier structure.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, in which the MTJ stack includes a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer. Next, a top electrode is formed on the MTJ stack, the top electrode, the free layer, and the barrier layer are removed, a first cap layer is formed on the top electrode, the free layer, and the barrier layer, and the first cap layer and the pinned layer are removed to form a MTJ and a spacer adjacent to the MTJ.