Patents by Inventor Huixiong Dai
Huixiong Dai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240085810Abstract: A method and apparatus for performing post-exposure bake operations is described herein. After exposure of photoresist on a substrate, the substrate is heated during a baking process to facilitate protection of the resist. The baking process is performed in a vacuum environment at sub-atmospheric pressures. After baking at reduced pressure, the substrate is cooled. The cooling process is performed at sub-atmospheric pressures. Further development of the resist is performed at ambient pressures.Type: ApplicationFiled: September 7, 2023Publication date: March 14, 2024Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Chih-An HSU, Srinivas D. NEMANI, Dmitry LUBOMIRSKY, Ellie Y. YIEH
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Patent number: 11914299Abstract: A method for enhancing the depth of focus process window during a lithography process includes applying a photoresist layer comprising a photoacid generator on a material layer disposed on a substrate, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and dynamically changing a frequency of the electric field as generated while providing the thermal energy to the photoresist layer.Type: GrantFiled: August 29, 2022Date of Patent: February 27, 2024Assignee: Applied Materials, Inc.Inventors: Huixiong Dai, Mangesh Ashok Bangar, Srinivas D. Nemani, Christopher S. Ngai, Ellie Y. Yieh
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Patent number: 11908691Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.Type: GrantFiled: September 23, 2022Date of Patent: February 20, 2024Assignee: Applied Materials, Inc.Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
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Patent number: 11880137Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.Type: GrantFiled: March 23, 2023Date of Patent: January 23, 2024Assignee: Applied Materials, Inc.Inventors: Huixiong Dai, Mangesh Ashok Bangar, Srinivas D. Nemani, Ellie Y. Yieh, Steven Hiloong Welch, Christopher S. Ngai
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Publication number: 20230389441Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.Type: ApplicationFiled: August 8, 2023Publication date: November 30, 2023Applicant: Applied Materials, Inc.Inventors: Minrui YU, Wenhui WANG, Jaesoo AHN, Jong Mun KIM, Sahil PATEL, Lin XUE, Chando PARK, Mahendra PAKALA, Chentsau Chris YING, Huixiong DAI, Christopher S. NGAI
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Patent number: 11723283Abstract: Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.Type: GrantFiled: May 11, 2020Date of Patent: August 8, 2023Assignee: Applied Materials, Inc.Inventors: Minrui Yu, Wenhui Wang, Jaesoo Ahn, Jong Mun Kim, Sahil Patel, Lin Xue, Chando Park, Mahendra Pakala, Chentsau Chris Ying, Huixiong Dai, Christopher S. Ngai
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Publication number: 20230229089Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.Type: ApplicationFiled: March 23, 2023Publication date: July 20, 2023Applicant: Applied Materials, Inc.Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Srinivas D. NEMANI, Ellie Y. YIEH, Steven Hiloong WELCH, Christopher S. NGAI
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Patent number: 11650506Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.Type: GrantFiled: October 11, 2019Date of Patent: May 16, 2023Assignee: Applied Materials Inc.Inventors: Huixiong Dai, Mangesh Bangar, Christopher S. Ngai, Srinivas D. Nemani, Ellie Y. Yieh, Steven Hiloong Welch
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Patent number: 11609505Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for verification and re-use of process fluids. The apparatus generally includes a tool for performing lithography, and a recirculation path coupled to the tool. The recirculation path generally includes a collection unit coupled at first end to a first end of the tool, and a probe coupled at a first end to a second end of the collection unit, the probe for determining one or more characteristics of a fluid flowing from the tool. The recirculation path of the apparatus further generally includes a purification unit coupled at a first end to a third end of the collection unit, the purification unit further coupled at a second end to a second end of the probe, the purification unit for changing a characteristic of the fluid.Type: GrantFiled: April 5, 2021Date of Patent: March 21, 2023Assignee: Applied Materials, Inc.Inventors: Mangesh Ashok Bangar, Gautam Pisharody, Lancelot Huang, Alan L. Tso, Douglas A. Buchberger, Jr., Huixiong Dai, Dmitry Lubomirsky, Srinivas D. Nemani, Christopher Siu Wing Ngai
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Publication number: 20230020164Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.Type: ApplicationFiled: September 23, 2022Publication date: January 19, 2023Applicant: Varian Semiconductor Equipment Associates, Inc.Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
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Publication number: 20220413387Abstract: A method for enhancing the depth of focus process window during a lithography process includes applying a photoresist layer comprising a photoacid generator on a material layer disposed on a substrate, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and dynamically changing a frequency of the electric field as generated while providing the thermal energy to the photoresist layer.Type: ApplicationFiled: August 29, 2022Publication date: December 29, 2022Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Srinivas D. NEMANI, Christopher S. NGAI, Ellie Y. YIEH
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Publication number: 20220390847Abstract: A method for processing a substrate is described. The method includes forming a metal containing resist layer onto a substrate, patterning the metal containing resist layer, and performing a post exposure bake on the metal containing resist layer. The post exposure bake on the metal containing resist layer is a field guided post exposure bake operation and includes the use of an electric field to guide the ions or charged species within the metal containing resist layer. The field guided post exposure bake operation may be paired with a post development field guided bake operation.Type: ApplicationFiled: June 8, 2021Publication date: December 8, 2022Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Srinivas D. NEMANI, Steven Hiloong WELCH, Ellie Y. YIEH, Dmitry LUBOMIRSKY
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Publication number: 20220367285Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.Type: ApplicationFiled: July 28, 2022Publication date: November 17, 2022Applicant: Applied Materials, Inc.Inventors: Wenhui Wang, Huixiong Dai, Christopher S. Ngai
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Patent number: 11488823Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.Type: GrantFiled: February 8, 2021Date of Patent: November 1, 2022Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
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Publication number: 20220326618Abstract: A post lithography resist treatment apparatus for treating a substrate having a resist layer thereon with a fluid layer thereover includes at least one post exposure bake chamber comprising a substrate support having a substrate support surface thereon, and an electrode, the electrode comprising an electrode body having a substrate support facing side, the substrate support facing side having at least one recess extending inwardly thereof, and at least one projection adjacent to the recess having a substrate support facing surface thereon, wherein the substrate support is moveable to position a substrate, when supported thereon, such that an fluid layer disposed on the substrate contacts the substrate support facing surface of the projection but does not fill the recess with fluid, and the substrate facing surface of the electrode body is spaced from the substrate.Type: ApplicationFiled: April 11, 2022Publication date: October 13, 2022Inventors: Dmitry LUBOMIRSKY, Huixiong DAI, Ellie Y. YIEH
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Publication number: 20220317579Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for verification and re-use of process fluids. The apparatus generally includes a tool for performing lithography, and a recirculation path coupled to the tool. The recirculation path generally includes a collection unit coupled at first end to a first end of the tool, and a probe coupled at a first end to a second end of the collection unit, the probe for determining one or more characteristics of a fluid flowing from the tool. The recirculation path of the apparatus further generally includes a purification unit coupled at a first end to a third end of the collection unit, the purification unit further coupled at a second end to a second end of the probe, the purification unit for changing a characteristic of the fluid.Type: ApplicationFiled: April 5, 2021Publication date: October 6, 2022Inventors: Mangesh Ashok BANGAR, Gautam PISHARODY, Lancelot HUANG, Alan L. TSO, Douglas A. BUCHBERGER, JR., Huixiong DAI, Dmitry LUBOMIRSKY, Srinivas D. NEMANI, Christopher Siu Wing Ngai
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Patent number: 11437284Abstract: Methods of forming and processing semiconductor devices which utilize a three-color hardmask process are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications. More particularly, certain embodiments relate to the formation of self-aligned gate contacts through the selective deposition of a fill material.Type: GrantFiled: August 26, 2019Date of Patent: September 6, 2022Assignee: Applied Materials, Inc.Inventors: Wenhui Wang, Huixiong Dai, Christopher S. Ngai
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Patent number: 11429026Abstract: A method for enhancing the depth of focus process window during a lithography process includes applying a photoresist layer comprising a photoacid generator on a material layer disposed on a substrate, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and dynamically changing a frequency of the electric field as generated while providing the thermal energy to the photoresist layer.Type: GrantFiled: March 20, 2020Date of Patent: August 30, 2022Assignee: Applied Materials, Inc.Inventors: Huixiong Dai, Mangesh Ashok Bangar, Srinivas D. Nemani, Christopher S. Ngai, Ellie Y. Yieh
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Patent number: 11313034Abstract: In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.Type: GrantFiled: November 16, 2017Date of Patent: April 26, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Weimin Zeng, Yong Cao, Daniel Lee Diehl, Huixiong Dai, Khoi Phan, Christopher Ngai, Rongjun Wang, Xianmin Tang
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Publication number: 20220091513Abstract: A film structure for an electric field assisted bake process and methods of forming and implementing such a film structure are described herein. An example is a method for semiconductor processing. A photoresist is deposited on an underlayer disposed on a substrate. The underlayer includes carbon. The photoresist is exposed to a pattern of electromagnetic radiation. After exposing the photoresist, an electric field assisted bake is performed on the photoresist.Type: ApplicationFiled: September 18, 2020Publication date: March 24, 2022Inventors: Mangesh Ashok BANGAR, Huixiong DAI, Pinkesh Rohit SHAH, Srinivas D. NEMANI, Christopher S. NGAI, Ellie Y. YIEH