Abstract: The present disclosure provides one embodiment of a lithography system for integrated circuit making. The system includes a substrate stage designed to secure a substrate and being operable to move the substrate; an alignment module that includes a tunable light source being operable to generate an infrared light with a wavelength tunable; and a detector to receive the light; and an exposing module integrated with the alignment module and designed to performing an exposing process to a resist layer coated on the substrate.

Abstract: A method includes forming a first photo resist layer over a base structure and a target feature over the base structure, performing an un-patterned exposure on the first photo resist layer, and developing the first photo resist layer. After the step of developing, a corner portion of the first photo resist layer remains at a corner between a top surface of the base structure and an edge of the target feature. A second photo resist layer is formed over the target feature, the base structure, and the corner portion of the first photo resist layer. The second photo resist layer is exposed using a patterned lithography mask. The second photo resist layer is patterned to form a patterned photo resist.

Abstract: A clip for clamping an electronic device includes a main body and a plurality of claws. Each claw extends outwardly from an edge of the main body, and each claw has a clamping portion formed on the claw for abutting and connecting the electronic device, and clamping portions are arranged on at least two different planes, so that different claws produce appropriate clamping forces at different clamping positions respectively.

Abstract: A method of photolithography including coupling a first aperture to a lithography system, then performing a first illumination process to form a first pattern on a layer of a substrate using the first aperture, thereafter coupling a second aperture to the lithography system, and performing a second illumination process to form a second pattern on the layer of the substrate using the second aperture. The first aperture includes a first pair and a second pair of radiation-transmitting regions. The second aperture includes a second plate having a third pair and a fourth pair of radiation-transmitting regions.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes dispensing a liquid on a wafer. The method includes raising the wafer. The method includes lowering the wafer after the raising. The wafer is spun as it is lowered, thereby removing at least a portion of the liquid from the wafer. The present disclosure also provides an apparatus for fabricating a semiconductor device. The apparatus includes a wafer chuck that is operable to hold a semiconductor wafer and secure the wafer thereto. The wafer has a front surface and a back surface. The apparatus includes a dispenser that is operable to dispense a liquid to the front surface of the wafer. The apparatus includes a mechanical structure that is operable to: spin the wafer chuck in a horizontal direction; and move the wafer chuck downwards in a vertical direction while the wafer chuck is being rotated.

Abstract: A method includes receiving a substrate having a material feature embedded in the substrate, wherein receiving the substrate includes receiving a first leveling data and a first overlay data generated when forming the material feature, deposing a resist film on the substrate, and exposing the resist film using a predicted overlay correction data to form a resist pattern overlying the material feature on the substrate, wherein using the predicted overlay correction data includes generating a second leveling data and calculating the predicted overlay correction data using the first leveling data, the first overlay data, and the second leveling data.

Abstract: A method of lithographic defect detection and repair is disclosed. In an exemplary embodiment, the method of patterning a workpiece comprises receiving a mask for patterning a workpiece. The mask is inspected for defects, and a mask defect is identified that is repairable in the workpiece. The workpiece is lithographically exposed using the mask, and a defect is repaired within the workpiece based on the identified mask defect. The method can further comprise comparing defects across the workpiece to determine repeating defects and determining a spacing between the repeating defects. A distance between a first focal point and a second focal point of a lithographic system can be configured to correspond to the spacing between the repeating defects. Thus, a first repeating defect and a second repeating defect can be repaired concurrently.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.

Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device includes providing a substrate having a first region and a second region, and forming a plurality of mandrel features in the first region with a first spacing. The method further includes forming first spacers along sidewalls of the mandrel features with a targeted width A, and forming second spacers with a first width W1 along sidewalls of the first spacers, wherein two back-to-back adjacent second spacers are separated by a gap. The method further includes depositing a dielectric material in the gap and in the second region, and performing a first cut thereby removing a first subset of the first spacers. Coincident with the removing of the first subset, the method further includes partially removing the dielectric material in the second region thereby forming a mesa of the dielectric material in the second region.

Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.

Abstract: A method for preparing a wafer includes forming a film layer on a substrate of the wafer; coating the film layer with a photoresist layer; exposing a first portion of the photoresist layer to a beam of light; and patterning a second portion of the photoresist layer after performing exposing the first portion of the photoresist layer. A cross-link reaction is caused on the first portion of the photoresist layer and the first portion of the photoresist layer is converted to a reacted first portion of the photoresist layer. The reacted first portion of the photoresist layer is near an edge of the wafer. The second portion of the photoresist layer is different from the reacted first portion of the photoresist layer. The second portion of the photoresist layer is converted to a patterned second portion of the photoresist layer.

Abstract: A semiconductor device includes a semiconductor substrate, a first active region in the semiconductor substrate, and a second active region in the semiconductor substrate. The semiconductor device further includes a first conductive line over the semiconductor substrate electrically connected to the first active region and having a first end face adjacent to the second active region, and the first end face having an image log slope of greater than 15 ?m?1.

Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. A plurality of mandrel features are formed on a substrate. First spacers are formed along sidewalls of the mandrel feature and second spacers are along sidewalls of the first spacers. Two back-to-back adjacent second spacers separate by a gap in a first region and merge together in a second region of the substrate. A dielectric feature is formed in the gap and a dielectric mesa is formed in a third region of the substrate. A first subset of the first spacer is removed in a first cut. Fins and trenches are formed by etching the substrate using the first spacer and the dielectric feature as an etch mask.

Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. A plurality of mandrel features are formed on a substrate. First spacers are formed along sidewalls of the mandrel feature and second spacers are along sidewalls of the first spacers. Two back-to-back adjacent second spacers separate by a gap in a first region and merge together in a second region of the substrate. A dielectric feature is formed in the gap and a dielectric mesa is formed in a third region of the substrate. A first subset of the first spacer is removed in a first cut. Fins and trenches are formed by etching the substrate using the first spacer and the dielectric feature as an etch mask.

Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.

Abstract: A method of lithographic defect detection and repair is disclosed. In an exemplary embodiment, the method of patterning a workpiece comprises receiving a mask for patterning a workpiece. The mask is inspected for defects, and a mask defect is identified that is repairable in the workpiece. The workpiece is lithographically exposed using the mask, and a defect is repaired within the workpiece based on the identified mask defect. The method may further comprise comparing defects across the workpiece to determine repeating defects and determining a spacing between repeating defects. A distance between a first focal point and a second focal point of a lithographic system may be configured to correspond to the spacing between repeating defects. Thus, a first repeating defect and a second repeating defect may be repaired concurrently.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.

Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. The method includes forming a mandrel features over a substrate, the mandrel feature and performing a coarse cut to remove one or more mandrel features to form a coarse space. After the coarse cut, the substrate is etched by using the mandrel features, with the coarse space as an etch mask, to form fins. A spacer layer is deposited to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the coarse space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the coarse space. A fine cut is performed to remove a portion of one or more mandrel features to form an end-to-end space. An isolation trench is formed in the end-to-end space and the coarse space.

Abstract: A method of fabricating a fin-like field-effect transistor device is disclosed. The method includes forming mandrel features over a substrate and performing a first cut to remove mandrel features to form a first space. The method also includes performing a second cut to remove a portion of mandrel features to form a line-end and an end-to-end space. After the first and the second cuts, the substrate is etched using the mandrel features, with the first space and the end-to-end space as an etch mask, to form fins. Depositing a space layer to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the first space and the end-to-end space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the first space and the end-to-end space and an isolation trench is formed in the first space and the end-to-end space.