Abstract: An illumination dummy module is adapted for covering and protecting a card slot and includes a circuit board, a power pin, a clock pin, a data pin, at least one light source, a power converter, and a drive circuit. The circuit board includes an insertion part for inserting into the card slot. The power pin, the clock pin and the data pin are disposed to the insertion part, and the light source is disposed on the circuit board. The power converter receives input power from the card slot via the power pin, and converts the input power into output power. The drive circuit is disposed on the circuit board, and receives the output power from the power converter. The drive circuit also respectively receives a clock signal and a control command via the clock pin and the data pin, to enable or disable the light source.

Abstract: A printed circuit assembly includes a printed wiring board and an expansion connector. The printed wiring board has a top surface, a bottom surface, and a specific area defined at the top surface thereof for placement of an expansion card. In particular, the printed wiring board defines from top to bottom at least one thermal vent in the specific area for heat dissipation. The expansion connector is disposed on the printed wiring board and is located in the specific area for connection with one side edge of the expansion card.

Abstract: A sputtering target structure includes a body having a first side and an opposing second side. A first sputtering target is coupled to the first side of the body. The first sputtering target includes a first material. A second sputtering target is coupled to the second side of the body. The second sputtering target includes a second material. A rotation mechanism is coupled to the body and is configured to allow rotation of the body from a first orientation to a second orientation.

Abstract: A motherboard with backup power providing an output voltage to at least one computer information apparatus and including a first power connection unit and an Uninterruptible Power Supply (UPS) is provided. The first power connection unit is configured to receive DC power. The DC power is provided by a power supply. The UPS provides the output voltage and detects the DC power. When the DC power is stable, the UPS provides the DC power as the output voltage. When the DC power is unstable, the UPS provides battery power as the output voltage.

Abstract: A power control system and a power control method thereof applied to a computer device are provided. The computer device includes a computer system and a power system. The power system includes a plurality of voltage regulators for providing supply voltages to the components of the computer device. The power control system is coupled to the computer system and the power system and includes an overclocking frequency mode. When the computer system receives an OFF signal and enters a non-operating mode, and when the power control system is in the overclocking frequency mode, the power control system sends a SYSTEM-SHUTDOWN signal to the computer system to control the power system to enter the non-operating mode and to control the power system to keep outputting supply voltages.

Abstract: A motherboard with backup power providing an output voltage to at least one computer information apparatus and including a first power connection unit and an Uninterruptible Power Supply (UPS) is provided. The first power connection unit is configured to receive DC power. The DC power is provided by a power supply. The UPS provides the output voltage and detects the DC power. When the DC power is stable, the UPS provides the DC power as the output voltage. When the DC power is unstable, the UPS provides battery power as the output voltage.

Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.

Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.

Abstract: A power control system and a power control method thereof applied to a computer device are provided. The computer device includes a computer system and a power system. The power system includes a plurality of voltage regulators for providing supply voltages to the components of the computer device. The power control system is coupled to the computer system and the power system and includes an overclocking frequency mode. When the computer system receives an OFF signal and enters a non-operating mode, and when the power control system is in the overclocking frequency mode, the power control system sends a SYSTEM-SHUTDOWN signal to the computer system to control the power system to enter the non-operating mode and to control the power system to keep outputting supply voltages.

Abstract: A receiver of an object finder includes an antenna to receive a signal from a transmitter associated with the receiver, a PIN diode having a first terminal coupled with the antenna, and having a resistance that increases as a current flows therethrough decreases, and vice versa, a variable resistor coupled with the first terminal of the PIN diode to control the amount of a current flowing into the PIN diode, and a radio frequency integrated circuit (RF IC) having a first pin electrically coupled with second terminal of the PIN diode to receive the signal from the antenna via the PIN diode.

Abstract: A display device includes a plurality of pixel circuits arranged in a plurality of rows and columns, a plurality of scan lines, a plurality of data lines, a scan driver operable to drive the rows of the pixel circuits in sequence via the scan lines, and a data driver coupled to the columns of the pixel circuits via the data lines. The scan lines include first and second sets of scan lines alternately disposed with each other. For each of the first and second sets of the scan lines, adjacent scan lines have different circuit properties. The scan driver activates each of the scan lines for a respective activation time period according to the circuit property thereof.

Abstract: A receiver of an object finder includes an antenna to receive a signal from a transmitter associated with the receiver, a PIN diode having a first terminal coupled with the antenna, and having a resistance that increases as a current flows therethrough decreases, and vice versa, a variable resistor coupled with the first terminal of the PIN diode to control the amount of a current flowing into the PIN diode, and a radio frequency integrated circuit (RF IC) having a first pin electrically coupled with second terminal of the PIN diode to receive the signal from the antenna via the PIN diode.

Abstract: An electroplating system is provided. The system comprises a reaction tank, a tube, and a video bubble detector. The reaction tank, having a first diameter, contains a plating solution. The tube, connecting to the reaction tank, comprises an inflow tube and a branch, wherein the inflow tube inputs the plating solution into the reaction tank, and the branch has an enlarged part having the first diameter. The video bubble detector, mounted on the enlarged part of the branch, detects the presence of a bubble in the plating solution flowing through the branch.

Abstract: The present invention discloses an antenna diversity switch, used for receiving and transmitting RF signals for dual-mode co-existence wireless communication system. The antenna diversity switch comprises a first transmitting port; a second transmitting port; a receiving port; a first control unit, electrically connected between the first transmitting port and a first antenna; a second control unit, electrically connected between the first transmitting port and a second antenna; a third control unit, electrically connected between the second transmitting port and the first antenna; a forth control unit, electrically connected between the second transmitting port and the second antenna; a fifth control unit, electrically connected between the receiving port and the first antenna; a sixth control unit, electrically connected between the receiving port and the second antenna. The antenna diversity switch according to the present invention meets the requirement of IEEE 802.

Abstract: The present invention discloses a dual-band RF transceiver. The transceiver comprises a first module, used as the RF front-end of the dual-band transceiver and used for receiving and transmitting a first RF signal and a second RF signal; a second module, electrically connected to the first module, used as the IF IQ modulator/demodulator of the dual-band RF transceiver; a third module, electrically connected to the first and the second modules, used as the tripe-band phase-locked frequency synthesizer of the dual-band RF transceiver and used for providing a first local oscillating signal and a second local oscillating signal to the first module, and a third local oscillating signal to the second module. The dual-band RF transceiver according to the present invention realizes the dual-band triple-mode operation of IEEE802.11 a/b/g by a single dual-band RF module, and therefore the circuit size, power dissipation, component count, and cost can be dramatically reduced.

Abstract: The present invention discloses a bandpass amplifier having gain and bandpass performance. The bandpass amplifier includes an input match unit for matching the gain of the amplifier and having a first filter response; a first bias unit electrically connected to the input match unit for driving the first terminal of the amplifier and having a first high pass filter response; a gain stage electrically connected to the first bias unit for providing the flat gain of the amplifier; a second bias unit electrically connected to the gain stage for driving the second terminal of the amplifier and having a second high pass filter response; and an output match unit electrically connected to the second bias unit for matching the gain of the amplifier and having a second filter response.

Abstract: A multi metal base hardfacing alloy is provided. The atom percent of each element in the alloy is smaller than 35%. When the alloy is used as a welding material, it has advantages such as low operating temperature, better physical strength hardiness, acid resistance, basic resistance, anti-oxidation, and interface obturation.

Abstract: An electroplating system is provided. The system comprises a reaction tank, a tube, and a video bubble detector. The reaction tank, having a first diameter, contains a plating solution. The tube, connecting to the reaction tank, comprises an inflow tube and a branch, wherein the inflow tube inputs the plating solution into the reaction tank, and the branch has an enlarged part having the first diameter. The video bubble detector, mounted on the enlarged part of the branch, detects the presence of a bubble in the plating solution flowing through the branch.

Abstract: The present invention discloses a gain amplifier, capable of concurrently operating at three different frequency bands. The gain amplifier comprises an amplification stage for amplifying a signal applied to an input of the amplifier and a triple-band resonance load connected between a DC bias voltage and a DC bias input of the amplification stage. The triple-band resonance load uses a set of reactive elements to provide match in a first frequency band, a second frequency band and in a third frequency band, such as at 2.4 GHz, 5.8 GHz and 9.0 GHz. According to the gain amplifier of the present invention, it can effectively provide triple-band signal amplification and in-band interference suppression for various multi-standard coexist communication systems.

Abstract: The present invention discloses a dual-band RF transceiver. The transceiver comprises a first module, used as the RF front-end of the dual-band transceiver and used for receiving and transmitting a first RF signal and a second RF signal; a second module, electrically connected to the first module, used as the IF IQ modulator/demodulator of the dual-band RF transceiver; a third module, electrically connected to the first and the second modules, used as the tripe-band phase-locked frequency synthesizer of the dual-band RF transceiver and used for providing a first local oscillating signal and a second local oscillating signal to the first module, and a third local oscillating signal to the second module. The dual-band RF transceiver according to the present invention realizes the dual-band triple-mode operation of IEEE802.11 a/b/g by a single dual-band RF module, and therefore the circuit size, power dissipation, component count, and cost can be dramatically reduced.