Patents by Inventor Hung Chou

Hung Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210106960
    Abstract: A gas-liquid mixing control system includes a liquid supply unit, a liquid pressure regulating valve, a gas supply unit, a gas pressure regulating valve, a mixing tank, an output pipe, and a non-electric control flow regulator. The mixing tank communicates with said regulating valves; liquid and gas are mixed in the mixing tank to form mixed fluid. The first end and second end of output pipe communicate with the mixing tank and the machine respectively, making mixed fluid output from mixing tank to machine through the output pipe. The mixed fluid in first end and second end have third flow and fourth flow respectively. Said flow regulator communicates with the output pipe; the mixed fluid passing through said flow regulator has fifth flow. The first flow is not lower than at least one of the fourth and the fifth flow. Additionally, a control method for gas-liquid mixing is disclosed.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 15, 2021
    Applicant: TRUSVAL TECHNOLOGY CO., LTD.
    Inventors: SHIH-PAO CHIEN, Cheng-Hsun Chen, Kuan-Hung Chou, Yi-Sen Su, Jhe-Wei Guo
  • Patent number: 10978814
    Abstract: A high frequency antenna device is applied to an operation frequency band within a range of 20-45 GHz. The high frequency antenna device includes a substrate, an antenna array and a processing chip both respectively disposed on two opposite sides of the substrate, and two connectors mounted on the substrate. The antenna array includes a plurality of antennas arranged in at least one row. Each antenna is a dual-polarized metal sheet configured to be selectively operated in a horizontal polarization and a vertical polarization. The operation frequency band has a central frequency corresponding to a wavelength. Central points of any two adjacent antennas have an interval within a range of 0.25-0.75 times of the wavelength. The processing chip is electrically coupled to the antennas and the two connectors. The two connectors electrically correspond to the horizontal polarization and the vertical polarization of each of the antennas.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 13, 2021
    Assignee: AUDEN TECHNO CORP.
    Inventor: Jui-Hung Chou
  • Patent number: 10968197
    Abstract: Disclosed are of the protected photoinitiators of the formula: wherein Aryl1 is an aromatic or heteroaromatic ring; Aryl2 is an aromatic ring; each R1 is an alkyl, an aryl, an electron donating group or an electron withdrawing group, and subscript a is 0 to 3; each R2 is an alkyl, an aryl, an electron donating group or an electron withdrawing group, and subscript b is 0 to 3; Prot is a protected carbonyl group.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: April 6, 2021
    Assignee: 3M Innovative Properties Company
    Inventors: Kelly A. Volp, Shih-Hung Chou, Paul J. Homnick, Ahmed S. Abuelyaman, Tao Gong, Joel D. Oxman, Wayne S. Mahoney
  • Publication number: 20210098351
    Abstract: A flip-chip package substrate and a method for fabricating the same are provided. An insulation layer is formed on two opposing sides of a middle layer to form a composite core structure and increase the rigidity of the flip-chip package substrate. Therefore, the core structure can be made thinner. The conductive structures can also have a smaller end size, and more conductive points can be disposed within a unit area. Therefore, a circuit structure can be produced that have a fine line pitch and a high wiring density, satisfy the packaging demands of highly integrated circuit/large size substrate, and avoid an electronic package from being warpage.
    Type: Application
    Filed: September 15, 2020
    Publication date: April 1, 2021
    Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu
  • Patent number: 10964781
    Abstract: The present disclosure, in some embodiments, relates to a high voltage resistor device. The device includes a buried well region disposed within a substrate and having a first doping type. A drift region is disposed within the substrate and contacts the buried well region. The drift region has the first doping type. A body region is disposed within the substrate and has a second doping type. The body region laterally contacts the drift region and vertically contacts the buried well region. An isolation structure is over the drift region and a resistor structure is over the isolation structure.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: March 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Cheng Chiu, Wen-Chih Chiang, Chun Lin Tsai, Kuo-Ming Wu, Shiuan-Jeng Lin, Yi-Min Chen, Hung-Chou Lin, Karthick Murukesan
  • Publication number: 20210076686
    Abstract: Pesticidal compositions for improving physical characteristics of pesticide formulations which comprise natural pesticidal oil active ingredients are disclosed. One such composition comprises a pesticidal natural oil active ingredient, a surfactant to disperse the active ingredient in a water emulsion, a polymeric pour point depressant effective to reduce a pour point temperature of the pesticidal natural oil active ingredient and a hydrocarbon solvent. Methods for providing pesticidal compositions and application to control one or more pests are also disclosed.
    Type: Application
    Filed: June 4, 2019
    Publication date: March 18, 2021
    Inventors: Hangsheng LI, Doug Ta Hung CHOU, Steven Chun Hon LIN
  • Patent number: 10948544
    Abstract: A battery safety identifying method is provided. The method includes the following steps. A voltage drop and a voltage drop rate are detected when a battery is abnormal. A duration time of the voltage drop and a voltage recovery ratio are detected when the battery is abnormal. A surface temperature or a temperature rise rate is detected when the battery is abnormal. A plurality of hazard levels of battery abnormality and at least one protection mechanism are set according to the voltage drop, the voltage drop rate, the voltage recovery ratio and the surface temperature or the temperature rise rate.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: March 16, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chein-Chung Sun, Chun-Hung Chou, Deng-Tswen Shieh, Che-Wei Chu
  • Publication number: 20210050693
    Abstract: An apparatus comprising a module, a hook assembly coupled to the module and configured to be rotated from a deployed position to a storage position when the module is fully inserted into a chassis and a spring coupled between the module and the hook assembly, wherein the spring is configured to extend the hook assembly from the storage position to the deployed position when the module is not fully inserted into the chassis.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 18, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Hsiang-Yin Hung, Rui-Shen Lu, Chien Hung Chou
  • Publication number: 20210033828
    Abstract: A projection lens structure mainly includes a first group of lenses with a negative dioptric value, a second group of lenses with a positive dioptric value, a third group of lenses with a positive dioptric value and a fourth group of lenses with a negative dioptric value. The first group of lenses further includes at least a first lens and a second lens, of which the first lens ha a plastic aspheric lens in a meniscus shape with a focal length between ?25˜?80 mm. The second group of lenses further includes at least a third lens. The third group of lenses further includes at least a first doublet with a focal length between 25˜80 mm. The fourth group of length further includes at least a group of doublets, a fourth lens and a fifth lens.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Inventors: Sheng-Che Wu, Yu-Hung Chou, You-Da Chen
  • Publication number: 20210009555
    Abstract: Compounds of formula (I) or salts thereof are disclosed. Also disclosed are pharmaceutical compositions comprising a compound of formula I, processes for preparing compounds of formula I, intermediates useful for preparing compounds of formula I and therapeutic methods for treating a Retroviridae viral infection including an infection caused by the HIV virus.
    Type: Application
    Filed: May 26, 2020
    Publication date: January 14, 2021
    Inventors: Gediminas Brizgys, Eda Canales, Chien-Hung Chou, Michael Graupe, Randall L. Halcomb, Yunfeng Eric Hu, Scott E. Lazerwith, John O. Link, Qi Liu, Yafan Lu, Roland D. Saito, Scott D. Schroeder, John R. Somoza, Winston C. Tse, Jennifer R. Zhang
  • Patent number: 10892360
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: January 12, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Patent number: 10879236
    Abstract: Various embodiments of the present application are directed towards an integrated circuit (IC) in which a bootstrap metal-oxide-semiconductor (MOS) device is integrated with a high voltage metal-oxide-semiconductor (HVMOS) device and a high voltage junction termination (HVJT) device. In some embodiments, a drift well is in the semiconductor substrate. The drift well has a first doping type and has a ring-shaped top layout. A first switching device is on the drift well. A second switching device is on the semiconductor substrate, at an indent in a sidewall the drift well. A peripheral well is in the semiconductor substrate and has a second doping type opposite the first doping type. The peripheral well surrounds the drift well, the first switching device, and the second switching device, and further separates the second switching device from the drift well and the first switching device.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Karthick Murukesan, Wen-Chih Chiang, Chiu-Hua Chung, Chun Lin Tsai, Kuo-Ming Wu, Shiuan-Jeng Lin, Tien Sheng Lin, Yi-Min Chen, Hung-Chou Lin, Yi-Cheng Chiu
  • Publication number: 20200388552
    Abstract: A semiconductor package carrier board, a method for fabricating the same, and an electronic package having the same are provided. The method includes forming on a circuit structure a graphene layer that acts as an insulation heat dissipating layer. Since the heat conductivity of the graphene layer is far greater than the heat conductivity of ink (about 0.4 W/m·k), which is used as solder resist, the heat of the semiconductor package carrier board can be conducted quickly, and thus can avoid the problem that the heat will be accumulated on the semiconductor package carrier board.
    Type: Application
    Filed: June 5, 2020
    Publication date: December 10, 2020
    Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu, Wen-Chang Chen
  • Publication number: 20200388564
    Abstract: A semiconductor package substrate, a method for fabricating the same, and an electronic package having the same are provided. The method includes: providing a circuit structure having a first solder pad and a second solder pad; forming on the circuit structure a metal sheet having a first hole, from which the first solder pad is exposed, and a second hole, from which the second solder pad is exposed; and forming an insulation layer on the metal sheet and a hole wall of the second hole. A first conductive element that is to be grounded is disposed in the first hole and is in contact with the metal sheet and the first solder pad. Therefore, heat generated in a signal transmission process is dissipated by the metal sheet and the first conductive element.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 10, 2020
    Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu
  • Publication number: 20200388462
    Abstract: Systems and methods for tuning and/or calibrating a charged particle beam apparatus are disclosed. According to certain embodiments, a reference specimen comprises a substrate having a plurality of first objects at a first pitch, and a plurality of second objects at a second pitch. Regions containing the first and second objects may overlap. A method of tuning and/or calibrating may comprise analyzing an image of a sample at a plurality of coarseness levels, determining whether a parameter of the image satisfies a criteria based on measured characteristics of the image at the coarseness levels, and adjusting the parameter.
    Type: Application
    Filed: December 4, 2018
    Publication date: December 10, 2020
    Inventors: Van-Duc NGUYEN, Xiong XIAO, Dongdong WU, Chi Michael MAI, Chien-Hung CHOU
  • Patent number: 10863644
    Abstract: A cam mounting mechanism (“CMM”) includes a detachable mounting tray (“tray”) that includes a base and two side walls. Each side wall includes engagement notches that receive a respective engagement member of a sled enclosure of a server chassis. The CMM includes two internal sliding rails (“IRRs”), each being attached to an internal surface of a respective side wall of the tray by a respective fastener that extends through a respective slide slot of the IRR, and each including the respective slide slots and multiple guide slots. Each slide slot enables the IRR to slide longitudinally relative to the side wall. Each guide slot slidably receives a respective engagement member and is shaped to constrain the tray to vertical movement relative to the sled enclosure while constraining the IRR to longitudinal movement. The CMM includes a cam handle that rotates in order to drive both IRRs to move in unison.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: December 8, 2020
    Assignee: Dell Products, L.P.
    Inventors: Chun-Yang Tseng, Chien Hung Chou, Rui-Shen Lu, Hsiang-Yin Hung
  • Patent number: 10861497
    Abstract: A device for recording videos includes an image signal processor to process frames captured in response to a request for recording a video at a first frame rate, and a video encoder to encode captured frames. The device also includes processing circuitry operative to allocate image buffers from memory in response to the request, and execute a camera software to direct the image signal processor to fill each image buffer with a batch of the captured frames. For each filled image buffer, a reference of the image buffer is passed from the camera software to a video software at a second rate, which is a fraction of the first frame rate. The processing circuitry then executes the video software to provide one frame at a time to the video encoder for encoding at the first frame rate.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: December 8, 2020
    Assignee: MediaTek Inc.
    Inventors: Kuan-Hung Chou, Li-Wei Lu
  • Patent number: 10840156
    Abstract: Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same “lot”. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: November 17, 2020
    Assignee: ASML Netherlands B.V.
    Inventors: Chien-Hung Chou, Wen-Tin Tai
  • Publication number: 20200355895
    Abstract: A zoom lens includes a first lens group with a negative refractive power, a second lens group with a positive refractive power, and an aperture stop disposed in and movable with the second lens group. Each of the first lens group and the second lens group moves individually. The zoom lens further includes a doublet lens disposed on a first side of the aperture stop and between the first lens group and the aperture stop, and at most two lenses including at least one aspheric lens are disposed on a second side of the aperture stop.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Hung-You CHENG, Kuo-Chuan WANG, Yu-Hung CHOU
  • Patent number: 10834074
    Abstract: An example operation may include one or more of obtaining a request to validate an application with respect to an OAuth provider, identifying a previously registered digital signature of the application, generating verification information of the application based on the identified digital signature of the application, and passing the generated verification information of the application to the OAuth provider via a user login page.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jiande Jiang, Sheng Hao Wang, Chih-Hung Chou, Kuo-Chun Chen