Patents by Inventor Hung Hu

Hung Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070206850
    Abstract: A color processing system includes a storage memory stored with several pieces of reference data corresponding to display colors and printing colors respectively, a cache, and a CMM (color management module) for converting display colors of an image data into color regions having the printing colors. The CMM includes a data capture module and a color match module. The data capture module is electrically coupled to the storage memory and the cache. The color match module is electrically coupled to the data capture module. The color match module can capture display colors of an image data from an exterior thereof and a piece of reference data corresponding to the display colors from the cache via the data capture module. The captured display colors of the image data are converted by the color match module into color regions having the printing colors.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 6, 2007
    Inventors: Yih-Chin Lin, Che-Hung Hu
  • Publication number: 20070186412
    Abstract: A method for fabricating a circuit board having a conductive structure is disclosed. The method includes: forming first and second insulating protective layers respectively on first and second surfaces of a circuit board; forming a conductive layer on the first insulating protective layer and the openings; forming first and second resist layers on the conductive layer and the second insulating protective layer respectively; forming first electrically connecting structures by electroplating on the exposed conductive layer over a plurality of first and second electrically connecting pads in openings of the first resist layer; removing the first and the second resist layers and the conductive layer covered by the first resist layer; and forming second electrically connecting structures by stencil printing on the conductive layer over the second electrically connecting pads on the first surface and on a plurality of third electrically connecting pads of the second surface of the circuit board.
    Type: Application
    Filed: August 28, 2006
    Publication date: August 16, 2007
    Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATION
    Inventors: Shih-Ping Hsu, Sao-Hsia Tang, Ying-Tung Wang, Wen Hung Hu, Chao Wen Shih
  • Publication number: 20070161223
    Abstract: Conductive structures for electrically conductive pads of a circuit board and fabrication method thereof are proposed.
    Type: Application
    Filed: October 27, 2006
    Publication date: July 12, 2007
    Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATION
    Inventors: Wen-Hung Hu, Ying-Tung Wang, Shih-Ping Hsu, Chao-Wen Shih
  • Publication number: 20070144435
    Abstract: An adjusting mechanism adjusts a boat to be parallel to a furnace having an opening and a receiving space, which has a first symmetrical line. When the boat having a second symmetrical line is inserted into the space, a first gap area is formed between sidewalls of the space and the boat. The mechanism includes an adjusting element and an adjusting tool, which is removably disposed in the opening and has a wide part, a narrow part and a through hole. The narrow part blocks the opening. When the boat is inserted into the space, a second gap area smaller than the first gap area is formed between the sidewalls of the boat and the through hole at the narrow part. The adjusting element adjusts the first and second symmetrical lines to be parallel to each other according to the second gap area.
    Type: Application
    Filed: December 28, 2005
    Publication date: June 28, 2007
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hung-Hu Hao, Kuo-Pang Tseng
  • Publication number: 20070139717
    Abstract: A method for reducing memory consumption when carrying out edge enhancement in a multiple beam pixel apparatus is provided, wherein Static Random Access Memories and first in first out buffers are employed. When the first to the nth input units read the next bit data, the first rows of the bit data in the first to the nth buffers are removed, and each row of bit data behind the first rows is moved towards left by one bit. The first rows of bit data in the (n+1)th to the (n+4)th buffers are stored in one end of the first to the fourth memories respectively, and a bit data is taken out from the other end of each of the memories, to be sequentially stored in the end of the first to the fourth buffers, and the read next bit data is stored in the fifth to the (n+4)th buffers.
    Type: Application
    Filed: December 16, 2005
    Publication date: June 21, 2007
    Inventors: Wen-Ning Kuo, Che-Hung Hu
  • Publication number: 20070134896
    Abstract: A method for fabricating a micro structure includes depositing a first layer of a first material over a substrate; patterning a first hard mask over the first layer; depositing a second layer of a second material over the first layer and the first hard mask; patterning a second hard mask over the second layer; and selectively removing the first material and the second material not covered by any of the first mask and the second mask to produce over the substrate the micro structure having a first structure portion having a first height and a second structure portion having a second height.
    Type: Application
    Filed: May 10, 2006
    Publication date: June 14, 2007
    Applicant: SPATIAL PHOTONICS, INC.
    Inventors: Chii Lee, Shaoher Pan, Hung Hu
  • Publication number: 20070121192
    Abstract: A spatial light modulator includes a mirror plate comprising a reflective upper surface, a lower surface having a conductive surface portion, and a substrate portion having a first cavity having an opening on the lower surface, a second cavity in the substrate portion, and a membrane over the second cavity. The modulator includes a substrate comprising an upper surface, a hinge support post in connection with the upper surface, a hinge component supported by the hinge support post and in connection with the mirror plate to facilitate a rotation of the mirror plate, and an upright landing tip in connection with the upper surface of the substrate. The hinge component is extends into the first cavity. The upright landing tip is configured to contact the membrane over the second cavity in the substrate portion of the mirror plate to stop the rotation of the mirror plate at a predetermined orientation.
    Type: Application
    Filed: November 30, 2005
    Publication date: May 31, 2007
    Inventors: Chii Lee, Chun-Teh Kao, Hung Hu, Shaoher Pan
  • Publication number: 20070066202
    Abstract: A coin outlet unit is disclosed to include a casing having a coin outlet, and an adjustment structure for adjusting the size of the coin outlet. The adjustment structure positioning spaces arranged in a line perpendicular to the extending direction of the coin outlet, locating holes arranged in parallel to the positioning spaces, an adjustment block, which has a bottom rod selectably inserted into one of the positioning spaces and a plurality of adjustment holes, and a locking member insertable through the adjustment holes into the locating holes to lock the adjustment block.
    Type: Application
    Filed: September 20, 2005
    Publication date: March 22, 2007
    Applicant: INTERNATIONAL CURRENCY TECHNOLOGIES CORPORATION
    Inventors: Chia-Hung Hu, Ting-Kuo Lin
  • Patent number: 7151050
    Abstract: A method for fabricating an electrical connection structure of a circuit board is proposed. A patterned resist layer is formed on the circuit board having a plurality of conductive pads, and a plurality of openings is formed in the resist layer to expose the conductive pads. A first conductive material and a second conductive material are successively deposited in the openings of the resist layer and on each of the conductive pads. Then, the resist layer is removed. Subsequently, a protective layer is applied on the circuit board and covers the first and second conductive materials formed on each of the conductive pads. Finally, the protective layer is thinned to expose the second conductive material corresponding in position to each of the conductive pads. Thus, the circuit board can be electrically connected to an external device via the second conductive material.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: December 19, 2006
    Assignee: Phoenix Precision Technology Corporation
    Inventors: Shih-Ping Hsu, Sao-Hsia Tang, Chao-Wen Shih, Ying-Tung Wang, Wen-Hung Hu
  • Publication number: 20060252248
    Abstract: A method for fabricating an electrically connecting structure of a circuit board is proposed. An insulating protecting layer is formed on a circuit board having electrically connecting pads and has openings to expose the electrically connecting pads. A resist layer with openings corresponding to the electrically connecting pads is formed on a conductive layer formed on the insulating protecting layer. A metal layer is formed in the openings of the resist layer and fills the openings. The resist layer is removed. The metal layer and the conductive layer on the surface of the insulating protecting layer are removed by thinning processing, so as to form a metal bump. An adhesive layer is formed on an exposed surface of the metal bump, so as to form the electrically connecting structure for electrically connecting the circuit board to an external electronic device.
    Type: Application
    Filed: May 8, 2006
    Publication date: November 9, 2006
    Inventor: Wen-Hung Hu
  • Publication number: 20060252247
    Abstract: A processing apparatus for electroplating conductive bumps on an organic circuit board includes a surface cleaning unit for removing organic contaminant on the surface of conductive layer on the circuit board, a rinsing unit for rinsing the surface of conductive layer, a surface activating unit for removing a metal oxide on the surface of conductive layer, and an electroplating unit for electroplating a conductive bump on the exposing surface of the conductive layer. Thus, the conductive bumps are formed on the circuit board by electroplating.
    Type: Application
    Filed: May 8, 2006
    Publication date: November 9, 2006
    Inventors: Shih-Ping Hsu, Sao-Hsia Tang, Ying-Tung Wang, Wen-Hung Hu, Chao-Wen Shih
  • Publication number: 20060252249
    Abstract: A solder ball pad surface finish structure of a circuit board and a method for fabricating the same are proposed. An insulative protecting layer with a plurality of openings is formed on a circuit board to expose solder ball pads on the circuit board. A conductive layer is formed on the insulative protecting layer and in the openings, and a resist layer is also formed thereon. A plurality of openings are formed and defined in the resist layer corresponding to the solder ball pads. The area of openings of resist layer can be larger or smaller than the area of the openings of insulative protecting layer, and the resist layer is hung above the solder ball pads. A metal layer is formed on the conductive layer and in the openings of resist layer by electroplating and an adhesive layer is formed successively. Then, the resist layer and the conductive layer underneath the resist layer are removed. Afterwards, the adhesive layer is further processed by re-flow process.
    Type: Application
    Filed: May 8, 2006
    Publication date: November 9, 2006
    Inventors: Shih-Ping Hsu, Sao-Hsia Tang, Ying-Tung Wang, Wen-Hung Hu, Chao-Wen Shih
  • Publication number: 20060244140
    Abstract: A conductive bump structure of a circuit board and a method for forming the same are proposed. A conductive layer is formed on an insulating layer on the surface of the circuit board. A first resist layer is formed on the conductive layer and a plurality of first openings is formed in the first resist layer to expose the conductive layer. Then, a patterned trace layer is electroplated in the first openings and a second resist layer is covered on the circuit board with the patterned trace layer. Second openings are formed in the second resist layer to expose part of the trace layer to be used as electrical connecting pads. Thereafter, metal bumps are electroplated in the second openings and the surface of the circuit board is covered with a solder mask. A thinning process is applied to the solder mask to expose the top surface of the metal bumps. Afterwards, an adhesive layer is formed on the surface of the metal bumps exposing out of the solder mask.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 2, 2006
    Inventor: Wen-Hung Hu
  • Publication number: 20060238573
    Abstract: A method for fabricating a monolithic fluid ejection device. The method includes providing a substrate with a signal transmitting circuit and a heating element. A protective layer is formed to cover the signal transmitting circuit and a heating element. A first patterned resistive layer is formed to define a predetermined sacrificial layer area. A sacrificial layer is formed on the predetermined sacrificial layer area. After removing the first resistive layer, a second patterned resistive layer is formed to define a predetermined structural layer area. After forming a structural layer, the second resistive layer is removed. A manifold is formed by etching from the back of the substrate to expose the sacrificial layer. Finally, a chamber is formed by removing the sacrificial layer.
    Type: Application
    Filed: April 25, 2006
    Publication date: October 26, 2006
    Applicant: BENQ CORPORATION
    Inventors: Hung Hu, Wei Chen, Der Shyn
  • Publication number: 20060225917
    Abstract: A conductive bump structure of a circuit board and a fabrication method thereof are proposed. The circuit board is formed with conductive circuits on a surface thereof An insulating protection layer having a plurality of openings to expose terminals of the conductive circuits is formed on the circuit board. A conductive layer is formed on the insulating protection layer and in the openings thereof. A patterned resist layer is formed on the conductive layer and has a plurality of openings corresponding in position to the terminals of the conductive circuits. Conductive bumps are formed by electroplating in the openings of the resist layer. Then, the resist layer and the conductive layer underneath the resist layer are removed. An adhesive layer is formed on the conductive bumps and completely covers exposed surfaces of the conductive bumps respectively. The circuit board can be electrically connected to electronic elements through the conductive bumps.
    Type: Application
    Filed: February 22, 2006
    Publication date: October 12, 2006
    Inventor: Wen-Hung Hu
  • Publication number: 20060219567
    Abstract: A fabrication method of conductive bump structures of a circuit board includes providing the circuit board with a plurality of electrically connecting pads formed on at least one surface thereof and covering the circuit board with an insulating protection layer formed a plurality of openings to expose the electrically connecting pads; forming a conductive layer on surfaces of the insulating protection layer and openings, and forming a metal layer on the conductive layer by electroplating, with the openings of the insulating protection layer being deposited by the metal layer; forming a resist layer on the metal layer wherein the resist layer is further patterned to form a plurality of openings corresponding to the electrically connecting pads to partially expose the metal layer; forming an adhesive layer in the openings of the resist layer; and removing the resist layer, and then removing the metal layer and conductive layer not covered by the adhesive layer, to form conductive bump structures on the electric
    Type: Application
    Filed: April 3, 2006
    Publication date: October 5, 2006
    Inventor: Wen-Hung Hu
  • Publication number: 20060204650
    Abstract: An electrical connector structure of circuit board and a method for fabricating the same are proposed. A circuit board having a conductive layer is formed with a first resist layer and a second resist layer thereon, so as to form electrical connection pads and metal bumps on the electrical connection pads. The first and second resist layers are formed with openings therein at positions corresponding to the electrical connection pads and metal bumps, and the exposed conductive layer is removed. An adhesive layer is formed to cover the exposed surfaces of the electrical connection pads and the metal bumps. Then, the second resist layer, the first resist layer and the conductive layer covered by the first resist layer are removed. Later, an insulating protective layer is formed on a surface of the circuit board, and thinned to expose a portion of the adhesive layer, such that electrical connectors of the circuit board are fabricated.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 14, 2006
    Inventor: Wen-Hung Hu
  • Publication number: 20060202331
    Abstract: A conductive bump structure of a circuit board and a method for fabricating the same are proposed. The circuit board with a plurality of electrical connection pads is provided. An insulating protective layer and a resist layer are successively applied on the circuit board, wherein openings are formed in the layers at positions corresponding to the pads to expose the pads. Then, a conductive layer is formed on surfaces of the resist layer and openings, and a metal layer is formed on the conductive layer via electroplating and filled in the openings. Subsequently, the metal layer and conductive layer formed on the resist layer are removed via thinning, so as to form metal bumps on the pads. After the resist layer is removed, the metal bumps are covered by an adhesive layer to form a conductive bump structure for electrically connecting the circuit board to the external electronic component.
    Type: Application
    Filed: March 7, 2006
    Publication date: September 14, 2006
    Inventor: Wen-Hung Hu
  • Publication number: 20060091212
    Abstract: A chip card acceptor is disclosed to include a housing having a front insertion hole for the insertion of a card or chip card, an electric connector mounted inside the housing for contacting the inserted card, a circuit board mounted inside the housing and electrically connected to the electric connector for reading storage data from the inserted card and transmitting fetched data to a main unit of an external system, and sensor means installed in the circuit board for verifying the authenticity of the inserted card for enabling the detection result and the storage data of the inserted card to be transmitted through the circuit board to the main unit of the external system for further processing.
    Type: Application
    Filed: October 28, 2004
    Publication date: May 4, 2006
    Applicant: INTERNATIONAL CURRENCY TECHNOLOGIES CORPORATION
    Inventors: Tien-Yuan Chien, Ting-Kuo Lin, Chia-Hung Hu
  • Publication number: 20060079081
    Abstract: A method for fabricating an electrical connection structure of a circuit board is proposed. A patterned resist layer is formed on the circuit board having a plurality of conductive pads, and a plurality of openings is formed in the resist layer to expose the conductive pads. A first conductive material and a second conductive material are successively deposited in the openings of the resist layer and on each of the conductive pads. Then, the resist layer is removed. Subsequently, a protective layer is applied on the circuit board and covers the first and second conductive materials formed on each of the conductive pads. Finally, the protective layer is thinned to expose the second conductive material corresponding in position to each of the conductive pads. Thus, the circuit board can be electrically connected to an external device via the second conductive material.
    Type: Application
    Filed: October 12, 2005
    Publication date: April 13, 2006
    Inventors: Shih-Ping Hsu, Sao-Hsia Tang, Chao-Wen Shih, Ying-Tung Wang, Wen-Hung Hu